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Integrated Device Techn...
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| Part No. |
87973DYI-147LF 87973I-147
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| OCR Text |
...ddo inv_clk qc1 fsel_c0 fsel_c1 qc2 v ddo qc3 gndo gndi v dda nmr/oe frz_clk frz_data fsel_fb2 pll_sel ref_sel clk_sel clk0 clk1 clk nclk gn...0:1] f s el_b[0:1] f s el_c[0:1] f s el_fb[0:2] f s el_fb2 nmr/oe p u ll u p 2 2 2 3
3 ?2016 integ... |
| Description |
Low Skew, 1-to-12 LVCMOS/ LVTTL Clock Multiplier/ Zero Delay Buffer
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| File Size |
463.07K /
20 Page |
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it Online |
Download Datasheet
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Integrated Device Techn...
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| Part No. |
87972DYI-147LFT 87972I-147
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| OCR Text |
... addition, 2 outputs in bank c (qc2, qc3) can be select- ed to be inverting or non-inverting. the output frequency range is 10mhz to 150mh...0:1] pullup fsel_b[0:1] pullup fsel_c[0:1] pullup fsel_fb[0:2] pullup frz_clk pullup frz_data pullup... |
| Description |
Low Skew, 1-to-12 LVCMOS/LVTTL Clock Multiplier/Zero Delay Buffer
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| File Size |
209.32K /
18 Page |
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it Online |
Download Datasheet |
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Cypress
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| Part No. |
CY29977AI
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| OCR Text |
...qa2 qa3 qb0 qb1 qb2 qb3 qc0 qc1 qc2 qc3 fb_out sync 12 vco_sel pll_en vss mr#/oe sclk sdata fb_sel2 pll_en ref_sel tclk_sel tclk0 tclk1 xin ...0.1 f) should be placed as close as possible to each positive power (<0.2 ? ). if these bypass capa... |
| Description |
3.3V, 125-MHz, Multi-Output Zero Delay Buffer
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| File Size |
88.20K /
9 Page |
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it Online |
Download Datasheet |
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