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  double-buffered Datasheet PDF File

For double-buffered Found Datasheets File :: 2393    Search Time::1.688ms    
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    AD8600 AD8600AP AD8600CHIPS

AD[Analog Devices]
Part No. AD8600 AD8600AP AD8600CHIPS
OCR Text Double Buffered 8-Bit Parallel Input High Speed Data Load Rate Data Readback Operates from Single +5 V Optional 6 V Supply Extends Output Range APPLICATIONS Phased Array Ultrasound & Sonar Power Level Setting Receiver Gain Setting Automatic...
Description 16-Channel, 8-Bit Multiplying DAC

File Size 231.85K  /  16 Page

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    DS1742 DS1742-100 DS1742-70 DS1742W-120 DS1742W-150

MAXIM - Dallas Semiconductor
Dallas Semiconducotr
DALLAS[Dallas Semiconductor]
Part No. DS1742 DS1742-100 DS1742-70 DS1742W-120 DS1742W-150
OCR Text ... The RTC clock registers are double-buffered to avoid access of incorrect data that can occur during clock update cycles. The double buffered system also prevents time loss as the timekeeping countdown continues unabated by access to tim...
Description Y2KC Nonvolatile Timekeeping RAM

File Size 161.94K  /  12 Page

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    MAX500 MAX500ACPE MAX500ACWE MAX500AEJE MAX500AEPE MAX500AEWE MAX500AMJE MAX500AMLP MAX500BCPE MAX500BCWE MAX500BEJE MAX

MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
Maxim Integrated Products, Inc.
Part No. MAX500 MAX500ACPE MAX500ACWE MAX500AEJE MAX500AEPE MAX500AEWE MAX500AMJE MAX500AMLP MAX500BCPE MAX500BCWE MAX500BEJE MAX500BEPE MAX500BEWE MAX500BMJE MAX500BMLP 1114 MAX500BC_D MAX500BC/D MAXIMINTEGRATEDPRODUCTSINC-MAX500AMJE
OCR Text ...ading them. The MAX500 contains double-buffered logic and a 10-bit shift register that allows all four DACs to be updated simultaneously using one control signal. There are three reference inputs so the range of two of the DACs can be indep...
Description CMOS, Quad, Serial Interface 8-Bit DAC
From old datasheet system
CMOS, Quad, Serial-Interface 8-Bit DAC
CMOS / Quad / Serial-Interface 8-Bit DAC

File Size 125.99K  /  12 Page

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    MAX503 MAX503CNG MAX503CWG MAX503CAG MAX503ENG MAX503EAG 1115 MAX503EWG

MAXIM[Maxim Integrated Products]
Part No. MAX503 MAX503CNG MAX503CWG MAX503CAG MAX503ENG MAX503EAG 1115 MAX503EWG
OCR Text .... The parallel logic inputs are double buffered and are compatible with 4-bit, 8bit, and 16-bit microprocessors. For a hardware and software compatible 12-bit upgrade, refer to the MAX530 data sheet. For DACs with similar features but with ...
Description 5V / Low-Power / Parallel-Input / Voltage-Output / 10-Bit DAC
5V, Low-Power, Parallel-Input, Voltage-Output, 10-Bit DAC
5V Low-Power Parallel-Input Voltage-Output 10-Bit DAC
From old datasheet system

File Size 116.45K  /  16 Page

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    DM74LS174 DM74LS174M DM74LS174N DM74LS174SJ DM74LS175 DM74LS175M DM74LS175N DM74LS175SJ 74LS174 74LS175

FAIRCHILD[Fairchild Semiconductor]
Part No. DM74LS174 DM74LS174M DM74LS174N DM74LS174SJ DM74LS175 DM74LS175M DM74LS175N DM74LS175SJ 74LS174 74LS175
OCR Text ...5 contains four flip-flops with double-rail outputs s Buffered clock and direct clear inputs s Individual data input to each flip-flop s Applications include: Buffer/storage registers Shift registers Pattern generators s Typical clock frequ...
Description Hex/Quad D-Type Flip-Flops with Clear

File Size 72.72K  /  7 Page

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    M48T86 M48T86MH M48T86PC M48T86PC1 M48T86SH M48TPC1 M48TPC1TR M48TMH1 M48TMH1TR

ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
Part No. M48T86 M48T86MH M48T86PC M48T86PC1 M48T86SH M48TPC1 M48TPC1TR M48TMH1 M48TMH1TR
OCR Text ...LOCK CALENDAR, AND ALARM RAM DOUBLE BUFFERED DS R/W AS BUS INTERFACE BCD/BINARY INCREMENT STORAGE REGISTERS (114 BYTES) RCL AD0-AD7 AI01643 DS (Data Strobe Input). The DS pin is also referred to as Read (RD). A falling edge t...
Description 5V PC REAL TIME CLOCK

File Size 161.75K  /  23 Page

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    MN66271RA MN66271

PANASONIC[Panasonic Semiconductor]
Part No. MN66271RA MN66271
OCR Text ...interpolation. "H" level: play. Double-speed status signal output. "L" level: double-speed. MN66271RA Pin Descriptions (continued) Pin ...buffered subcode Q mode. Package Dimensions (Unit: mm) QFS080-P-1414 16.20.2 14.00.2 60 61 41...
Description Signal Processing LSI for Compact Disc Players

File Size 49.52K  /  6 Page

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    MN662724RPE

PANASONIC[Panasonic Semiconductor]
Part No. MN662724RPE
OCR Text ...tching pin. Play signal output. Double-speed status signal output. RF signal input. Reference current input pin DSL bias pin. DSL loop-filte...Buffered Q code mode. "L" level: CLDCK synchronization mode. For Audio Equipment Package Dimensi...
Description Signal Processing LSI for CD Players

File Size 41.83K  /  7 Page

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    MN662747RPH

Panasonic, Corp.
PANASONIC[Panasonic Semiconductor]
Part No. MN662747RPH
OCR Text ...ection pin. Play signal output. Double-speed status signal output. RF signal input. Reference current input pin. DSL bias pin. DSL loop filt...buffered subcode Q mode. "L" level: CLDCK synchronization mode. When IOSEL is "L" level, BCKL input....
Description Signal Processing LSI for CD Players SPECIALTY CONSUMER CIRCUIT, PQFP80

File Size 52.31K  /  7 Page

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For double-buffered Found Datasheets File :: 2393    Search Time::1.688ms    
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