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TI store
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| Part No. |
OMAP3503
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| OCR Text |
...plications processor: ? omap? 3 architecture 64k-byte shared sram ? mpu subsystem endianess: 600-mhz arm cortex?-a8 core ? arm instructions - little endian neon? simd coprocessor ? arm data ? configurable ? 2d/3d graphics accelerator (o... |
| Description |
<font color=red>[Old version datasheet]</font> Applications Processor
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| File Size |
3,686.69K /
262 Page |
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TI store
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| Part No. |
OMAP-L137
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| OCR Text |
..., four 16 x 16-bit arm9 memory architecture multiplies, or eight 8 x 8-bit multiplies per clock cycle, and complex multiples c674x instruction set features ? instruction packing reduces code size ? superset of the c67x+? and c64x+? isas ?... |
| Description |
<font color=red>[Old version datasheet]</font> Low-Power Applications Processor
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| File Size |
1,842.27K /
219 Page |
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TI store
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| Part No. |
RM48L952DPGET
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| OCR Text |
... network (lin) interface ? open architecture with third-party support controller ? operating conditions ? compliant to lin protocol version 2.1 ? system clock up to 220 mhz ? can be configured as a second sci ? core supply voltage (vcc): 1.... |
| Description |
<font color=red>[Old version datasheet]</font> 16- and 32-Bit RISC Flash Microcontroller
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| File Size |
8,888.55K /
178 Page |
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TI store
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| Part No. |
TMS370
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| OCR Text |
...tibility register-to-register architecture 256 general-purpose registers 14 powerful addressing modes instructions upwardly compatible with all tms370 devices cmos/ ttl compatible i / o pins / packages all peripheral function p... |
| Description |
<font color=red>[Old version datasheet]</font> 8-BIT MICROCONTROLLER
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| File Size |
643.76K /
43 Page |
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TI store
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| Part No. |
MSP430G2332-EP MSP430G2332-EP-15
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| OCR Text |
...? package options ? 16-bit risc architecture, 62.5-ns instruction ? tssop: 20 pin cycle time ? for complete module descriptions, see the ? basic clock module configurations msp430x2xx family user ? s guide ( slau144 ) ? internal frequencies... |
| Description |
<font color=red>[Old version datasheet]</font> MIXED SIGNAL MICROCONTROLLER
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| File Size |
1,072.12K /
54 Page |
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Motorola
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| Part No. |
DSP56F826
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| OCR Text |
...lity in a unified, c-efficient architecture hardware do and rep loops mcu-friendly instruction set supports both dsp and controller functions: mac, bit manipulation unit, 14 addressing modes 31.5k ... |
| Description |
DSP56F826 6-bit Hybrid Controller
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| File Size |
707.13K /
48 Page |
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Alliance Semiconductor ...
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| Part No. |
AS4C32M16MD1A AS4C32M16MD1A-5BCN
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| OCR Text |
...e uses a double data rate architecture to achieve hi gh- speed operation. the dou ble data rate architectur e is essentially a 2n- prefetch architecture with an interface designed to transfer two data words per clock cycle at ... |
| Description |
60 ball FBGA PACKAGE
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| File Size |
2,393.14K /
53 Page |
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