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    CY7C1357C-100BZC CY7C1357C-100BZI CY7C1357C-100BZXC CY7C1357C-100BZXI CY7C1357C-133BGC CY7C1357C-133BGI CY7C1355C-100AXI

Cypress Semiconductor
Part No. CY7C1357C-100BZC CY7C1357C-100BZI CY7C1357C-100BZXC CY7C1357C-100BZXI CY7C1357C-133BGC CY7C1357C-133BGI CY7C1355C-100AXI CY7C1355C-100BGXI CY7C1355C-100AXC CY7C1355C-100BGXC CY7C1355C-100BGC CY7C1355C-100BGI CY7C1355C-100BZC CY7C1355C-100BZI CY7C1355C-100BZXC CY7C1355C-100BZXI CY7C1357C-133AXC CY7C1357C-133AXI CY7C1357C-133BGXC CY7C1357C-133BGXI CY7C1357C-133BZXC CY7C1357C-133BZXI CY7C1355C-133AXC CY7C1355C-133AXI CY7C1357C-100AXI CY7C1357C-100AXC CY7C1355C-133BGXI
OCR Text 36/512k x 18) Flow-Through SRAM with NoBLTM Architecture Features * No Bus LatencyTM (NoBLTM) architecture eliminates dead cycles between write and read cycles * Can support up to 133-MHz bus operations with zero wait states -- Data is tr...
Description 9-Mbit (256K x 36/512k x 18) Flow-Through SRAM with NoBL垄芒 Architecture
9-Mbit (256K x 36/512k x 18) Flow-Through SRAM with NoBL Architecture
9-Mbit (256K x 36/512k x 18) Flow-Through SRAM with NoBL?/a> Architecture

File Size 509.71K  /  28 Page

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    CY7C1543V18 CY7C1543V18-300BZC CY7C1543V18-300BZI CY7C1543V18-300BZXC CY7C1543V18-300BZXI CY7C1543V18-333BZC CY7C1543V18

Cypress Semiconductor
Part No. CY7C1543V18 CY7C1543V18-300BZC CY7C1543V18-300BZI CY7C1543V18-300BZXC CY7C1543V18-300BZXI CY7C1543V18-333BZC CY7C1543V18-333BZI CY7C1543V18-333BZXC CY7C1543V18-333BZXI CY7C1543V18-375BZC CY7C1543V18-375BZI CY7C1543V18-375BZXC CY7C1543V18-375BZXI CY7C1541V18-375BZC CY7C1556V18-375BZC CY7C1545V18-375BZC CY7C1545V18-333BZI CY7C1545V18-300BZC CY7C1545V18-300BZI CY7C1545V18-300BZXC CY7C1545V18-333BZC CY7C1545V18-300BZXI CY7C1541V18-300BZI CY7C1541V18-333BZI CY7C1541V18-333BZXI CY7C1541V18-333BZXC
OCR Text ...18 - 4M x 18 CY7C1545V18 - 2M x 36 Separate independent read and write data ports Supports concurrent transactions 300 MHz to 375 MHz cl...512k x 36 Array 512k x 36 Array 512k x 36 Array 512k x 36 Array K K CLK Gen. Control ...
Description 72-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
72-Mbit QDR?II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)

File Size 983.61K  /  28 Page

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    HM64YLB36512BP-33 HM64YLB36512 HM64YLB36512BP-28

Renesas Electronics Corporation
Part No. HM64YLB36512BP-33 HM64YLB36512 HM64YLB36512BP-28
OCR Text 36-bit) REJ03C0270-0300 Rev.3.00 Jan.13.2006 Description The HM64YLB36512 is a synchronous fast static RAM organized as 512-kword x 36-...512k x 36 Modes Access time Cycle time Package Late select mode 1.6 ns 2.8 ns 119-bump 1.27 mm Late ...
Description 16M Synchronous Late Write Fast Static RAM (512-kword 隆驴 36-bit)
16M Synchronous Late Write Fast Static RAM (512-kword × 36-bit)

File Size 355.43K  /  31 Page

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Part No. IBM0436A41BLAB-3
OCR Text ...18) sram features ? 8mb: 256k x 36 or 512k x 18 organizations 4mb: 128k x 36 or 256k x 18 organizations ? 0.25 micron cmos technology ? synchronous pipeline mode of operation with self-timed late write ? single differential hstl clock ? +2....
Description 128K X 36 STANDARD SRAM, 1.7 ns, PBGA119

File Size 142.68K  /  25 Page

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    ICY7C1373C-100BGI CY7C1371C CY7C1371C-133AC CY7C1371C-100AC CY7C1371C-100AI CY7C1371C-100BGC CY7C1371C-100BGI CY7C1371C-

CYPRESS[Cypress Semiconductor]
Part No. ICY7C1373C-100BGI CY7C1371C CY7C1371C-133AC CY7C1371C-100AC CY7C1371C-100AI CY7C1371C-100BGC CY7C1371C-100BGI CY7C1371C-100BZC CY7C1371C-100BZI CY7C1371C-117AC CY7C1371C-117AI CY7C1371C-117BGC CY7C1371C-117BGI CY7C1371C-117BZC CY7C1371C-117BZI CY7C1371C-133AI CY7C1371C-133BGC CY7C1371C-133BGI CY7C1371C-133BZC CY7C1371C-133BZI CY7C1373C CY7C1373C-100AC CY7C1373C-100AI CY7C1373C-100BGC CY7C1373C-100BZC CY7C1373C-100BZI CY7C1373C-117AC CY7C1373C-117AI CY7C1373C-117BGC CY7C1373C-117BGI CY7C1373C-117BZC CY7C1373C-117BZI CY7C1373C-133AC CY7C1373C-133AI CY7C1373C-133BGC CY7C1373C-133BGI CY7C1373C-133BZC CY7C1373C-133BZI
OCR Text 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Features * No Bus LatencyTM (NoBLTM) architecture eliminates dead cycles between wr...512k x 36/ 1M x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited tr...
Description 18-Mbit (512k x 36/1M x 18) Flow-Through SRAM with NoBL(TM) Architecture
18-Mbit (512k x 36/1M x 18) Flow-Through SRAM with NoBL Architecture

File Size 537.31K  /  33 Page

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    IDT
Part No. IDT71P71104 IDT71P71204
OCR Text ...9, 18 signal lines for x18, and 36 signal lines for x36 2) represents 20 address signal lines for x8 and x9, 19 address signal lines for x1...512k x 36-bit) advance information 18 mb ddr ii sram burst of 2 ...
Description 1.8V 2M x 9 DDR II Pipelined SRAM
1.8V 2M x 8 DDR II Pipelined SRAM

File Size 612.62K  /  24 Page

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    IS61LPS25636A-200B3LI IS61LPS25632A

Integrated Silicon Solution, Inc
Integrated Silicon Solution...
Part No. IS61LPS25636A-200B3LI IS61LPS25632A
OCR Text ...zed as 262,144 words by 36 bits. the is61lps25632a is organized as 262,144 words by 32 bits. the is61lps/ vps512...512k x 18 9 mb synchronous pipelined, single cycle deselect static ram january 2014 fast acce...
Description 9 Mb SYNCHRONOUS PIPELINED, Single CYCLE DESELECT STATIC RAM

File Size 532.76K  /  35 Page

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    CY7C1916JV18-300BZXI CY7C1916JV18-300BZC CY7C1916JV18-300BZI CY7C1916JV18-300BZXC CY7C1320JV18-300BZC CY7C1320JV18-300BZ

Cypress Semiconductor
Part No. CY7C1916JV18-300BZXI CY7C1916JV18-300BZC CY7C1916JV18-300BZI CY7C1916JV18-300BZXC CY7C1320JV18-300BZC CY7C1320JV18-300BZXC CY7C1320JV18-300BZI CY7C1320JV18-300BZXI
OCR Text ...2m x 8, 2m x 9, 1m x 18, 512k x 36) 300 mhz clock for high bandwidth 2-word burst for reducing address bus frequency double data rate (ddr) interfaces (data transferred at 600 mhz) at 300 mhz two input clocks (k and k ) for precise d...
Description 18-Mbit DDR-II SRAM 2-Word Burst Architecture

File Size 407.82K  /  26 Page

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    CY7C1319BV18-167BZC CY7C1319BV18-278BZC CY7C1321BV18-200BZI CY7C1319BV18-200BZI CY7C1319BV18-167BZI CY7C1319BV18-167BZXC

CYPRESS SEMICONDUCTOR CORP
Part No. CY7C1319BV18-167BZC CY7C1319BV18-278BZC CY7C1321BV18-200BZI CY7C1319BV18-200BZI CY7C1319BV18-167BZI CY7C1319BV18-167BZXC CY7C1319BV18-167BZXI CY7C1319BV18-200BZC CY7C1319BV18-200BZXC CY7C1319BV18-200BZXI CY7C1319BV18-250BZC CY7C1319BV18-250BZI CY7C1319BV18-250BZXC CY7C1319BV18-250BZXI CY7C1319BV18-278BZI CY7C1319BV18-278BZXC CY7C1319BV18-278BZXI CY7C1319BV18-300BZC CY7C1319BV18-300BZI CY7C1319BV18-300BZXC CY7C1319BV18-300BZXI CY7C1321BV18-278BZC CY7C1917BV18 CY7C1917BV18-167BZC CY7C1917BV18-167BZI CY7C1917BV18-167BZXC CY7C1917BV18-167BZXI CY7C1917BV18-200BZC CY7C1917BV18-200BZI CY7C1917BV18-200BZXC CY7C1917BV18-200BZXI CY7C1917BV18-250BZC CY7C1917BV18-250BZI CY7C1917BV18-250BZXC CY7C1917BV18-250BZXI CY7C1917BV18-278BZC CY7C1917BV18-278BZXI CY7C1917BV18-300BZC CY7C1917BV18-300BZI CY7C1917BV18-300BZXC CY7C1917BV18-300BZXI CY7C1917BV18-278BZXC CY7C1917BV18-278BZI CY7C1321BV18-278BZXI CY7C1317BV18-278BZXC CY7C1321BV18-167BZI CY7C1321BV18-167BZXC CY7C1321BV18-167BZXI CY7C1321BV18-200BZC CY7C1321BV18-200BZXC CY7C1321BV18-200BZXI CY7C1321BV18-250BZC CY7C1321BV18-250BZXC CY7C1321BV18-250BZXI CY7C1321BV18-278BZI CY7C1321BV18-278BZXC
OCR Text ...2M x 8, 2M x 9, 1M x 18, 512k x 36) * 300-MHz clock for high bandwidth * 4-Word burst for reducing address bus frequency * Double Data Rate (DDR) interfaces (data transferred at 600MHz) @ 300 MHz * Two input clocks (K and K) for precise DDR...
Description 2M X 8 DDR SRAM, 0.45 ns, PBGA165
512k X 36 DDR SRAM, 0.45 ns, PBGA165
18-Mbit DDR-II SRAM 4-Word Burst Architecture

File Size 482.66K  /  28 Page

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