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Integrated Device Techn...
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| Part No. |
9DML0441AKILF 9DML0441AKILFT
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| OCR Text |
...? 4 ? 1~200 mhz low-power hcsl (lp-hcsl) dif pairs ? 9dml0441 default z out = 100 ? ? 9dml0451 default z out = 85 ? ? 9dml04p1 factory programmable defaults key specifications ? pcie gen1-2-3-4 cc compliant ? pcie gen2-3 sris compliant ? ... |
| Description |
2:4 3.3V PCIe Clock Mux
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| File Size |
299.27K /
13 Page |
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it Online |
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Integrated Device Techn...
Integrated Circuit Syst...
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| Part No. |
9DBU0241
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| OCR Text |
...tures ? 2 ? 1-167mhz low-power (lp) hcsl dif pairs w/z o =100 ? key specifications ? dif cycle-to-cycle jitter <50ps ? dif output-to-output skew <50ps ? dif phase jitter is pcie gen1-2-3 compliant ? dif bypass mode additive phase jitter ... |
| Description |
HCSL-compatible differential input
slew rate for each output
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| File Size |
292.60K /
17 Page |
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it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
9DBL0442
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| OCR Text |
...ures ? 4 ? 1-200 mhz low-power (lp) hcsl dif pairs ? 9dbl0442 default z out = 100 ? ? 9dbl0452 default z out = 85 ? ? 9dbl04p2 factory programmable defaults ? easy ac-coupling to other logic families, see idt application note an-891 key... |
| Description |
4-Output 3.3V PCIe Zero-delay Buffer
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| File Size |
302.45K /
19 Page |
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it Online |
Download Datasheet |
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0441
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| OCR Text |
...tures ? 4 ? 1-167mhz low-power (lp) hcsl dif pairs w/zo=100 ? key specifications ? dif cycle-to-cycle jitter <50ps ? dif output-to-output skew <75ps ? dif phase jitter is pcie gen1-2-3 compliant ? dif bypass mode additive phase jitter is... |
| Description |
slew rate for each output
HCSL-compatible differential input
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| File Size |
190.11K /
16 Page |
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it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
9DBL0442BKILF 9DBL0442BKILFT
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| OCR Text |
...ures ? 4 ? 1-200 mhz low-power (lp) hcsl dif pairs ? 9dbl0442 default z out = 100 ? ? 9dbl0452 default z out = 85 ? ? 9dbl04p2 factory programmable defaults ? easy ac-coupling to other logic families, see idt application note an-891 key... |
| Description |
4-output 3.3V PCIe Zero-delay Buffer
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| File Size |
303.97K /
19 Page |
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it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
9DBU0541AKLF 9DBU0541AKILF 9DBU0541AKLFT 9DBU0541-17
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| OCR Text |
...atures ? 5 1?167mhz low-power (lp) hcsl dif pairs with z o =100 ? key specifications ? dif additive cycle-to-cycle jitter < 5ps ? dif output-to-output skew < 60ps ? dif additive phase jitter is < 300fs rms for pcie gen3 ? dif additiv... |
| Description |
5-Output 1.5V PCIe Gen1-2-3 Fanout Buffer with Zo=100ohms
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| File Size |
215.11K /
17 Page |
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it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
9DBL0252BKILFT 9DBL0242BKILF 9DBL0242BKILFT
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| OCR Text |
...ures ? 2 ? 1-200 mhz low-power (lp) hcsl dif pairs ? 9dbl0242 default z out = 100 ? ? 9dbl0252 default z out = 85 ? ? 9dbl02p2 factory programmable defaults ? easy ac-coupling to other logic families, see idt application note an-891 key... |
| Description |
2-output 3.3V PCIe Zero-Delay Buffer
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| File Size |
297.28K /
19 Page |
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it Online |
Download Datasheet |
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0641
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| OCR Text |
...tures ? 6 ? 1-167mhz low-power (lp) hcsl dif pairs w/zo=100 ? key specifications ? dif cycle-to-cycle jitter <50ps ? dif output-to-output skew <60ps ? dif phase jitter is pcie gen1-2-3 compliant ? dif bypass mode additive phase jitter is... |
| Description |
slew rate for each output
HCSL-compatible differential input
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| File Size |
226.91K /
17 Page |
View
it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
9DBL0242 9DBL0252
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| OCR Text |
...ures ? 2 ? 1-200 mhz low-power (lp) hcsl dif pairs ? 9dbl0242 default z out = 100 ? ? 9dbl0252 default z out = 85 ? ? 9dbl02p2 factory programmable defaults ? easy ac-coupling to other logic families, see idt application note an-891 key... |
| Description |
2-output 3.3V PCIe Zero-Delay Buffer
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| File Size |
297.55K /
19 Page |
View
it Online |
Download Datasheet |
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Integrated Circuit Syst...
Integrated Device Techn...
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| Part No. |
9DBU0841
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| OCR Text |
...tures ? 8 ? 1-167mhz low-power (lp) hcsl dif pairs w/zo=100 ? key specifications ? dif cycle-to-cycle jitter <50ps ? dif output-to-output skew < 80ps ? dif phase jitter is pcie gen1-2-3 compliant ? very low additive phase jitter in bypass ... |
| Description |
slew rate for each output
HCSL-compatible differential input
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| File Size |
304.34K /
17 Page |
View
it Online |
Download Datasheet |
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