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? 2016 microchip technology inc. ds20005428a-page 1 features ? high-voltage cmos technology ? symmetric row drive (reduces latent imaging in actfel displays) ? output voltage up to +230v ? low power level shifting ? source/sink current minimum 70 ma ? shift register speed 4.0 mhz ? pin-programmable shift direction description HV7022 is a low-voltage serial to high-voltage parallel converter with push-pull outputs. it is especially suited for use as a symmetric row driver in ac thin-film elec- troluminescent (actfel) displays. HV7022 offers 34 output lines, a direction (dir) pin to give cw or ccw shift register loading, output enable (oe), and polarity (pol) control. after data is entered on the falling edge of clk, a logic high will cause the output to swing to v pp if pol is high, or to gnd if pol is low. package type 44-lead plcc see table 2-1 for pin information 1 44 6 40 HV7022 34-channel symmetric row driver
HV7022 ds20005428a-page 2 ? 2016 microchip technology inc. functional block diagram hv out 1 oe pol data input data out gnd s/r clk vdd vpp dir hv out 2 hv out 34 level translator p n p n p n level translator level translator
? 2016 microchip technology inc. ds20005428a-page 3 HV7022 1.0 electrical characteristics absolute maximum ratings ? supply voltage, v dd ............................................................................................................................... ....-0.3v to +15v supply voltage, v pp ............................................................................................................................... ..-0.3v to +250v logic input levels ............................................................................................................. .................. -0.3v to v dd +0.3v ground current 1 ............................................................................................................................... ........................ 1.5a continuous total power dissipation 2 .................................................................................................................. 1200mw operating temperature range.................................................................................................... .............. -40c to +85c storage temperature range ...................................................................................................... ............. -65c to +150c 1: duty cycle is limited by the tota l power dissipated in the package. 2: for operation above 25c ambient derate linearly to maximum operating temperature at 25 mw/c. ? notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect devi ce reliability. electrical characteristics recommended operating conditions: v pp = 230v, v dd = 12v, t a = 25c, unless otherwise noted symbol parameter min max units conditions dc characteristics i dd v dd supply current - 10 ma f clk = 4.0mhz, v dd =13.2v i pp v pp supply current - 4.0 ma one output high ( note 1 ) - 100 a all outputs low or high-z - 750 all outputs low or high-z (125c) i ddq quiescent v dd supply current - 100 a all v in = gnd or v dd v oh high-level output hv out 195 - v i o = -70ma data out 11 - v i o = -500a v ol low-level output hv out -30vi o = +70ma data out - 1.0 v i o = +500a i ih high-level logic input current - 1.0 a v ih = 12v i il low-level logic input current - -1.0 a v il = 0v ac characteristics f clk clock frequency - 4.0 mhz ? t wh ,t wl pulse duration clock width high or low 125 - ns ? t sud data set-up time before falling clock 100 - ns ? t hd data hold time after falling clock 100 - ns ? t suc setup time clock low before v pp or gnd 300 - ns ? t sue setup time enable high before v pp or gnd 300 - ns ? t sup setup time polarity high or low before v pp or gnd 300 - ns ? t hc hold time clock high after v pp or gnd 500 - ns ? t he hold time enable high after v pp or gnd 300 - ns ? t hp hold time polarity high or low after v pp or gnd 300 - ns ?
HV7022 ds20005428a-page 4 ? 2016 microchip technology inc. note 1: the total number of on outputs times the duty cycl e must not exceed the allowable package power dissi- pation. t dhl delay time high to low-level output from clock - 150 ns c l = 10pf t dlh delay time low to high-level output from clock - 200 ns c l = 10pf t thl transition time high to low-level serial output - 200 ns c l = 15pf t tlh transition time low to high-level serial output - 100 ns c l = 15pf t onh high-level turn-on time hv out from enable - 500 ns v oh = 195v, r l = 2.0k ? to 95v t onl low-level turn-on time hv out from enable - 500 ns v oh = 130v, r l = 2.0k ? to 30v t offh high-level turn-off time hv out from enable -1000ns v oh = 195v, r l = 2.0k ? to 95v t offl low-level turn-off time hv out from enable - 500 ns v oh = 130v, r l = 2.0k ? to 30v sr slew rate, v pp or gnd -45v/s one active output driving 4.7nf load to v pp or gnd temperature specifications parameter symbol min typ max units conditions temperature ranges operating temperature ? -40 ? 85 c ? storage temperature ? -65 ? 150 c ? package thermal resistances thermal resistance, 44-lead plcc ja ?37?c/w ? electrical character istics (continued) recommended operating conditions: v pp = 230v, v dd = 12v, t a = 25c, unless otherwise noted symbol parameter min max units conditions
? 2016 microchip technology inc. ds20005428a-page 5 HV7022 1.1 power up and recommended operating conditions to power-up HV7022, perform the following power-up sequence: 1. connect ground 2. apply v dd 3. set all inputs (data, clk, enable, etc) to a known state. 4. apply v pp (v pp should not drop below v dd or float during operation). to power-down the device, reverse the steps above. recommended operating conditions symbol parameter min max units v dd logic supply voltage 10.8 13.2 v v pp high voltage supply ? 230 v v ih high-level input voltage v dd = 10.8 8.1 ? v v dd = 13.2 9.9 ? v il low-level input voltage v dd = 10.8 - 2.7 v v dd = 13.2 - 3.3 f clk clock frequency - 4.0 mhz t a operating free-air temperature -40 +85 c i od allowable pulsed current through output diode. ? 300 ma
HV7022 ds20005428a-page 6 ? 2016 microchip technology inc. 2.0 pin description the locations of the pins are listed in package type . table 2-1: pin description pin # HV7022 description 1hv out 18/17 high voltage outputs. 2hv out 17/18 3hv out 16/19 4hv out 15/20 5hv out 14/21 6hv out 13/22 7hv out 12/23 8hv out 11/24 9hv out 10/25 10 hv out 9/26 11 hv out 8/27 12 hv out 7/28 13 hv out 6/29 14 hv out 5/30 15 hv out 4/31 16 hv out 3/32 17 hv out 2/33 18 hv out 1/34 19 data out serial data output. data output for cascading to the data input of the next device. 20 oe output enable input. when oe is low, all hv outputs are fo rced into a high-z state, regardless of data in each channel. when oe is high, all hv outputs reflect data latched. 21 clk data shift register clock input are shifted into the shift regi ster on the negative edge of the clock. 22 gnd logic and high voltage ground. 23 dir direction. 24 vdd low voltage logic power rail. 25 pol polarity. 26 data input serial data input. data needs to be present before each falling edge of the clock. 27 vpp high voltage power rail. 28 nc no connect. 29 hv out 34/1 high voltage outputs 30 hv out 33/2 31 hv out 32/3 32 hv out 31/4 33 hv out 30/5 34 hv out 29/6
? 2016 microchip technology inc. ds20005428a-page 7 HV7022 note 1: pin designation for dir h/l example: for dir = h, pin 1 is hv out 18 for dir = l, pin 1 is hv out 17 35 hv out 28/7 high voltage outputs. 36 hv out 27/8 37 hv out 26/9 38 hv out 25/10 39 hv out 24/11 40 hv out 23/12 41 hv out 22/13 42 hv out 21/14 43 hv out 20/15 44 hv out 19/16 table 2-1: pin description pin # HV7022 description
HV7022 ds20005428a-page 8 ? 2016 microchip technology inc. 3.0 functional description table 3-1 provides functional information about HV7022. note 1: h = logic high level, l = logic low level, x = irrelevant, = high-to-low transition q1 = hv out 1, qn = hv out n, etc. * = dependent on previous state and whether an o/p or s/r command occurred. figure 3-1: hv out characteristics figure 3-2: input and output equivalent circuits table 3-1: functional table clk i/o relations inputs outputs clk dir data pol oe shift reg hv out data out o/p high x x h h h * h * o/p off x x l h h * high-z * o/p low x x h l h * l * o/p off x x l l h * high-z * o/p off x x x x l * all o/p high-z * load s/r, set dir lxxxqn qn+1 * q 34 hxxxqn qn-1 * q 1 no x x x x * no change no change i (ma) i (ma) volts 0 20 40 60 80 100 180 140 100 60 20 0 20 40 60 80 100 v pp > 40v v dd = 12v & 14v 180 140 100 60 20 volts (v pp - hv out ) temp = 25 o c v dd = 12v output n-channel characteristics through fet output p-channel characteristics through fet temp = 25 o c v dd = 14v v dd = 10v vdd data input gnd vpp gnd hv out logic inputs gnd data out logic data output high voltage outputs vdd
? 2016 microchip technology inc. ds20005428a-page 9 HV7022 figure 3-3: switching waveforms 50% 50% data out clk 50% 50% 50% t sud t hd v ih t wl t wh 1/f clk t tlh 90% 10% t thl 90% 10% t dlh t dhl data input v ih v il v oh v ol t suc 10% 90% t hc 50% 50% v ih v il 90% pol 10% t sup sup t hp 50% 50% t sue t he 10% 90% 10% 90% t onl t onh t offl t offh v ih v il oe hv out hv out high impedence high impedence v il v oh v ol v oh v ol v oh v ol v oh v ol v oh v ol v oh v ol hv out p-ch hv out n-ch hv out p-ch hv out n-ch
HV7022 ds20005428a-page 10 ? 2016 microchip technology inc. 4.0 packaging information 4.1 package marking information legend: xx...x product code or customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec ? designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or custom er-specific information. package may or not include the corporate logo. 3 e 3 e 44-lead plcc example xxxxxxxxx xxxxxxxxxxx yywwnnn xxxxxxxxxxx e 3 HV7022pj-c 1526343 e 3
? 2016 microchip technology inc. ds20005428a-page 11 HV7022 44-lead plcc package outline (pj) .653x.653in body, .180in height (max), .050in pitch symbol a a1 a2 b b1 d d1 e e1 e r dimension (inches) min .165 .090 .062 .013 .026 .685 .650 .685 .650 .050 bsc .025 nom .172 .105 - - - .690 .653 .690 .653 .035 max .180 .120 .083 .021 .036 ? .695 .656 .695 .656 .045 jedec registration ms-018, variation ac, issue a, june, 1993. ? this dimension differs from the jedec drawing. drawings not to scale. .150 max .048/.042 x 45 o 1 .075 max 6 40 d d1 e1 e top view horizontal side view view b a a2 a1 seating plane e b note 1 (index area) .056/.042 x 45 o .020max (3 places) .020 min vertical side view view b note 2 44 b1 base plane r notes: 1. $3lqlghqwl?hupxvwehorfdwhglqwkhlqgh[duhdlqglfdwhg 7kh3lqlghqwl?hufdqehdproghgpdunlghqwl?hudqhpehggh gphwdopdunhuru a printed indicator. 2. $fwxdovkdshriwklvihdwxuhpd\ydu\ note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging. note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging.
HV7022 ds20005428a-page 12 ? 2016 microchip technology inc. appendix a: revision history revision a (february 2016) ? updated supertex doc.# dsfp-HV7022c to microchip ds20005428a. ? changed part number from HV7022c to HV7022. ? removed 44-lead quad cerpac package. ? minor text changes throughout.
? 2016 microchip technology inc. ds20005428a-page 13 HV7022 product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: HV7022 = 34-channel symmetric row driver package: pj = 44-lead plcc version c = revision c environmental g = lead (pb)-free/rohs-compliant package media type: (blank) = 27/tube for pj package examples: a) HV7022pj-c-g 44-lead plcc package, 27/tube part no. x device x environmental x x package options media - - type - x version
ds20005428a-page 14 ? 2016 microchip technology inc. information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights unless otherwise stated. trademarks the microchip name and logo, the microchip logo, anyrate, dspic, flashflex, flexpwr, heldo, jukeblox, k ee l oq , k ee l oq logo, kleer, lancheck, link md, medialb, most, most logo, mplab, optolyzer, pic, picstart, pic32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. clockworks, the embedded control solutions company, ethersynch, hyper speed control, hyperlight load, intellimos, mtouch, precision edge, and quiet-wire are registered trademarks of microc hip technology incorporated in the u.s.a. analog-for-the-digital age, any capacitor, anyin, anyout, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dynamic average matching, dam, ecan, ethergreen, in-circuit serial programming, icsp, inter-chip connectivity, jitterblocker, kleernet, kleernet logo, miwi, motorbench, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem.net, pickit, pictail, puresilicon, righttouch logo, real ice, ripple blocker, serial quad i/o, sqi, superswitcher, superswitcher ii, total endurance, tsharc, usbcheck, varisense, viewspan, wiperlock, wireless dna, and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. gestic is a registered tradem arks of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2016, microchip technology incorporated, printed in the u.s.a., all rights reserved. isbn: 978-1-5224-0267-1 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microper ipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem by dnv == iso/ts 16949 ==
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