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product structure : silicon monolithic integrated circuit this product has no designed protection against radioactive rays . 1/ 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm c o., ltd. all rights reserved. 27.sep.2017 rev.001 tsz22111 ? 14 ? 001 www.rohm.com serial eeprom series standard eepro m i 2 c bus eeprom (2 - wire) br24g256 xxx - 5 series general description br24g 256-5 is a 256kbit serial eeprom of i 2 c bus interface . features ? all c ontrols a vailable by 2 p orts of s erial c lock ( scl) and s erial d ata ( sda ) ? 1.6v to 5.5v w ide l imit of o perating v ol tage, p ossible 1m hz o peration ? page write mode 64byte ? bit format 32 k x 8bit ? low current consumption ? p revention of miswriting ? wp ( write protect) function a dded ? p revention of miswriting at low voltage ? noise f ilter bu ilt in scl / sda pin ? initial d elivery s tate ff h key specification s ? write cycles : 4 m illion times (t a = 25c ) ? data retention : 200 y ears (t a =55 c ) ? write cycle time : 5ms ( max ) ? supply voltage : 1.6 v to 5.5v package s w(typ) x d(typ) x h(max) sop - j8 4.90mm x 6.00mm x 1.65mm tssop -b8 3 . 0 0mm x 6. 4 0mm x 1. 20m m msop 8 2 .90mm x 4 .00mm x 0 . 90m m applications o rdinary e lectronic e quipments (such as av equipment, oa equipment, telecommunication equipment, home electronic appliances, amusement eq uipment, etc.). typical application circuit fig ure 1 t ssop - b8 sop - j8 msop8 * * connect to vcc or gnd. there are pull - down elements inside the ic. if pin s are open, they are the same as when they are connected to gnd . v cc micro - controller figure 2. typical application circuit vcc wp sda a0 gnd scl a 1 a 2 0.1f datashee t
2 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series contents general description ................................ ................................ ................................ ................................ ................................ ........ 1 features ................................ ................................ ................................ ................................ ................................ .......................... 1 key specifications ................................ ................................ ................................ ................................ ................................ ........... 1 packages ................................ ................................ ................................ ................................ ................................ ........................ 1 applications ................................ ................................ ................................ ................................ ................................ .................... 1 typical application circuit ................................ ................................ ................................ ................................ ............................... 1 contents ................................ ................................ ................................ ................................ ................................ ......................... 2 pin configuration ................................ ................................ ................................ ................................ ................................ ............ 3 pin description ................................ ................................ ................................ ................................ ................................ ................ 3 block diagram ................................ ................................ ................................ ................................ ................................ ................ 3 absolute maximum ratings ................................ ................................ ................................ ................................ ............................ 4 thermal resistance ................................ ................................ ................................ ................................ ................................ ........ 4 operating conditions ................................ ................................ ................................ ................................ ................................ ...... 5 input / output capacitance ................................ ................................ ................................ ................................ ............................. 5 input impedance ................................ ................................ ................................ ................................ ................................ ............. 5 memory cell characteristics ................................ ................................ ................................ ................................ ........................... 5 electrical characteristics ................................ ................................ ................................ ................................ ................................ . 5 ac characteristics ................................ ................................ ................................ ................................ ................................ .......... 6 ac characteristics condition ................................ ................................ ................................ ................................ .......................... 6 input / output timing ................................ ................................ ................................ ................................ ................................ ...... 7 typical performance curves ................................ ................................ ................................ ................................ ........................... 8 i 2 c bus communication ................................ ................................ ................................ ................................ ............................... 17 write command ................................ ................................ ................................ ................................ ................................ ............ 18 read command ................................ ................................ ................................ ................................ ................................ ............ 19 method of reset ................................ ................................ ................................ ................................ ................................ ........... 20 acknowledge polling ................................ ................................ ................................ ................................ ................................ ..... 20 wp valid timing (write cancel) ................................ ................................ ................................ ................................ .................... 21 command cancel by start condition and stop condition ................................ ................................ ................................ ............. 21 application examples ................................ ................................ ................................ ................................ ................................ ... 22 caution on power - up conditions ................................ ................................ ................................ ................................ .................. 24 low voltage malfunction prevention function ................................ ................................ ................................ .............................. 24 i/o equivalence circuits ................................ ................................ ................................ ................................ ................................ 25 operational notes ................................ ................................ ................................ ................................ ................................ ......... 26 ordering informati on ................................ ................................ ................................ ................................ ................................ ..... 27 lineup ................................ ................................ ................................ ................................ ................................ ........................... 27 marking diagrams ................................ ................................ ................................ ................................ ................................ ......... 28 physical dimension and packi ng information ................................ ................................ ................................ ............................... 29 revision history ................................ ................................ ................................ ................................ ................................ ............ 32
3 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series pin con f iguration fig ure 3 . pin configuration pin descriptio n pin no. pin name input / output descriptio ns 1 a0 input slave address setting (note 1) 2 a1 input slave address setting (note 1) 3 a2 input slave address setting (note 1) 4 gnd - reference voltage of all input / output, 0v 5 sda input / output serial data input / serial data output (note 2 ) 6 sc l input serial clock input 7 wp input write protect pin (note 3 ) 8 v cc - c onnect the power source (note 1) connect to vcc or gnd. there are pull - down elements inside the ic . if pin s are open, they are the same as when they are connected to gnd . (note 2 ) sda is nmos op en drain, so it requires a pull - up resistor . (note 3) connect to vcc or gnd , or control to ' high ' level or ' low ' level . there are pull - down elements inside the ic. if this pin is open, this input is recognized as ' low ' . block diagra m fig ure 4 . block diagram (top view) vcc wp sda a0 a1 a2 gnd scl 7 8 6 5 3 4 2 1 8 7 6 5 4 3 2 1 sda scl wp v cc gnd a2 a1 a0 address decoder word address register data register control circuit high voltage generating circuit supply voltage detection 8bit ack start stop 15bit 256k bit eeprom a rray
4 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series absolut e maximum ratings parameter symbol rating unit remark supply voltage v cc - 0.3 to + 6.5 v ta=25 c input voltage / output voltage \ maximum junction temperature t jmax 150 c storage temperature range t stg - 6 5 to +150 c caution 1 : operating the ic over the absolute maximum ratings may damage the ic. the damage can either be a short circuit between pins o r an open circuit between pins and the internal circuitry. therefore, it is imp ortant to consider circuit protection measures, such as adding a fuse, in case the ic is operated over the absolute maximum ratings. caution 2 : should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip ma y result in deterioration of the properties of the chip. in case of exceeding this absolute maximum rating, design a pcb boards with thermal resistance taken into consideration by increasing board size and copper area so as not to exceed the maximum juncti on temperature rating. thermal resistance ( note 4 ) parameter symbol thermal resistance (typ) unit 1s ( note 6 ) 2s2p ( note 7 ) sop - j8 junction to ambient j a 149.3 76.9 c /w junction to top characterization parameter ( note 5 ) jt 18 11 c /w tssop - b8 ju nction to ambient j a 251.9 152.1 c /w junction to top characterization parameter ( note 5 ) jt 31 20 c /w msop8 junction to ambient j a 284.1 135.4 c /w junction to top characterization parameter ( note 5 ) jt 21 11 c /w (note 4 ) based on jesd 51 - 2a(sti ll - air) (note 5 ) the thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface of the component package. (note 6 ) using a pcb board based on jesd 51 - 3. layer number of measurement board material board size single fr - 4 114.3mm x 76.2mm x 1.57mmt top copper pattern thickness footprints and t races 70 m (note 7 ) using a pcb board based on jesd 51 - 7. layer number of measurement board material board size 4 layers fr - 4 114.3mm x 76.2mm x 1.6mmt top 2 internal layers bottom copper pattern thickness copper pattern thickness copper pattern thickness footprints and traces 70 m 74.2mm x 74.2mm 35 m 74.2mm x 74.2mm 70 m
5 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series operating conditions parameter symbol min typ max unit supply voltage v cc 1 .6 - 5 .5 v ambient operating temperature t a - 40 - + 8 5 c bypass capacitor c 0 .1 - - f input / output capacitance ( ta = 25 c , f=1mhz ) parameter symbol min typ max unit condition s input / output capaci tance (sda) (note 8 ) c i /o - - 8 pf v i/o =gnd in put capaci tance (scl, a0, a1, a2, wp) (note 8 ) c in - - 8 pf v in =gnd ( note 8 ) not 100% tested . input impedance ( u nless otherwise specified, ta = - 40 c to +85 c , v cc = 1.6v to 5.5v ) parameter symbol min typ max unit condition s input impedance 1 z ih 500 - - k 0.7v cc ? v in (a0, a1, a2, wp) period f rom start condition to stop condition input impedance 2 z il 30 - - k v in ? 0. 3 v cc (a0, a1, a2, wp) period f rom start condition to stop condition memory c ell c haracteristics (v cc =1.6v to 5.5v) parameter symbol min typ max unit conditions write cycles (note 9 ,10 ) - 4 ,000,000 - - t imes t a = 25 c data retention (note 9 ) - 20 0 - - y ears t a =55 c ( note 9 ) not 100% tested . ( note 10 ) the write cycles is defined for unit of 4 data bytes with the same address bits of w a14 to w a2 . electrical characteristics ( unless otherwise specified, ta = - 40 c to +85 c , v cc = 1.6v to 5.5v ) parameter symbol min typ max unit conditions input high voltage 1 v ih1 0.7v cc - v cc +1.0 v 1.7v ? v cc ? 5.5v input low voltage 1 v il1 - 0 .3 (note 1 1 ) - + 0.3v cc v 1.7v ? v cc ? 5.5v input high voltage 2 v ih 2 0.8v cc - v cc +1.0 v 1.6v ? v cc < 1.7v input low voltage 2 v il 2 - 0 .3 (note 1 1 ) - + 0. 2 v cc v 1.6v ? v cc < 1.7v output low voltage 1 v ol1 - - 0.4 v i ol = 3. 2ma , 2.5v ? v cc ? 5.5v (sda) output low voltage 2 v ol2 - - 0.2 v i ol =1.0ma , 1.6v ? v cc < 2 .5v (sda) input leakage current 1 i li 1 - 1 - +1 a v in =0 or v cc (a0, a1, a2, wp) standby mode in put leakage current 2 i li 2 - 1 - +1 a v in =0 to v cc ( scl ) output leakage current i lo - 1 - +1 a v out =0 to v cc (sda) supply current (write) i cc1 - - 2.0 m a v cc = 5 .5v, f sc l =1mhz, t wr = 5ms , byte w rite, p age w rite supply current (read) i cc2 - - 2.0 m a v cc =5 .5 v, f sc l =1mhz random r ead, c urrent r ead, s equential r ead standby current i sb - - 2. 5 a v cc =5.5v , sda, scl = v cc a0, a1, a2 , wp =gnd (note 1 1 ) when the pulse width is 50ns or less, it is - 1.0 v.
6 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series ac c haracteristics ( unless otherwise specified, ta = - 40 c to +85 c , v cc = 1.6v to 5.5v ) parameter symbol min typ max unit clock frequency f scl - - 1 m hz data clock high period t high 260 - - ns data clock low period t low 500 - - ns sda, scl ( input ) rise time ( note 1 2 ) t r - - 120 ns sda, scl ( input ) fall time ( note 1 2 ) t f1 - - 120 ns sda ( output ) fall time ( note 1 2 ) t f2 - - 120 n s start condition hold ti me t hd:sta 250 - - ns start condition setup time t su:sta 200 - - n s input data hold time t hd:dat 0 - - n s input data setup time t su:dat 50 - - ns output data delay time t pd 50 - 450 n s output data hold time t dh 50 - - n s stop condition setup time t su :sto 250 - - n s bus free time t buf 500 - - n s write cycle time t wr - - 5 ms noise suppression time ( scl , sda ) t i - - 50 ns wp hold time t hd:wp 1.0 - - v wp setup time t su:wp 0.1 - - v wp high period t high:wp 1.0 - - v (note 1 2 ) not 100% tested . ac c haracteristics condition parameter symbol condition s unit load capacitance c l 100 pf i nput rise time t r 20 n s i nput fall time t f 1 20 n s input voltage v il /v ih 0.2v cc /0.8v cc v input / output data timing reference level - 0.3v cc /0.7v cc v
7 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series input / ou tpu t timing |,qsxwuhdgdwwkhulvhhgjhri6&/ |'dwdrxwsxwlqv\qfzlwkwkhidoori6&/ fig ure 5 - (a) . input / output timing fig ure 5 - (b) . start - stop bit timing fig ure 5 - (c) . write cycle timing fig ure 5 - (d) . wp timing at write exec ution fig ure 5 - (e) . wp timing at write cancel d0 ack t wr write data (n - th address) start condition stop condition 70% 70% sda scl 70% 70% t su:sta t hd:sta start bit t su:sto stop bit 30% 30% 70% 70% sda scl data(1) d0 d1 ack data(n) ack t high:wp 70% 70% t wr 70% sda scl wp data(1) data(n) ack t wr 70% 70% stop condition t hd:wp t su:wp 30% 70% sda scl wp scl sda (input) sda (output) t r t f1 t high t su:dat t low t hd:dat t dh t pd t buf t hd:sta 70% 30% 70% 70% 30% 70% 70% 30% 30% 70% 70% 30% 70% 70% 70% 70% 30% 30% 30% 30% t f2
8 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series t ypical performance curves figure 6 . input high voltage 1 ,2 vs supply voltage figure 7 . input low voltage 1 ,2 vs supply voltage figure 8 . output low voltage 1 vs output l ow current ( v cc =2.5v ) figure 9 . output low voltage 2 vs output low current ( v cc =1.6v) 0.0 0.2 0.4 0.6 0.8 1.0 0 1 2 3 4 5 6 output low current : i ol [ma] output low voltage 1 : v ol1 [v] spec ta=-40c ta=+25c ta=+85c 0 1 2 3 4 5 6 0 1 2 3 4 5 6 supply voltage : v cc [v] input high voltage 1,2 : v ih1,2 [v] spec ta=-40c ta=+25c ta=+85c 0.0 0.2 0.4 0.6 0.8 1.0 0 1 2 3 4 5 6 output low current : i ol [ma] output low voltage 2 : v ol2 [v] spec ta=-40c ta=+25c ta=+85c 0 1 2 3 4 5 6 0 1 2 3 4 5 6 supply voltage : v cc [v] input low voltage 1,2 : v il1,2 [v] spec ta=-40c ta=+25c ta=+85c
9 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series t ypical performance curves - continued figure 10 . input leakage current 1 vs input voltage ( standby mode ) figure 11 . input leakage current 2 vs inp ut voltage figure 1 2 . output leakage current vs output voltage figure 1 3 . supply current (write) vs supply voltage 0.0 0.5 1.0 1.5 2.0 2.5 0 1 2 3 4 5 6 supply voltage : v cc [v] supply current (write) : i cc1 [ma] spec ta=-40c ta=+25c ta=+85c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 1 2 3 4 5 6 input voltage : v in [v] input leakage current 2 : i li2 [a] spec ta=-40c ta=+25c ta=+85c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 1 2 3 4 5 6 output voltage : v out [v] output leakage current : i lo [a] spec ta=-40c ta=+25c ta=+85c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 1 2 3 4 5 6 input voltage : v in [v] input leakage current 1 : i li1 [a] spec ta=-40c ta=+25c ta=+85c
10 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series t ypical performance curves - continued figure 1 4 . supply current (read) vs supply voltage ( f scl =1mhz ) figure 1 5 . standby current vs supply voltage figure 1 6 . clock frequency vs supply voltage figure 1 7 . data clock high period vs supply voltage 0.0 0.5 1.0 1.5 2.0 2.5 0 1 2 3 4 5 6 supply voltage : v cc [v] standby current : i sb [a] spec ta=-40c ta=+25c ta=+85c 0.0 0.5 1.0 1.5 2.0 2.5 0 1 2 3 4 5 6 supply voltage : v cc [v] supply current (read) : i cc2 [ma] spec ta=-40c ta=+25c ta=+85c 0.1 1.0 10.0 0 1 2 3 4 5 6 supply voltage : v cc [v] clock frequency : f scl [mhz] spec ta=-40c ta=+25c ta=+85c 0 50 100 150 200 250 300 0 1 2 3 4 5 6 supply voltage : v cc [v] data clock high period : t high [ns] spec ta=-40c ta=+25c ta=+85c
11 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series t ypical performance curves - continued figure 1 8 . data clock low period vs supply voltage figure 1 9 . sda (output) fall time vs supply voltage figure 20 . start condition hold time vs supply voltage figure 2 1 . start condition setup time vs supply voltage 0 20 40 60 80 100 120 140 0 1 2 3 4 5 6 supply voltage : v cc [v] sda (output) fall time : t f2 [ns] spec ta=-40c ta=+25c ta=+85c -50 0 50 100 150 200 250 0 1 2 3 4 5 6 supply voltage : v cc [v] start condition setup time : t su:sta [ns] spec ta=-40c ta=+25c ta=+85c 0 100 200 300 400 500 600 0 1 2 3 4 5 6 supply voltage : v cc [v] data clock low period : t low [ns] spec ta=-40c ta=+25c ta=+85c 0 50 100 150 200 250 300 0 1 2 3 4 5 6 supply voltage : v cc [v] start condition hold time : t hd:sta [ns] spec ta=-40c ta=+25c ta=+85c
12 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series t ypical performance curves - continued figure 2 2 . input dat a hold time vs supply voltage ( sda ' low ' to ' high ' ) figure 2 3 . input data hold time vs supply voltage ( sda ' high ' to ' low ' ) figure 2 4 . input data setup time vs supply voltage ( sda ' low ' to ' high ' ) figure 2 5 . input data setup time vs s upply voltage ( sda ' high ' to ' low ' ) -150 -100 -50 0 50 0 1 2 3 4 5 6 supply voltage : v cc [v] input data hold time : t hd:dat [ns] spec ta=-40c ta=+25c ta=+85c 0 10 20 30 40 50 60 0 1 2 3 4 5 6 supply voltage : v cc [v] input data setup time : t su:dat [ns] spec ta=-40c ta=+25c ta=+85c -150 -100 -50 0 50 0 1 2 3 4 5 6 supply voltage : v cc [v] input data hold time : t hd:dat [ns] spec ta=-40c ta=+25c ta=+85c 0 10 20 30 40 50 60 0 1 2 3 4 5 6 supply voltage : v cc [v] input data setup time : t su:dat [ns] spec ta=-40c ta=+25c ta=+85c
13 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series t ypical performance curves - continued figure 2 6 . output data delay time vs supply voltage ( sda ' low ' to ' high ' ) figure 2 7 . output data delay time vs supply voltage ( sda ' high ' to ' low ' ) figure 2 8 . output data hold time vs supply voltage ( sda ' low ' to ' high ' ) figure 2 9 . output data hold time vs supply voltage ( sda ' high ' to ' low ' ) 0 100 200 300 400 500 0 1 2 3 4 5 6 supply voltage : v cc [v] output data hold time : t dh [ns] spec ta=-40c ta=+25c ta=+85c 0 100 200 300 400 500 0 1 2 3 4 5 6 supply voltage : v cc [v] output data delay time : t pd [ns] spec spec ta=-40c ta=+25c ta=+85c 0 100 200 300 400 500 0 1 2 3 4 5 6 supply voltage : v cc [v] output data hold time : t dh [ns] spec ta=-40c ta=+25c ta=+85c 0 100 200 300 400 500 0 1 2 3 4 5 6 supply voltage : v cc [v] output data delay time : t pd [ns] spec spec ta=-40c ta=+25c ta=+85c
14 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series t ypical performance curves - continued figure 30 . stop condition setup time vs supply voltage figure 3 1 . bus free time vs supply voltage figure 3 2 . write cycle time vs supply voltage figure 3 3 . noise suppression time vs supply voltage ( s cl ' high ' ) 0 50 100 150 200 0 1 2 3 4 5 6 supply voltage : v cc [v] noise suppression time : t i [ns] spec ta=-40c ta=+25c ta=+85c 0 1 2 3 4 5 6 0 1 2 3 4 5 6 supply voltage : v cc [v] write cycle time : t wr [ms] spec ta=-40c ta=+25c ta=+85c 0 50 100 150 200 250 300 0 1 2 3 4 5 6 supply voltage : v cc [v] stop condition setup time : t su:sto [ns] spec ta=-40c ta=+25c ta=+85c 0 100 200 300 400 500 600 0 1 2 3 4 5 6 supply voltage : v cc [v] bus free time : t buf [ns] spec ta=-40c ta=+25c ta=+85c
15 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series t ypical performance curves - continued figure 3 4 . noise suppression time vs supply voltage ( s cl ' low ' ) figure 3 5 . noise suppression time vs supply voltage ( s da ' high ' ) figure 3 6 . noise suppression time vs supply voltage ( s da ' low ' ) figure 3 7 . wp hold time vs supply voltage 0 50 100 150 200 0 1 2 3 4 5 6 supply voltage : v cc [v] noise suppression time : t i [ns] spec ta=-40c ta=+25c ta=+85c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 1 2 3 4 5 6 supply voltage : v cc [v] wp hold time : t hd:wp [s] spec ta=-40c ta=+25c ta=+85c 0 50 100 150 200 0 1 2 3 4 5 6 supply voltage : v cc [v] noise suppression time : t i [ns] spec ta=-40c ta=+25c ta=+85c 0 50 100 150 200 0 1 2 3 4 5 6 supply voltage : v cc [v] noise suppression time : t i [ns] spec ta=-40c ta=+25c ta=+85c
16 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reserved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series t ypical performance curves - c ontinued figure 3 8 . wp setup time vs supply voltage figure 3 9 . wp high period vs supply voltage -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 0.1 0.2 0 1 2 3 4 5 6 supply voltage : v cc [v] wp setup time : t su:wp [s] spec ta=-40c ta=+25c ta=+85c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 1 2 3 4 5 6 supply voltage : v cc [v] wp high period : t high:wp [s] spec ta=-40c ta=+25c ta=+85c
17 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series i 2 c bus communication 1. i 2 c bus data communication (1) i 2 c bus data communication begins with start condition input, and ends at the stop conditi on input . (2) the data is always 8bit long, and acknowledge is always required after each byte. (3) i 2 c bus data communication with several devices connected to the bus is possible by connect ing with 2 communication lines : serial data (sda) and serial clock (scl) . (4) among the devices, there is a 3 master that generates clock and control communication start and end . the rest become 3 slave which are controlled by an address peculiar to each device . eeprom lvd3 slave . (5) t he device that outputs data to the bus during d ata communication is called 3 transmitter dqg wkh ghylfh wkdw receives data is called 3 receiver . fig ure 40 . data transfer timing 2. start condition (start bit recognition ) (1) before executing each command, start condition (start bit) where sda goe s down from ' high ' to ' low ' w hile scl is ' high ' is necessary . (2) this ic always detects whether sda and scl are in start condition (start bit) or not, therefore, unless this condition is satisfied, any command cannot be executed . 3. stop condition (stop bit recognition ) each command can be ended by a stop condition (stop bit) where sda goes from ' low ' to ' high ' while scl is ' high '. 4. acknowledge (ack) signal (1) this acknowledge (ack) signal is a software rule to in dicate whether or not data transfer was perfor med normally . in both master and slave communication , the device at the transmitter (sending) side releases the bus after output ting 8 - bit data . when a slave address of a write command or a read command is input , microcontroller is the device at the transm itter side. when data output for a read command, this ic is the d evice at the transmitter side . (2) the device on the receiver (receiving) side sets sda ' low ' during the 9 th clock cycle, and outputs an ack signal showing that the 8 - bit data has been received . when a slave address of a write command or a read command is input , this ic is the device at the receiver side. when data output for a read command, microcontroller is the device at the receiver side . (3) this ic, after recognizing start condition and slave ad dress (8bit), outputs ack signal ' low ' . (4) each write operation outputs ack signal ' low ' every 8bit data ( a word address and write data) reception . (5) during read operation , this ic outputs 8bit data (read data) and detects the ack signal ' low ' . when ack signal is detected, and no stop condition is sent from the master ( microcontroller ) side, this ic will continue to output data . if the ack signal is not detected, this ic stops data transfer, recognizes the stop c o ndition (stop bit), and ends the read operation. then this ic becomes ready for another transmission . 5. device addressing (1) from the master, input the slave address after the start condition . (2) the significant 4 bits of slave address are used for recognizing a device type. the device code of this ic is fi xed to ' 1010 ' . (3) the n ext slave addresses (a2 a1 a0 --- device address) are for selecting devices, and multiple devices can be used on a same bus according to the number of device addresses. it is possible to select and operate only device whose ' v cc ' ' gnd ' input conditions of the a0, a1, a2 pin match the 'high' ' low ' input conditions of slave address sent from the master . (4) the least significant bit ( --- read/ ) of slave address is used for designating write or rea d operation , and is as shown below. setting to 0 ------- write (setting 0 to word address setting of random read) setting to 1 ------- read slave address maximum number of c onnected buses 1 0 1 0 a2 a 1 a0 8 w / r write 8 9 8 9 8 9 s p condition condition ack stop ack data data address start r/w ack 1-7 sda scl 1-7 1-7 w / r w / r
18 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series write command 1. write (1) arbitrary data can be written to eeprom. when writing only 1 byte, b yte w rite is normally used, and when writing continuous data of 2 bytes or more, simultaneous write is possible by p age w rite. u p to 64 arbitrary bytes can be written. fig ure 4 1 . byte write fig ure 4 2 . page write (2) during internal write execution, all input commands are ignored, therefore ack is not returned . (3) data is written to the address designated by word address ( n - th address) (4) by issuing stop bit after 8bit data input, internal write to memory cell starts. (5) when internal write is started, command is not accepted for t wr (5ms at maximum). (6) using page write, it is possible to write one lump sum up to 64 bytes . when dat a of more than 64 bytes is sent, the excess of the bytes is overwritten the data sent already from first byte . (refer to "internal a ddress i ncrement") . (7) as for page write where 2 or more bytes of data is intended to be written , after the word address are de signated arbitrarily, only the value of 6 least significant bits in the address is incremented internally, so that data up to 64 bytes of memory only can be written. (8) when v cc is turned off during t wr , data at the designated address is not guaranteed, pleas e write it agai n . 1 page= 64 bytes, but the write time of page write is 5ms at maximum for 64 byte b atch write . it is not equal to 5ms at maximum x 64 byte= 32 0ms( m ax) . 2. internal address increment page write mode 3. write protect (wp) function when wp p in is set at v cc ( ' h igh ' level), data rewrite of all addresses is prohibited. when it is set gnd ( ' low ' level), data rewrite of all address is enabled. be sure to connect this pin to v cc or gnd, or control it to ' h igh ' level or ' low ' lev el. if wp pin is open, th is input is recognized as ' low ' . in case of us ing it as rom, by connect it to pull up or v cc , write error can be prevented. at extremely low voltage at power on/off, by setting the wp pin ' h igh ' , write error can be prevented . for example, when s tart ing from address 3eh, then , 3eh : 3fh : 00h : 01h . p lease take note that it will be incremented . * don't care bit * don't care bit d0 d7 ack 2nd word address(n) wa 0 wa 13 wa 12 wa 11 a2 wa 14 d0 r/w data(n) *3eh 3e in hexadecimal, therefore, 00111110 becomes a binary number. a1 a2 wa 14 1 1 0 0 write r/w 1st word address data slave address a0 d0 sda line wa 1 3 wa 1 2 wa 1 1 wa 0 2nd word address d7 wa7 wa6 wa5 wa4 wa3 wa2 wa1 wa0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 increment 0 0 0 0 0 0 1 0 0 0 1 1 1 1 1 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 3 eh significant bit is fixed. no digit up
19 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series 4. ecc function this ic has ecc bits for error correction every 4 bytes with the same address bits of wa14 to wa2. in read operation, if 1 bit of error data exists in 4 bytes , this error data will be corrected by the ecc function and outputs the correct data . in write operation , o nly 1 byte of data is to be written, 4 bytes of data will be written as one group with the same address bits of wa14 to wa2 ( the data to be written in the remaining 3 bytes will be the same as its previous stored data ). therefore, th e number of w rite c ycle times is guaranteed every 4 bytes with the same address bits of wa14 to wa2. figure 4 3 . example of data write and number of remaining write cycles read command r ead the eeprom data . r ead has a random read and a current read functions . random read is commonly used in commands that specify addresses and read data. the current read is a command to read data of the internal address register without specifying an addre ss. in both read functions , sequential read is possible where the next address data can be read in succession . figure 4 4 . ran dom read figure 4 5 . curr ent read figure 4 6 . se quential read (in the case of current read) (1) in random read, data of designated word address can be read. (2) when the command just before current read is random read or current read (each including sequential read), if last read address is (n) - th, data of the incremented address (n+1) - th is output ted . (3) when ack signal ' low ' after d0 is detected, and stop condition is not sent from master (microcontroller) side, the next address data can be read in succession. (4) read is ended by stop condition where ' h igh ' is input to ack signal after d0 and sda signal goes from ' low ' to ' h igh ' while at scl signal is ' h igh ' . (5) when ' low ' is input at ack signal after d0 without ' h igh ' i nput , sequential read gets in, and the next data is output ted . therefore, read command cannot be ended. to end read command, be sure to input ' h igh ' to ack sign al after d0, and the stop condition where sda goes from ' low ' to ' h igh ' while scl signal is ' h igh ' . (6) sequential read is ended by stop condition where ' h igh ' is input to ack signal after arbitrary d0 and sda is gose from ' low ' to ' h igh ' while scl signal is ' h igh ' . address 0000h 0001h 0002h 0003h 0004h 0005h number of remaining write cycles 400m times 400m times 400m times 400m times 400m times 400m times address 0000h 0001h 0002h 0003h 0004h 0005h number of remaining write cycles 300m times 300m times 300m times 300m times 400m times 400m times * don ? t care bit initial d elivery s tate after 100m times using byte write in address 0000h even if o nly 1 byte of data is to be written in address 0000h , the addresses 0000h to 0003h are written as one group . therefore , the number of write cycle times at addresses 0001h to 0003h decreases . start stop sda line ack data(n) ack slave address 1 0 0 0 1 a0 a1 a2 d0 d7 r/w read write start stop 1st word address ? sda line data(n) slave address 1 0 0 0 1 0 a0 a1 a2 wa 14 d7 d0 2nd word address ? ack slave address 1 0 0 0 1 0 a2 a1 read a0 wa 0 w a 13 wa 12 wa 11 * ack ack ack ack start r/w r/w read start r/w ack stop data(n) sda line ack ack data(n+x) ack slave address 1 0 0 0 1 0 a0 a1 a2 d0 d7 d0 d7
20 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series method of r eset this ic can be reset by sending the stop condition after executing the start condition. please execute it when it is necessary to reset after p ower - u p, or during command input timing . however, the start condition and stop conditio n could not be applied because ' high ' input of microcontroller and ' low ' output of eeprom collide when eeprom is ' low ' in ack output section and data reading. in that case, input scl clock until sda bus is released ( ' high ' by pull - up). after confirming that sda is released, send the stop condition after inputting the start condition. i f sda bus could not be confirmed whether released or not in microcontroller , input the software reset . if software reset is run, eeprom can be reset without confirming the sda s tate because sda bus is always released in either of the two start conditions. the method of reset is shown in the table below. status of sda method of reset sda bus released ( ' high ' by pull - up) send the stop condition after executing the start condition . ' low ' input scl clock until sda bus is released , confirm that sda bus is released, and send the stop condition after inputting start condition. microcontroller cannot confirm sda bus is released or not u sing the software reset shown in the figure below , the start condition can be always excuted . within the dummy clock input area, the sda bus is needed to be release d ( ' h igh' by pull - up). for normal commands, start with the start condition input. fig ure 4 7 . input timing of software reset acknowledge p olling during internal write execution, all input commands are ignored, therefore ack is not returned . during internal automatic write execution after write input, next command (slave address) is s ent . if the first ack signal sends back ' low ' , then it means end of write operation , else ' h igh ' is returned, which means writing is still in progress . by the use of acknowledge polling, next command can be executed without waiting for t wr = 5ms. to write continuously, slave address with = 0, then to carry out current read after write, slave address with = 1 is sent . i f ack signal sends back ' low ' , then execute word address input and data output and so forth. fig ure 4 8 . the ca se of continuous write by acknowledge polling scl 2 1 8 9 dummy clock 9 start start sda normal command normal command st op slave address word address start first write comman d slave address slave address slave address data w rite command t wr t wr second write command st op start start start st op ack ack = high = high ack = high start ack =low ack =low ack =low during internal write, ack = high is returned. after completion of inte rnal write, ack=low is returned , so input next word address and data in succession. w / r
21 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series wp v alid t iming ( w rite c ancel) wp is usually fixed to ' h igh ' or ' low ' , but when wp is controlled and used for writ e cancel and so on , pay attention to the following wp valid timing. write can be cancelled by setting wp= ' h igh ' while it is executed and in wp valid area . in both byte write and page write, the area from the first start condition of command to the rise of clock which take in d0 of data(in page write, the first byte data) is the wp invalid area. wp input in this area becomes don't care ? . the area from the rise of clock to take in d0 to the stop condition input is the wp valid area. furthermore , after the ex ecution of forced end by wp, the ic enters standby status . fig ure 4 9 . w p valid timing command c ancel by s tart c ondition and s top c ondition during co mmand input, by continuously inputting start condition and stop condition, command can be cancelled. however, with in ack output area and during data read, sda bus may output ' low ' . i n this case, start condition and stop condition cannot be input ted , so res et is not available. therefore, execution of reset is needed referring method of reset ? . w hen command is cancelled by start - stop condition during random read, sequential read, or current read, internal setting address is not determined . t herefore, it is n ot possible to carry out current read in succession. t o carry out read in succession, carry out random read . fig ure 50 . the case of cancel by start , stop condition during slave address input rise of d0 ta k en clock scl d0 ack enlarged view scl sda ack d0 rise of sda sda wp wp invalid area wp valid area if wp= ' high ' in this area, data is not written slave address d7 d6 d5 d4 d3 d2 d1 d0 data t wr sda d1 word address scl sda 1 1 0 0 start condition stop condition enlarged view wp invalid area start stop ack =low ack =low ack =low ack =low
22 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series application examples 1. i/o peripheral circuit (1) pull - up resistance of sda pin sda is nmos op en drain, so it requires a pull - up resistor. as for this resistor value (r pu ), select an appropriate value from microcontroller v il , i l , and v ol - i ol characteristics of this ic. if r pu is large, operating frequency is limited. the smaller the r pu increases the supply current . (2) maximum value of r pu the maximum value of r pu is determined by the following factors. (a) sda rise time to be determined by the capacitance (c bus ) of bus line of sda and r pu should be t r or lower . furthermore, ac timing should be satisfied even when sda rise time is slow . (b) the bus electric potential ] ol pu ol cc i r v v ? - ol ol cc pu i v v r - ? 6 pu 10 10 3 7 0 3 8 0 r - - ? ? ? ? . . -3 - 10 2 3 4 0 3 r pu ? ? . . ih cc pu l cc v v 0.2 r i v ? - - l ih cc pu i v v 8 0 r - . ? 5 812 . ? ] k 30 ?
23 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series 2. c autions on m icrocontroller c onnectio n ( 1 ) r s in i 2 c bus, it is recommended that sda port is of open drain input/output. however, when using cmos input/ output of tri state to sd a port, insert a series resistance r s between the pull - up resistor r pu and the sda pin of eeprom. this is to control over current that may occur when pmos of the microcontroller and nmos of eeprom are turned on simultaneously. r s also plays the role of pro tecting the sda pin against surge. therefore, even when sda port is open drain input/output, r s can be used . ( 2 ) maximum value of r s the maximum value of r s is determined by the following relations. (a) sda rise time to be determined by the capacitance (c bus ) of bus line of sda and r pu should be t r or lower . furthermore, ac timing should be satisfied even when sda rise time is slow . (b) the bus electric potential v il =0.3v cc v ol =0.4v r pu =20k ( 3 ) minimum value of r s the minimum value of r s is determined by over current at bus collision. when over current flows, noises in power source line and instantaneous power failure of power source may occur. when all owable over current is defined as i, the following relation must be satisfied. determine the allowable current in consideration of the impedance of power source line in set and so forth . ex. ) v cc =3v i=10ma fig ure 5 2. i/ o circuit diagram figure 5 4. i/o circuit diagram figure 5 5. i/o ci rcuit diagram r pu microcontroller r s eeprom v cc figure 5 3. i/o collision timing over current flows to sda line by ' high ' output of microcontroller and ' l ow' output of eeprom . ack ' l ow ' outp ut of eeprom ' high ' output of microcontroller scl sda ] il cc ol s pu s ol cc v v 1 0 v r r r v v ? ? ? ? ? . ) ( - pu il cc cc ol il s r v v 1 1 v 1 0 v v r ? ? - - - . . ] k 67 1 . ? 3 s 10 20 3 3 0 3 1 1 3 1 0 4 0 3 3 0 r ? ? ? ? ? ? ? . . . . . - - - i v rs cc ? ? microcontroller eeprom 'l ow ' output r s r pu 'h igh ' output over current i v cc i r v s cc ? r pu micro controller r s eeprom i ol a b us line capacit ance c bus v ol v cc v il 300 ? -3 10 10 3 rs ? ?
24 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series caution on power - up conditions at power - up , as the v cc ulvhvwkh,&?vlqwhuqdoflufxlwvpd\jrwkurxjkxqvwdeohorzyrowdjhduhdpdnlqjwkh,&?vlqwhuqdo circuit not compl etely reset, hence, malfunction may occur. to prevent it , this ic is equipped with power - on reset (p . o . r . ) circuit and lvcc circuit. in order to ensure its operation, observe the following three conditions at power - up. 1. set sda = ' h igh' and scl = ' l ow' or ' h igh' . 2. in order to operate the p.o.r. function, p lease turn on the power supply so as to satisfy the power - up conditions below. in order to start its normal operation, set the power supply rise so that the supply voltage constantly increases from vbot to v cc level. also, do not input commands during t init from power supply stabilized. figure 5 6 . r ise waveform diagram 3. set sda and scl so as not to be 'hi - z'. when the above conditions 1 and 2 cannot be observed, p l ease take the following measures . be sure to observe c ondition 3. ( 1) w hen the above condition 1 cannot be observed and sda becomes ' l ow' at power - up . : control scl and sda as shown below, and set both scl and sda to ' h igh' . (2 ) in the case when the above condition 2 cannot be observed. : s et wp = ' high ' at power - up and then execute reset . (3 ) in the case when the above conditions 1 and 2 cannot be observed. : s et wp = ' high ' at power - up, perform (1) and then (2). l ow v oltage m alfunction p revention f unction lvcc circuit prevents data rewrite operation at low power, and prevents write error . at lvcc voltage (typ = 1.2v) or below, data rewrite is prevented . power - up conditions parameter symbol min typ max unit supply voltage at power off v bot - - 0.3 v power off time (no te 13 ) t poff 1 - - ms initialize time (note 13 ) t init 0.1 - - ms supply voltage ris ing time (note 1 3 ) t r :vcc 0.001 - 100 ms (note 1 3 ) not 100% tested figure 5 7 . when scl= ' h igh' and sda= ' l ow' figure 5 8 . when s cl=' l ow' and sda=' l ow' 0v v bot v cc v cc (min) t poff t r:vcc t init command start t low t su:dat t h d:dat t in i t scl v cc sda t su:dat t in i t v cc scl sda
25 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series i/o equivalen ce c ircuit s 1 . i nput (a0, a1, a2, wp) fig ure 5 9 . i nput pin circuit diagram (a0, a1, a2, wp) 2 . i nput ( scl ) fig ure 60 . i nput pin circuit diagram (scl) 3 . i nput / output ( sda ) fig ure 61 . i nput / output pin circuit diagram (sda) p ull - down elements
26 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series operational notes 1. r everse c onnection of p ower s uppl y connecting the power supply in reverse polarity can damage the ic. take pr ecautions against reverse polarity when connecting the power supply , such as mounting an external diode between the power supply and the ic ? s power supply pin s . 2. power s upply l ines design the pcb layout pattern to provide low impedance supply lines. furthermore, connect a capacitor to ground at all power suppl y pins . consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors . 3. g round voltage ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition . 4. g round w iring p attern when using both small - signal and large - current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small - signal ground cause d by large currents. also ensure that the ground traces of external components do not cause variations on the ground voltage. the ground lines must be as short and thick as possible to reduce line impedance . 5. o perating c onditions the function and operation of the ic are guaranteed within the range specified by the operating conditions. the c haracteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics . 6. inrush current when power is first supplied to t he ic, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the ic has more than one power supply. therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections . 7. operation u nder s trong e lectromagnetic f ield operating the ic in the presence of a strong electromagnetic field may cause the ic to malfunction . 8. testing on a pplicatio n b oards when testing the ic on an application board, connecting a capacitor directly to a low - impedance output pin may vxemhfwwkh,&wrvwuhvv$ozd\vglvfkdujhfdsdflwruvfrpsohwho\diwhuhdfksurfhvvruvwhs7kh,&?vsrzhuvxsso\ should always be turn ed off completely before connecting or removing it from the test setup during the inspection process. to prevent damage from static discharge, ground the ic during assembly and use similar precautions during transport and storage . 9. inter - pin short and moun ting errors ensure that the direction and position are correct when mounting the ic on the pcb. incorrect mounting may result in damaging the ic. avoid nearby pins being shorted to each other especially to ground , power supply and output pin . inter - pin sho rts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few . 10. u nused input pin s input pin s of an ic are often connected to the gate of a mos transistor. the gate has extremely high impedance and extremely low capacitance. if left unconnected, the electric field from the outside can easily charge it. the small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the ic. so unless otherwise specified, unused input pin s should be connected to the power supply or ground line . 11. regard ing the i nput p in of the ic in the construction of this ic, p - n junctions are inevitably formed creating parasitic diodes or transistors. the operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower than the ground voltage should be avoided. furthermore, do not apply a voltage to the input pin s when no power supply voltage is applied to the ic. even if the power supply voltage is a pplied, make sure that the input pin s have voltages within the values specified in the electrical characteristics of this ic . 12. ceramic capacitor when using a ceramic capacitor, determine a capacitance value considering the change of capacitance with temper ature and the decrease in nominal capacitance due to dc bias and others .
27 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series ordering informatio n b r 2 4 g 2 5 6 x x x - 5 x x bus type 24 : i 2 c a mbient operating temperature / supply voltage - 40 c ~+85 c / 1.6v~ 5.5v c apacity 256 =256k b it p ackage fj : sop - j8 fvt : tssop - b8 fvm : msop8 p rocess code packaging and f orming s pecificati on e2 : embossed tape and reel (sop - j8, tssop - b8) tr : embossed tape and reel (msop8) lineup p ackage orderable part number type quantity sop - j8 reel of 25 00 br24g 256f j - 5e2 tssop - b8 reel of 3000 br24g 256fvt - 5e2 msop8 reel of 30 00 br24g 256f vm - 5 tr
28 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series marking diagram s tssop - b8(top view) 4 g 2 5 a part number marking lot number pin 1 mark sop - j8(top view) 4 g 2 5 a part number marking lot number pin 1 mark msop8(top view) 4 g j part number marking lot number pin 1 m ark 5
29 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series p hysical dimension and packing information package name sop - j8
30 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series p hysical dimension and packing informat ion - continued package name tssop - b8
31 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series p hysical dimension and packing information - continued package name msop8
32 / 32 tsz02201 - 0ggg0g100890 - 1 - 2 ? 20 1 7 rohm co., ltd. all rights reser ved. 27.sep.2017 rev.001 www.rohm.com tsz22111 ? 15 ? 001 br24g256 xxx - 5 series revision history date revision changes 2 7 . sep .201 7 001 new release
notice - p ga - e rev.00 3 ? 201 5 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our p roducts are designed and manufactured for application in ordinary electronic equipment s ( such as av equipment, oa equipment, telecommunication equipment, home elec tronic appliances, amusement equipment, etc.). if you intend to use our products in devices requiring extremely high reliability ( such as medical equipment ( n ote 1 ) , transport equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, f uel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life , bodily injury or serious damage to property ( specific applications ) , please consult with the rohm sales represe ntative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any rohm s products for specific appl ications. ( n ote1) m edical e quipment c lassification of the s pecific applications japan usa eu china class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsi bilities, adequate safety measures including but not limited to fail - safe design against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our p roducts are designed and manufactured for use under standard conditions a nd not under any special or extraordinary environments or conditions, as exemplified below . accordingly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any rohms p roduct s under any special or extraordinary environments or conditions . if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent v erification and confirmation of product performance, reliability, etc, pri or to use, must be necessary : [a] use of our products in any types of liquid, including water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the p roducts are exposed to direct sunlight or dust [c] use of our prod ucts in places where the p roducts are exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the p roducts are exposed to static electricity or electromagnetic waves [e] use of our products in p roximity to heat - producing components, plastic cords, or other flammable items [f] s ealing or coating our p roducts with resin or other coating materials [g] use of our products without cleaning residue of flux (even if you use no - clean type fluxes, cleanin g residue of flux is recommended); or washing our products by using water or water - soluble cleaning agents for cleaning residue after soldering [h] use of the p roducts in places subject to dew condensation 4 . the p roducts are not subject to radiation - proo f design . 5 . please verify and confirm characteristics of the final or mounted products in using the products. 6 . in particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of pe rformance characteristics after on - board mounting is strongly recommended. avoid applying power exceeding normal rated power; exceeding the power rating under steady - state loading condition may negatively affect product performance and reliability. 7 . de - rate power dissipation d epending on a mbient temperature . when used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8 . confirm that operation temperature is within the specified range described in the product specification. 9 . rohm shall not be in any way responsible or liable for f ailure induced under devian t condition from what is defined in this document . precaution for mounting / circuit board design 1. when a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used on a surface - mount products, the flow soldering method must be used on a through hole mount products. i f the flow soldering method is preferred on a surface - mount products , please consult with the roh m representative in advance. for details , please refer to rohm mounting specification
notice - p ga - e rev.00 3 ? 201 5 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, please allow a sufficient margin considerin g variations of the characteristics of the p roducts and external components, including transient characteristics, as well as static characteristics. 2. you agree that application notes, reference designs, and associated data and information contained in t his document are presented only as guidance for products use . therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in t his document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this p roduct is e lectrostatic sensitive product, which may be damaged due to e lectrostatic discharge. please take proper caution in your manufacturing process and stor age so that voltage exceeding the product s maximum rating will not be applied to p roducts. please take special care under dry condition (e .g. grounding of human body / equipment / solder iron, isolation from charged objects, setting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriorate if the p roducts are stored in the places where : [a] the p roducts are exposed to sea winds or corrosive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to direct sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage condition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm solderability before using p roducts of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the correct direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excess ive stress applied when dropping of a carton. 4. use p roducts within the specified time after opening a humidity barrier bag. baking is required before using p roducts of which storage time is exceeding the recommended storage time period . precaution for p roduct l abel a two - dimensional barcode printed on rohm p roduct s label is for rohm s internal use only . precaution for d isposition when disposing p roducts please dispose them properly using a n authorized industry waste company. precaution for foreign e xchange and foreign t rade act since concerned goods might be fallen under listed items of export control prescribed by foreign exchange and foreign trade act, please consult with rohm in case of export. precaution regarding intellectual property rights 1. all information an d data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party reg arding such information or data. 2. rohm shall not have any obligations where the claims, actions or demands arising from the combination of the products with other articles such as components, circuits, systems or external equipment (including software). 3. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the products or the information contained in this document. provided, however, that rohm will not assert it s intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the products, subject to the terms and conditions herein. other precaution 1. this document may not be reprinted or reproduced, in whole or in part, without prior written consent of rohm. 2. the products may not be disassemble d, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. i n no event shall you use in any way whatso ever the products and the related technical information contained in the products or this document for any military purposes , including but not limited to, the development of mass - destruction weapons . 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties.
datasheet datasheet notice ? we rev.001 ? 2015 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information.
datasheet part number br24g256fj-5 package sop-j8 unit quantity 2500 minimum package quantity 2500 packing type taping constitution materials list inquiry rohs yes br24g256fj-5 - web page distribution inventory

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