SIA923AEDJ www.vishay.com vishay siliconix s13-2636-rev. a, 30-dec-13 1 document number: 62936 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 dual p-channel 20 v (d-s) mosfet marking code : dp ordering information : SIA923AEDJ-t1-ge3 (lead (p b)-free and halogen-free) features ? trenchfet ? power mosfet ? thermally enhanced powerpak ? sc-70 package - small footprint area - low on-resistance ? typical esd protection: 2500 v ? 100 % r g tested ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 applications ? charger switches and load switches for portable devices ? dc/dc converters notes a. package limited. b. surface mounted on 1" x 1" fr4 board. c. t = 5 s. d. see solder profile ( www.vishay.com/doc?73257 ). the powerpak sc-70 is a leadless package. the end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. a solder fillet at the exposed copper tip cannot b e guaranteed and is not required to ensure adequa te bottom side sold er interconnection. e. rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. maximum under steady stat e conditions is 110 c/w. product summary v ds (v) r ds(on) ( ? ) max. i d (a) q g (typ.) -20 0.054 at v gs = -4.5 v -4.5 a 9.5 nc 0.070 at v gs = -2.5 v -4.5 a 0.104 at v gs = -1.8 v -4.5 a 0.165 at v gs = -1.5 v -1.5 powerpak ? s c-70-6l dual top view 2.05 mm 2.05 mm 1 205 2 05 mm 2.05 mm 1 1 bottom view 3 d 2 2 g 1 1 s 1 d 1 d 2 s 2 4 g 2 5 d 1 6 p-channel mosfet s 2 d 2 g 2 p-channel mosfet s 1 d 1 g 1 absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds -20 v gate-source voltage v gs 8 continuous drain current (t j = 150 c) t c = 25 c i d -4.5 a a t c = 70 c -4.5 a t a = 25 c -4.5 a,b,c t a = 70 c -4.5 a,b,c pulsed drain current (t = 100 s) i dm -15 continuous source-drain diode current t c = 25 c i s -4.5 a t a = 25 c -1.6 b,c maximum power dissipation t c = 25 c p d 7.8 w t c = 70 c 5 t a = 25 c 1.9 b,c t a = 70 c 1.2 b,c operating junction and storage temperature range t j , t stg -55 to 150 c soldering recommendations (peak temperature) d,e 260 thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient b,f t ? 5 s r thja 52 65 c/w maximum junction-to-case (drain) steady state r thjc 12.5 16
SIA923AEDJ www.vishay.com vishay siliconix s13-2636-rev. a, 30-dec-13 2 document number: 62936 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. pulse test; pulse width ? 300 s, duty cycle ? 2 %. b. guaranteed by design, not su bject to production testing. stresses beyond those listed under absolute maximum ratings ma y cause permanent damage to th e device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those in dicated in the operational sectio ns of the specifications is not implied. exposure to absolute maximum rating conditions for extended pe riods may affect device reliability. specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = -250 a -20 - - v v ds temperature coefficient ? v ds /t j i d = -250 a --15- mv/c v gs(th) temperature coefficient ? v gs(th) /t j -2.5- gate-source threshold voltage v gs(th) v ds = v gs , i d = -250 a -0.4 - -0.9 v gate-source leakage i gss v ds = 0 v, v gs = 4.5 v - 0.3 3 a v ds = 0 v, v gs = 8 v - 3 30 zero gate voltage drain current i dss v ds = -20 v, v gs = 0 v - - -1 v ds = -20 v, v gs = 0 v, t j = 55 c - - -10 on-state drain current a i d(on) v ds ? -5 v, v gs = -4.5 v -15 - - a drain-source on-s tate resistance a r ds(on) v gs = -4.5 v, i d = -3.8 a - 0.044 0.054 ? v gs = -2.5 v, i d = -3.3 a - 0.057 0.070 v gs = -1.8 v, i d = -1 a - 0.075 0.104 v gs = -1.5 v, i d = -0.5 a - 0.097 0.165 forward transconductance a g fs v ds = -10 v, i d = -3.8 a - 11 - s dynamic b input capacitance c iss v ds = -10 v, v gs = 0 v, f = 1 mhz -770- pf output capacitance c oss -90- reverse transfer capacitance c rss -81- total gate charge q g v ds = -10 v, v gs = -8 v, i d = -4.9 a - 16.3 25 nc v ds = -10 v, v gs = -4.5 v, i d = -4.9 a - 9.5 14.5 gate-source charge q gs -1.4- gate-drain charge q gd -2.3- gate resistance r g f = 1 mhz 1 5.1 10 ? turn-on delay time t d(on) v dd = -10 v, r l = 2.6 ? i d ? -3.9 a, v gen = -4.5 v, r g = 1 ? -1525 ns rise time t r -1625 turn-off delay time t d(off) -3045 fall time t f -1015 turn-on delay time t d(on) v dd = -10 v, r l = 2.6 ? i d ? -3.9 a, v gen = -8 v, r g = 1 ? -715 rise time t r -1220 turn-off delay time t d(off) -2640 fall time t f -1015 drain-source body diode characteristics continuous source-drain diode current i s t c = 25 c - - -4.5 a pulse diode forward current i sm ---15 body diode voltage v sd i s = -3.9 a, v gs = 0 v - -0.9 -1.2 v body diode reverse recovery time t rr i f = -3.9 a, di/dt = 100 a/s, t j = 25 c -1325ns body diode reverse recovery charge q rr - 5.5 12 nc reverse recovery fall time t a -7.5- ns reverse recovery rise time t b -5.5-
SIA923AEDJ www.vishay.com vishay siliconix s13-2636-rev. a, 30-dec-13 3 document number: 62936 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) gate current vs. gate-to-source voltage output characteristics on-resistance vs. drain current and gate voltage gate current vs. gate -to-source voltage transfer characteristics capacitance v gs - gate-to-source voltage (v) i g - gate current (ma) 0 10 20 30 40 50 03691215 t j = 25 c 0 3 6 9 12 15 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v gs = 5 v thru 2.5 v v gs =2v v gs =1.5v v gs =1v v d s - drain-to- s ource voltage (v) i d - drain current (a) 0 0.04 0.08 0.12 0.16 0.20 03691215 v gs =1.5v v gs =2.5v v gs =1.8v v gs =4.5v r d s (on) - on-re s i s tance ( ) i d - drain current (a) 10 -9 10 -8 10 -7 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 03691215 v gs - gate-to-source voltage (v) i g - gate current (a) t j = 150 c t j = 25 c 0 1 2 3 4 5 0.0 0.3 0.6 0.9 1.2 1.5 t c = - 55 c t c = 125 c t c = 25 c v gs - g ate-to- s ource voltage (v) i d - drain current (a) c r ss 0 300 600 900 1200 1500 048121620 c i ss c o ss v d s - drain-to- s ource voltage (v) c - capacitance (pf)
SIA923AEDJ www.vishay.com vishay siliconix s13-2636-rev. a, 30-dec-13 4 document number: 62936 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) gate charge source-drain diode forward voltage threshold voltage on-resistance vs. junction temperature on-resistance vs. gate-to-source voltage single pulse power, junction-to-ambient 0 2 4 6 8 0369121518 i d =4.9a v d s =10v v d s =5v v d s =16v q g - total g ate charge (nc) v gs - g ate-to- s ource voltage (v) 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1.0 1.2 t j = 25 c t j = 150 c v s d - s ource-to-drain voltage (v) i s - s ource current (a) 0.25 0.35 0.45 0.55 0.65 0.75 - 50 - 25 0 25 50 75 100 125 150 i d = 250 a v gs (th) (v) t j - temperature (c) 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 - 50 - 25 0 25 50 75 100 125 150 v gs =1.8v;i d =1a v gs =1.5v;i d =0.5a v gs =2.5v;4.5v;i d =3.8a t j - junction temperature (c) (normalized) r d s (on) - on-re s i s tance 0.00 0.03 0.06 0.09 0.12 0.15 0.18 012345 i d = 1 a; t j = 25 c i d = 3.8 a; t j = 125 c i d = 1 a; t j = 125 c i d = 3.8 a; t j = 25 c r d s (on) - on-re s i s tance ( ) v gs - g ate-to- s ource voltage (v) 1000 100 1 0.001 0.01 0.1 10 power (w) pulse (s) 20 10 5 15 0
SIA923AEDJ www.vishay.com vishay siliconix s13-2636-rev. a, 30-dec-13 5 document number: 62936 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) safe operating area, junction-to-ambient current derating* power derating * the power dissipation p d is based on t j(max.) = 150 c, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the cu rrent rating, when this rating falls below the package limit. 100 1 0.1 1 10 100 0.01 10 0.1 t a = 25 c s ingle pul s e 1 s ,10 s limited by r d s (on) * bvd ss limited 1m s 100 s 10 m s dc 100 m s v d s - drain-to- s ource voltage (v) * v gs > minimum v gs at which r d s (on) i s s pecified i d - drain current (a) limited by i dm 0 2 4 6 8 10 12 0 25 50 75 100 125 150 package limited t c - ca s e temperature (c) i d - drain current (a) 0 2 4 6 8 25 50 75 100 125 150 t c - case temperature (c) power dissipation (w)
SIA923AEDJ www.vishay.com vishay siliconix s13-2636-rev. a, 30-dec-13 6 document number: 62936 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) normalized thermal transient impedance, junction-to-ambient normalized thermal transient impedance, junction-to-case vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?62936 . 1 0.1 0.01 normalized effective transient thermal impedance 10 -3 10 -2 1 10 1000 10 -1 10 -4 100 sq u are w ave p u lse d u ration (s) single p u lse 0.02 0.05 0.1 0.2 d u ty cycle = 0.5 1. d u ty cycle, d = 2. per unit base = r th ja = 110 c/ w 3. t jm - t a = p dm z th ja (t) t 1 t 2 t 1 t 2 notes: 4. s u rface mo u nted p dm 10 -3 10 -2 10 -1 10 -4 1 0.01 sq u are w ave p u lse d u ration (s) normalized effective transient thermal impedance d u ty cycle = 0.5 0.2 0.1 single p u lse 0.02 0.05
vishay siliconix package information document number: 73001 06-aug-07 www.vishay.com 1 powerpak ? sc70-6l dim single pad dual pad millimeters inches millimeters inches min nom max min nom max min nom max min nom max a 0.675 0.75 0.80 0.027 0.030 0.032 0.675 0.75 0.80 0.027 0.030 0.032 a1 0 - 0.05 0 - 0.002 0 - 0.05 0 - 0.002 b 0.23 0.30 0.38 0.009 0.012 0.015 0.23 0.30 0.38 0.009 0.012 0.015 c 0.15 0.20 0.25 0.006 0.008 0.010 0.15 0.20 0.25 0.006 0.008 0.010 d 1.98 2.05 2.15 0.078 0.081 0.085 1.98 2.05 2.15 0.078 0.081 0.085 d1 0.85 0.95 1.05 0.033 0.037 0.041 0.513 0.613 0.713 0.020 0.024 0.028 d2 0.135 0.235 0.335 0.005 0.009 0.013 e 1.98 2.05 2.15 0.078 0.081 0.085 1.98 2.05 2.15 0.078 0.081 0.085 e1 1.40 1.50 1.60 0.055 0.059 0.063 0.85 0.95 1.05 0.033 0.037 0.041 e2 0.345 0.395 0.445 0.014 0.016 0.018 e3 0.425 0.475 0.525 0.017 0.019 0.021 e 0.65 bsc 0.026 bsc 0.65 bsc 0.026 bsc k 0.275 typ 0.011 typ 0.275 typ 0.011 typ k1 0.400 typ 0.016 typ 0.320 typ 0.013 typ k2 0.240 typ 0.009 typ 0.252 typ 0.010 typ k3 0.225 typ 0.009 typ k4 0.355 typ 0.014 typ l 0.175 0.275 0.375 0.007 0.011 0.015 0.175 0.275 0.375 0.007 0.011 0.015 t 0.05 0.10 0.15 0.002 0.004 0.006 ecn: c-07431 ? rev. c, 06-aug-07 dwg: 5934 e2 back s ide view of s ingle back s ide view of dual note s : 1. all dimen s ion s a re in millimeter s 2. p a ck a ge o u tline excl us ive of mold fl as h a nd met a l bu rr 3 . p a ck a ge o u tline incl us ive of pl a ting pin1 pin6 pin5 pin4 pin2 pin 3 a z detail z z d e k1 k2 c a1 k 3 k2 k2 e b b e pin6 pin5 pin4 pin1 pin 3 pin2 e1 e1 e1 l l k4 k k k d1 d2 d1 d1 k1 e 3
application note 826 vishay siliconix www.vishay.com document number: 70487 1 revision: 18-oct-13 application note recommended pad layout for powerpak ? sc70-6l dual 1 2.500 (0.09 8 ) 0.350 (0.014) 0.275 (0.011) 0.613 (0.024) 0.300 (0.012) 0.325 (0.013) 0.950 (0.037) 0.475 (0.019) 2.500 (0.09 8 ) 0.275 (0.011) 0.160 (0.006) 1.600 (0.063) dimensions in mm (inches) 0.650 (0.026) return to index
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