four-channel stand-alone mipi bridge controller for high definition multi-camera applications OV680 lead free available in a lead-free package omnivision's OV680 companion chip is a multi-sensor bridge solution that combines images from four sensors into a single data stream. ideally suited for high definition (hd) multi-camera applications, the OV680 has four 1-lane mipi receivers for four video inputs or two 2-lane mipi for two video inputs, a 2-lane mipi transmitter for video output, and a built-in 8-bit microcontroller. the OV680 features integrated image signal processors (isps), allowing it to process one, two, or four video streams simultaneously. the companion chip can output 2x 720p video at 60 frames per second (fps), or 4x vga video at 120 fps. find out more at www.ovt.com. bridge chip product brief
? stand alone 3d bridge chip for hd sensors applications ? ? ? interfaces: - four one-lane mipi receiver for video input - can combine to dual 2-lane video input - one channel two-lane mipi transmitter for video output - up to 400 khz sccb with 13 mhz ~ 26 mhz input clock - three general purpose io (gpio) - one open drain output cmd_rdy on-chip plls: - system pll - input clock frequency ranges from 13 mhz to 26 mhz - mipi speed - 5x or 10x of system clock for raw, 4x or 8x of system clock for yuv image signal processor (isp) - aec/agc/awb - two isps, one for each input video stream - max resolution: 1280 x 800 - max frame rate: 60 fps at 720p, 120 fps at vga, 240 fps at qvga - defect pixel correction (dpc) - lens shading correction (lenc) sccb: - one sccb master to control sensors - one sccb slave to take the commands from host controller - 7-bit sccb slave device id is fixed to 0x35 (0x6a for write, and 0x6b for read) - supports sccb clock 100 khz and 400 khz data format: - input: raw - output: raw 8/10-bit, yuv422 microcontroller: - 8-bit microcontroller running at the system clock - 16 kbyte program memory power supply: - 1.8v for dovdd, 2.8v for mipi and pll analog - internal regulator generates 1.2v dvdd from dovdd for the digital core circuit - hardware standby mode: initiated by pulling pwdn high, whole system halts and input clock is gated - software standby mode: initiated by register, whole system except the sccb slave block halt ? ? ? ? product features ? ov00680-b64g (lead-free, 64-pin bga) ordering information ? ? ? power supply: - core: 1.2v - analog: 1.8v - i/o: 1.8v power requirements: - hardware standby: 75 w temperature range: - operating: -30c to +70c junction temperature ? ? ? ? output formats: - 8-bit and 10-bit raw rgb data - yuv422 data input clock frequency: 6 ~ 27 mhz maximum image transfer rate: 120 fps package dimensions: 5000 m x 4500 m product specifications OV680 v e r s i o n 1 . 0 , m a r c h , 2 0 1 7 o m n i v i s i o n r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o t h e i r p r o d u c t s o r t o d i s c o n t i n u e a n y p r o d u c t o r s e r v i c e w i t h o u t f u r t h e r n o t i c e . o m n i v i s i o n , t h e o m n i v i s i o n l o g o a n d o m n i p i x e l a r e r e g i s t e r e d t r a d e m a r k s o f o m n i v i s i o n t e c h n o l o g i e s , i n c . o m n i b s i - 2 i s a t r a d e m a r k o f o m n i v i s i o n t e c h n o l o g i e s , i n c . a l l o t h e r t r a d e m a r k s a r e t h e p r o p e r t y o f t h e i r r e s p e c t i v e o w n e r s . 4275 burton drive santa clara, ca 95054 usa tel: + 1 408 567 3000 fax: + 1 408 567 3001 www.ovt.com functional block diagram o v680 sensor0 mipi rx0 image combine 0 (optional b ypass) (optional stitch) image combine 2 (optional b ypass) mipi tx (virtual channel) isp 0 o vpb v2.6 (optional b ypass) mipi rx0 sensor1 mipi rx1 mipi rx1 sensor2 mipi rx2 mipi rx2 sensor3 mipi rx3 sccb master 8-bit microcontroller 16k progr am memory sccb slav e mipi rx3 mipi rx0 mipi rx1 mipi rx2 mipi rx3 mipi rx0 mipi rx1 mipi rx2 mipi rx3 mipi rx0 mipi rx1 mipi rx2 mipi rx3 mipi rx0 mipi rx1 mipi rx2 mipi rx3 image combine 1 (optional b ypass) (optional stitch) isp 1 o vpb v2.6 (optional b ypass) interf ace to host (e.g. resetb, x clk_h, etc.)
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