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general description the max14827 integrates the high-voltage functions commonly found in industrial sensors, including drivers and regulators. the max14827 features two ultra low- power drivers with active reverse-polarity protection. operation is speciied for normal 24v supply voltages up to 60v. transient protection is simpliied due to high voltage tolerance allowing the use of micro tvs. the device features a lexible control interface. pin- control logic inputs allow for operation with switching sensors that do not use a microcontroller. for sensors that use a microcontroller, an spi interface is available with extensive diagnostics. for io-link operation, a three-wire uart interface is provided, allowing interfacing to the microcontroller uart. finally, a multiplexed uart/spi option allows using one serial microcontroller interface for shared spi and uart interfaces. the device includes on-board 3.3v and 5v linear regulators for low-noise analog/logic supply rails. the max14827 is available in a (4mm x 4mm) 24-pin tqfn package and a (2.5mm x 2.5mm) 25-pin wafer- level package (wlp) and is speciied over the extended -40c to +125c temperature range. applications industrial sensors io-link sensors and actuators safety applications beneits and features high configurability and integration reduce skus ? io-link compliant transceiver ? auxiliary 24v digital output and input ? 2.3 (typ) driver on-resistance ? selectable driver current: 50ma to 250ma ? spi or pin-control interface for coniguration and monitoring ? multiplexed spi/uart interface option ? 5v and 3.3v linear regulators ? optional external transistor supports higher regulator load capability ? integrated led driver integrated protection enables robust communication? 65v absolute maximum ratings on interface and supply pins allows for flexible tvs protection ? 9v to 60v speciied operation ? glitch filters for improved burst resilience and noise ? selectable over-current auto-retry timing ? thermal shutdown auto-retry cycling ? hot-plug supply protection up to 36v ? reverse polarity protection of all sensor interface inputs/outputs ? -40c to +125c operating temperature range ordering information appears at end of data sheet. io-link is a registered trademark of profibus user organization (pno). spi is a trademark of motorola, inc. 19-8441; rev 0; 12/15 max14827 gnd c/q do v24 reg v5 l+ l- 1 43 2 di 1 f microcontroller v cc 3.3v 5v vl v33 gpio irq/oc 10k ? spi rx rx irq wu tx tx rts txen gnd spi/pin 1 f uartsel c/q di/do 0.1f gpo led1in led1 max14827 io-link device transceiver typical operating circuit evaluation kit available downloaded from: http:///
3.3v ldo 5v reg v33 v24 v5 control and monitor uvlo vl max14827 led driver led2* led1 led1in reg rev pol protection spi/pin irq/oc cs/pp sdi/tx/npn clk/txen/200ma sdo/rx/thsh rx tx txen uartsel transceiver c/q wake-up detect wu do lo li di gnd * wlp package only v drv driver v drv protection protection max14827 io-link device transceiver www.maximintegrated.com maxim integrated 2 functional diagram downloaded from: http:///
(all voltages referenced to gnd, unless otherwise noted.) v24 ......................................................................... -70v to +65v reg .............................................................. -0.3v to (v 5 + 16v) v5, vl ...................................................................... -0.3v to +6v v33 .............................................................. -0.3v to (v 5 + 0.3v) c/q, do, di .................. min: larger of -70v and (v 24 - 70v) to max: the lower of +70v and (v 24 + 70v) logic inputs: cs /pp, txen, tx, led1in, li, uartsel, clk/txen/200ma, spi/ pin , sdi/tx/npn .............................................. -0.3v to (v l + 0.3v) logic outputs: rx, li, lo wu , sdo/rx/thsh ................ -0.3v to (v l + 0.3v) irq/oc .................................................................. -0.3v to +6v led1, led2 .................................................. -0.3v to (v 5 +0.3v) continuous current into gnd and v24 ................................ 1a continuous current into c/q and do ............................ 500ma continuous current into v5 and reg ............................ 100ma continuous current into any other pin ............................ 50ma continuous power dissipation tqfn (derate 27.8mw/c above +70c) .................. 2222mw wlp (derate 22.7mw/c above +70c) .................... 1816mw operating temperature range ......................... -40c to +125c maximum junction temperature ...................... internally limited storage temperature range ............................ -65c to +150c soldering temperature (reflow, tqfn and wlp) ........... +260c tqfn junction-to-ambient thermal resistance ( ja ) .......... 36c/w junction-to-case thermal resistance ( jc ) ................. 3c/w wlp junction-to-ambient thermal resistance ( ja ) .......... 44c/w (note 1) (v 24 = 9v to 60v, v 5 = 4.5v to 5.5v, v l = 2.5v to 5.5v, v gnd = 0v; reg unconnected, all logic inputs at v l or gnd; t a = -40c to +125c, unless otherwise noted. typical values are at v 24 = 24v, v 5 = 5v, v l = 3.3v, and t a = +25c, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units v24 supply voltage v 24 9 60 v v24 undervoltage-lockout threshold v 24uvlo v 24 rising 6 7.8 9 v v 24 falling 6 7.2 9 v24 undervoltage-lockout-threshold hysteresis v 24uvlo_hyst 570 mv v24 supply current i 24 v5 powered externally, reg is unconnected c/q and do disabled (cq_dis = 1, do_dis = 1) 0.14 0.5 ma c/q and do in push-pull coniguration, cl[10] = 11, c/q and do high, no load on c/q or do 1.1 1.75 c/q and do in push-pull coniguration, cl[10] = 11, c/q and do low, no load on c/q or do 1.4 1.8 max14827 io-link device transceiver www.maximintegrated.com maxim integrated 3 note 1: package thermal resistances were obtained using the method described in jedec specification jesd51- 7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial . absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package thermal characteristicsdc electrical characteristics downloaded from: http:///
(v 24 = 9v to 60v, v 5 = 4.5v to 5.5v, v l = 2.5v to 5.5v, v gnd = 0v; reg unconnected, all logic inputs at v l or gnd; t a = -40c to +125c, unless otherwise noted. typical values are at v 24 = 24v, v 5 = 5v, v l = 3.3v, and t a = +25c, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units v24 low-voltage warning threshold v 24w 14.5 16.5 18 v v5 supply voltage 4.5 5.5 v v5 undervoltage-lockout threshold v 5uvlo v 5 rising 2.8 3.5 4.5 v v 5 falling 2.8 3.45 4.5 v5 supply current i 5_in external 5v applied to v5, reg is unconnected, no load on led1 or led2 c/q and do disabled (cq_dis = 1, do_dis = 1), v33 disabled (v33_dis = 1) 0.64 0.9 ma c/q and do in push-pull coniguration, cl[10] = 11, c/q and do high, v33 enabled, no load on c/q, do, or v33 1.37 1.75 c/q and do in push-pull coniguration, cl[10] = 11, c/q and do low, v33 enabled, no load on c/q, do, or v33 1.41 1.8 vl logic-level supply voltage v l 2.5 5.5 v vl undervoltage threshold v luvlo 0.9 1.7 2.4 v vl logic-level supply current i l all logic inputs at v l or gnd, all logic outputs unconnected 0.25 3 a 5v linear regulator/controller (v5) v5 output voltage v 5 reg = v5, no load on v5, 9v v 24 60v 4.75 5.00 5.25 v load regulation v 5_ldr reg = v5, 0ma < i load < 30ma, v 24 = 24v 0.02 0.2 % line regulation v 5_lnr reg = v5, i load = 1ma, v 24 from 9v to 60v 0.01 4 mv/v reg output current i reg internal regulator or external npn 30 ma max14827 io-link device transceiver www.maximintegrated.com maxim integrated 4 dc electrical characteristics (continued) downloaded from: http:///
(v 24 = 9v to 60v, v 5 = 4.5v to 5.5v, v l = 2.5v to 5.5v, v gnd = 0v; reg unconnected, all logic inputs at v l or gnd; t a = -40c to +125c, unless otherwise noted. typical values are at v 24 = 24v, v 5 = 5v, v l = 3.3v, and t a = +25c, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units v24 reg dropout voltage v reg v 24 = 9v, v 5 = 4.5v, i reg = 5ma 2.35 v reg open voltage v reg_opn v 24 = 60v, v 5 = 4.5v, no load on reg 10 13 16 v v5 capacitance cv 5 allowed capacitance on v5, reg connected to v5 (note 3) 0.8 1 2 f 3.3v linear regulator (v33) v33 output voltage v 33 no load on v33 3.1 3.3 3.5 v v33 load regulation v 33_ldr 0ma < i load < 30ma 0 0.4 0.8 % v33 capacitance cv 33 allowed capacitance on v33, v33 enabled (note 3) 0.8 1 f c/q, do driverdriver on-resistance r oh high-side enabled, v 24 = 24v, cl[10] = 11, i load = -200ma 2.65 4.6 ? r ol low-side enabled, v 24 = 24v, cl[10] = 11, i load = +200ma 2.3 4.45 driver current limit i cl spi/ pin = high, v driver = (v 24 C 3v) or 3v, cl_dis = 0 cl[10] = 00 50 65 80 ma cl[10] = 01 100 120 150 cl[10] = 10 200 230 275 cl[10] = 11 250 290 350 spi/ pin = low, v driver = (v 24 C 3v) or 3v clk/txen/200ma = low 100 120 150 clk/txen/200ma = high 200 230 275 driver peak current i cl_peak dc current 490 ma c/q leakage current i leak_cq c/q driver is disabled (c/q_dis = 1), rx disabled (rx_dis = 1), v 24 = 24v, (v 24 - 65v) v c/q +60v -70 +10 a do leakage current i leak_do do driver is disabled (do_dis =1), v 24 = 24v, (v 24 -65v) v do +60v -10 +10 a c/q output reverse current i rev_cq c/q driver enabled and in push-pull coniguration, v 24 = 30v, v c/q = (v 24 + 5v) or (v gnd - 5v) -60 +1000 a do output reverse current i rev_do do driver enabled and in push-pull coniguration, v 24 = 30v, v do = (v 24 + 5v) or (v gnd - 5v) -60 +1000 a max14827 io-link device transceiver www.maximintegrated.com maxim integrated 5 dc electrical characteristics (continued) downloaded from: http:///
(v 24 = 9v to 60v, v 5 = 4.5v to 5.5v, v l = 2.5v to 5.5v, v gnd = 0v; reg unconnected, all logic inputs at v l or gnd; t a = -40c to +125c, unless otherwise noted. typical values are at v 24 = 24v, v 5 = 5v, v l = 3.3v, and t a = +25c, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units weak pulldown current i pd spi/ pin = high, driver disabled (cq_dis = 1, do_ dis =1) v driver = 5v, cq_wpd = 1, do_wpd = 1, cq_wpu = 0, do_wpu = 0 200 300 400 a v driver = 24v, cq_wpd = 1, do_wpd = 1, cq_wpu = 0, do_wpu = 0 200 470 1000 weak pullup current i pu spi/ pin = high, driver disabled (cq_dis = 1, do_dis = 1), v driver = v 24 - 5v cq_wpu = 1, do_wpu = 1, cq_wpd = 0, do_wpd = 0, -400 -300 -200 a c/q, di receiver input voltage range v in for valid rx/li logic v 24 C 65 +65 v c/q, di input threshold high v th c/q driver disabled v 24 > 18v 11 11.8 12.5 v v 24 < 18v 59 65.5 72 % of v 24 c/q, di input threshold low v tl c/q driver disabled v 24 > 18v 9 9.8 10.5 v v 24 < 18v 45 54.5 63 % of v 24 c/q, di input hysteresis v hys_cq c/q driver disabled v 24 > 18v 2 v v 24 < 18v 11 % of v 24 c/q input capacitance c in_cq driver disabled, weak pull-up and pull-down disabled, f = 100khz 50 pf di input capacitance c in_di f = 100khz 10 pf c/q input current i in_cq c/q driver disabled (cq_dis = 1), c/q receiver enabled, v 24 = 24v -5v v c/q (v 24 + 5v) -10 +30 a (v 24 - 65v) v c/q +60v -70 +70 di leakage current i leak_di di receiver disabled (di_dis = 1), v 24 = 24v, (v 24 - 65v) v di +60v -40 +150 a max14827 io-link device transceiver www.maximintegrated.com maxim integrated 6 dc electrical characteristics (continued) downloaded from: http:///
(v 24 = 9v to 60v, v 5 = 4.5v to 5.5v, v l = 2.5v to 5.5v, v gnd = 0v; reg unconnected, all logic inputs at v l or gnd; t a = -40c to +125c, unless otherwise noted. typical values are at v 24 = 24v, v 5 = 5v, v l = 3.3v, and t a = +25c, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units di input current i in_di di receiver enabled, v 24 = 24v -5v v di (v 24 + 5v) -10 +35 a (v 24 - 65v) v di +60v -40 +200 logic inputs ( cs /pp, txen, tx, lo, led1in, clk/txen/200ma, spi/ pin , sdi/tx/npn) logic input voltage low v il 0.2 x v l v logic input voltage high v ih 0.8 x v l v logic input leakage current i leak logic input = gnd or vl -1 +1 a logic outputs (rx, li, wu , irq / oc , sdo/rx/thsh) logic output voltage low v ol i out = -5ma 0.4 v logic output voltage high v oh i out = 5ma v 5 - 0.4 v irq / oc open-drain leakage current i lk_od irq / oc high impedance, irq / oc = gnd or vl -1 +1 a sdo leakage current i lk_sdo spi/ pin = high, cs /pp = high, sdo/rx/ thsh = gnd or vl -1 +1 a rx, li leakage current i lk_rxli spi/ pin = high, di_dis = 1, rx_dis = 1, rx/li = gnd or vl -1 +1 a led drivers (led1, led2) led output voltage low v ledol i out = -5ma 0.4 v led output voltage high v ledoh i out = 10ma v5 C 0.4 v thermal management thermal warning threshold t wrn die junction temperature rising, tempw and tempwint bits are set +140 c thermal warning threshold hysteresis t wrn_hys die junction temperature falling, tempw bit cleared 15 c per-driver thermal shutdown temperature t shut_d driver temperature rising, temperature at which the driver is turned off +160 c per-driver thermal shutdown temperature hysteresis t shut_dhys driver temperature falling 15 c ic thermal shutdown t shut_ic die temperature rising, thshut and thushutint bits are set +170 c ic thermal-shutdown hysteresis t shut_ichys die temperature falling, thshut bit is cleared 15 c max14827 io-link device transceiver www.maximintegrated.com maxim integrated 7 dc electrical characteristics (continued) downloaded from: http:///
(v 24 = 18v to 30v, v 5 = 4.5v to 5.5v, v l = 2.5v to 5.5v, v gnd = 0v; reg unconnected, all logic inputs at v l or gnd; t a = -40c to +125c, unless otherwise noted. typical values are at v 24 = 24v, v 5 = 5v, v l = 3.3v, and t a = +25c, unless otherwise noted.) (note 2) parameter symbol conditions min typ max units c/q, do driverdriver low-to-high propagation delay t pdlh_pp push-pull and pnp coniguration, figure1 0.16 0.4 s driver high-to-low propagation delay t pdhl_pp push-pull and npn coniguration, figure1 0.28 0.4 s driver skew t skew push-pull coniguration, figure 1| t pdlh - t pdhl | -0.3 +0.3 s driver rise time t rise push-pull and pnp coniguration, figure 1 0.12 0.4 s driver fall time t fall push-pull and npn coniguration, figure 1 0.12 0.4 s driver enable time high t enh push-pull and pnp coniguration, cqdopar = 1 for do, figure 2 0.15 0.4 s driver enable time low t enl push-pull and npn coniguration, cqdopar = 1 for do, figure 3 0.27 0.4 s driver disable time high t dish push-pull and pnp coniguration, cqdopar = 1 for do, figure 2 1.8 3 s driver disable time low t disl push-pull and npn coniguration, cqdopar = 1 for do, figure 3 1.5 3 s c/q, di receiver (figure 4)c/q receiver low-to-high propagation delay t prlh_cq spi/ pin = high or low, cqfil = 0 0.85 1.3 2.1 s spi/ pin = high, cqfil = 1 0.2 0.3 0.5 c/q receiver high-to-low propagation delay t prhl_cq spi/ pin = high or low, cqfil = 0 0.85 1.3 2.1 s spi/ pin = high, cqfil = 1 0.2 0.3 0.5 di receiver low-to-high propagation delay t prlh_di 1.3 2.2 3.5 s di receiver high-to-low propagation delay t prhl_di 1.3 2.2 3.5 s driver current limiting blanking time t cl_arbl spi/ pin = high cl_bl[10] = 00 0.128 ms cl_bl[10] = 01 0.5 cl_bl[10] = 10 1 cl_bl[10] = 11 5 spi/ pin = low 0.128 max14827 io-link device transceiver www.maximintegrated.com maxim integrated 8 ac electrical characteristics downloaded from: http:///
(v 24 = 18v to 30v, v 5 = 4.5v to 5.5v, v l = 2.5v to 5.5v, v gnd = 0v; reg unconnected, all logic inputs at v l or gnd; t a = -40c to +125c, unless otherwise noted. typical values are at v 24 = 24v, v 5 = 5v, v l = 3.3v, and t a = +25c, unless otherwise noted.) (note 2) note 2: all devices are 100% production tested at t a = +25c. limits over the operating temperature range are guaranteed by design. note 3: not production tested. guaranteed by design. note 3: autoretry functionality is not available in pin-mode. parameter symbol conditions min typ max units autoretry period t cl_arp spi/ pin = high, aren = 1 (note 4) tar[10] = 00 50 ms tar[10] = 01 100 tar[10] = 10 200 tar[10] = 11 500 wake-up detection (figure 5) wake-up input minimum pulse width t wumin c l = 3nf 55 66 75 s wake-up input maximum pulse width t wumax 85 95 110 s wu output low time t wul valid wake-up condition on c/q 100 200 300 s spi timing ( cs/ pp, clk/txen/200ma,sdi,tx/npn, sdo/rx/thsh) (figure 6) maximum spi clock frequency 12.5 mhz clk/txen/200ma clock period t ch+cl 80 ns clk/txen/200ma pulse-width high t ch 40 ns clk/txen/200ma pulse-width low t cl 40 ns cs/ pp fall to clk/txen/200ma rise time t css 20 ns clk/txen/200ma rise to cs/ pp rise hold time t csh 40 ns sdi/tx/npn hold time t dh 10 ns sdi/tx/npn setup time t ds 25 ns output data propagation delay t do 20 ns sdo/rx/thsh rise and fall times t ft 20 ns minimum cs/ pp pulse t csw 10 ns max14827 io-link device transceiver www.maximintegrated.com maxim integrated 9 ac electrical characteristics (continued) downloaded from: http:///
figure 1. c/q and lo driver propagation delays and rise/fall times figure 2. c/q driver enable low and disable high timing with external pullup resistor tx, lo c/q, do t pdhl t fall 90%10% 50% txen 0v v l 0v v l 0v v 24 90% 10% 50% t rise t pdlh 50% 50% tx, lo gnd c/q, do txen max14827 5k ? 3.3nf tx, lo gnd c/q, do txen max14827 5k ? 3.3nf v24 push-pull and pnp mode npn mode txen c/q t enl 10% 50% txen gnd tx v l v l 0v v 24 0v 5k ? 3.3nf v 24 max14827 t dish c/q max14827 io-link device transceiver www.maximintegrated.com maxim integrated 10 downloaded from: http:///
figure 3. c/q driver enable high and disable low timing figure 4. c/q and di receiver propagation delays txen c/q t enh 90% 50% txen gnd tx v l 0v v 24 0v 5k ? 3.3nf max14827 t disl c/q c/q, di rx, li t prlh t prhl 50% 50% v 24 0v v l 0v c/q, di gnd rx, li txen 15pf max14827 50% 50% max14827 io-link device transceiver www.maximintegrated.com maxim integrated 11 downloaded from: http:///
figure 5. wake-up detection timing figure 6. spi timing diagram txen gnd txentx wu t wumin < t wu < t wumax tx wu t wul < t wumin no wake-up c/q c/q max14827 t csh t cl t css t ch t csh cs/ pp clk/txen/200ma sdi/tx/npn sdo/rx/thsh t ds t dh t do max14827 io-link device transceiver www.maximintegrated.com maxim integrated 12 downloaded from: http:///
(v 24 = 24v, v l = v 33 , reg is shorted to v5, c/q and do in push-pull coniguration, t a = +25c, unless otherwise noted.) 0 1 2 3 4 5 6 7 8 9 10 0 50 100 150 200 250 i24 supply current (ma) c/q switching rate (kbps) i 24 supply current vs. c/q switching rate toc02 c/q in push - pull do disabled no load 1nf load 0.00 0.25 0.50 0.75 1.00 1.25 1.50 0 50 100 150 200 250 i24 supply current (ma) c/q switching rate (kbps) v5 supply current vs. c/q switching rate toc03 c/q in push - pull do disabled reg unconnected v5 = 5v no load 1nf load 23.0 23.1 23.2 23.3 23.4 23.5 23.6 23.7 23.8 23.9 24.0 0 25 50 75 100 125 150 175 200 225 250 output voltage high (v) load current (ma) c/q driver output high vs. load current toc04 t a = - 40oc t a = +25oc t a = +125oc c/q high - side enabled 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 25 50 75 100 125 150 175 200 225 250 output voltage low (v) load current (ma) c/q driver output low vs. sink current toc05 t a = - 40oc t a = +25oc t a = +125oc c/q low - side enabled 0.0 0.5 1.0 1.5 2.0 2.5 3.0 6 12 18 24 30 36 42 48 54 60 supply current (ma) supply voltage (v) i 24 supply current vs. v 24 supply voltage toc01 c/q and do are push - pull no switching: c/q = high, do = low t a = - 40oc t a = +25oc t a = +125oc 23.0 23.1 23.2 23.3 23.4 23.5 23.6 23.7 23.8 23.9 24.0 0 25 50 75 100 125 150 175 200 225 250 output voltage high (v) load current (ma) do driver output high vs. load current toc06 t a = - 40oc t a = +25oc t a = +125oc do high - side enabled max14827 io-link device transceiver maxim integrated 13 www.maximintegrated.com typical operating characteristics downloaded from: http:///
(v 24 = 24v, v l = v 33 , reg is shorted to v5, c/q and do in push-pull coniguration, t a = +25c, unless otherwise noted.) 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 0 25 50 75 100 125 150 175 200 225 250 output voltage low (v) load current (ma) do driver output low vs. sink current toc07 t a = - 40oc t a = +25oc t a = +125oc do high - side enabled 0 50 100 150 200 250 300 350 0 6 12 18 24 30 sink current (ma) output voltage low (v) c/q current limit toc08 cl[10] = 11 cl[10] = 10 cl[10] = 00 cl[10] = 01 c/q in push - pull c/q is low -350 -300 -250 -200 -150 -100 -50 0 0 6 12 18 24 30 source current (ma) output voltage low (v) c/q current limit toc09 cl[10] = 11 cl[10] = 10 cl[10] = 00 cl[10] = 01 c/q in push - pull c/q is high -60 -50 -40 -30 -20 -10 0 10 -10 0 10 20 30 40 50 60 leakage current (a) c/q voltage (v) c/q driver leakage current vs. c/q voltage toc10 t a = - 40oc t a = +125oc t a = +25oc -10 -8 -6 -4 -2 0 2 4 6 8 10 -10 0 10 20 30 40 50 60 leakage current (a) do voltage (v) do driver leakage current vs. do voltage toc11 t a = +125oc t a = - 40oc and +25oc -200 -100 0 100 200 300 400 500 600 700 800 900 -10 0 10 20 30 40 50 60 pull - down current (a) c/q voltage (v) c/q weak pull - down current vs. c/q voltage toc12 t a = - 40oc t a = +25oc t a = +125oc cq_dis = 1 cq_wpd = 1 max14827 io-link device transceiver maxim integrated 14 www.maximintegrated.com typical operating characteristics (continued) downloaded from: http:///
(v 24 = 24v, v l = v 33 , reg is shorted to v5, c/q and do in push-pull coniguration, t a = +25c, unless otherwise noted.) -500 -400 -300 -200 -100 0 100 200 300 400 500 -10 0 10 20 30 40 50 60 pull - up current (ma) c/q voltage (v) c/q weak pull - up current vs. c/q voltage toc13 t a = +25oc t a = +125oc t a = - 40oc cq_dis = 1 cq_wpu = 1 -20 -10 0 10 20 30 40 50 -10 0 10 20 30 40 50 60 input current (a) input voltage (v) c/q receiver input current vs. input voltage toc14 t a = - 40oc t a = +125oc t a = +25oc c/q receiver enabled -10 0 10 20 30 40 50 60 70 -10 0 10 20 30 40 50 60 input current (a) input voltage (v) di receiver input current vs. input voltage toc15 t a = - 40oc t a = +125oc t a = +25oc c/q driver switching into 1nf load tx 2v/div 0v c/q 5v/div 0v toc16 10s/div v outn v inside v backup c/q is push - pull c load = 1nf c/q driver switching into 4.7nf load tx 2v/div 0v c/q 5v/div 0v toc17 10s/div wake - up detection c/q 10v/div 0v wu 2v/div 0v toc18 40s/div v outn v inside v backup txen = vl tx = gnd max14827 io-link device transceiver maxim integrated 15 www.maximintegrated.com typical operating characteristics (continued) downloaded from: http:///
(v 24 = 24v, v l = v 33 , reg is shorted to v5, c/q and do in push-pull coniguration, t a = +25c, unless otherwise noted.) -0.100 -0.090 -0.080 -0.070 -0.060 -0.050 -0.040 -0.030 -0.020 -0.010 0.000 0 5 10 15 20 25 30 load reguiation (%) load current (ma) v5 linear regulator load regulation toc19 t a = - 40oc t a = +25oc t a = +125oc 5.040 5.042 5.044 5.046 5.048 5.050 5.052 5.054 5.056 5.058 5.060 10 20 30 40 50 60 v5 voltage (v) v24 voltage (v) v5 linear regulator line regulation toc20 external npn transistor connected to v5 and reg i load = 10ma on v5 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 0 5 10 15 20 25 30 load reguiation (%) load current (ma) v33 linear regulator load regulation toc21 t a = - 40oc t a = +25oc t a = +125oc 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 2 4 6 8 10 12 14 16 18 20 led1 or led2 voltage (v) load current (ma) led driver output high voltage vs load current toc22 0 20 40 60 80 100 120 140 160 180 200 0 2 4 6 8 10 12 14 16 18 20 led1 or led2 voltage (mv) load current (ma) led driver output low voltage vs sink current toc23 led driver turned off 5.00 5.01 5.02 5.03 5.04 5.05 5.06 5.07 5.08 5.09 5.10 -45 -20 5 30 55 80 105 130 v5 voltage (v) temperature (oc) v5 voltage vs temperature i load = 20ma toc24 max14827 io-link device transceiver maxim integrated 16 www.maximintegrated.com typical operating characteristics downloaded from: http:///
pin name pin description function tqfn wlp parallel mode (spi/ pin = high) multiplexed mode (spi/ pin = high) pin mode (spi/ pin = low) uartsel = low uartsel = high 1 e1 cs /pp cs /pp logic input spi active-low chip-select input. drive cs /pp low to start the spi read/write cycle. drive cs / pp high to end the spi cycle. uart interface is enabled on rx, tx, and txen. spi chip-select and uart signal select input. when cs /pp is high, the spi interface is disabled and uart interface mode is enabled on the sdo/ rx/thsh, sdi/tx/npn, and clk/txen/200ma logic pins. push-pull select input. drive cs /pp high to enable push-pull mode for the c/q and do drivers. drive cs /pp low to select pnp or npn operation for the drivers. 2 d1 rx c/q receiver logic output rx is the inverse logic of c/q. rx can be disabled with the spi interface. rx is high impedance when rx_dis = 1. rx is the inverse logic of c/q. rx is always active. top view (bump side down) ab cd wlp 2 .5 mm x 2 .5 mm e 1 + v24 c/q do gnd di 2 3 4 5 reg v5 v33 led1 vl txen tx uart sel led2 li spi/pin rx wu sdo/rx/ thsh lo sdi/tx/ npn cs/pp irq/oc clk/txen/ 200ma led1in clk/txen/200ma rx tx v5 reg cs/pp loli vl wu v33 spi/pin sdi/tx/npn gnd v24 c/q led1 txen uartsel sdo/rx/thsh do irq/oc di led1in tqfn 4mm x 4mm top view + 13 14 15 16 17 18 12 11 10 9 8 7 19 20 21 22 23 24 6 5 4 3 2 1 max14827 * ep max14827 io-link device transceiver www.maximintegrated.com maxim integrated 17 pin description pin coniguration downloaded from: http:///
pin name pin description function tqfn wlp parallel mode (spi/ pin = high) multiplexed mode (spi/ pin = high) pin mode (spi/ pin = low) uartsel = low uartsel = high 3 c2 txen c/q driver enable logic input drive txen high to enable the c/q driver. see table 1. with cs /pp low and enmpx = 0, drive txen high to enable c/q. drive txen high to enable the c/q driver. drive txen low to disable the c/q driver and enable the c/q receiver. 4 c1 tx c/q driver communication input the logic on the c/q output is the inverse logic level of the signal on the tx input. see table 1. with cs /pp low and enmpx = 0, the logic on the c/q output is the inverse logic level of the signal on the sdi/tx/ npn input. signals on tx are ignored. see the mode selection table. the logic on the c/q output is the inverse logic level of the signal on the tx input when txen is high. 5 b1 v5 5v power- supply input/ output 5v must be present on v5 for normal operation. bypass v5 to gnd with a 1f capacitor. v5 can be supplied by the internal 5v linear regulator or by an external regulator. to use the internal regulator, connect v5 to reg, or to the emitter of an external npn transistor. to bypass the internal regulator, connect an external 5v supply directly to v5. 6 b2 reg 5v regulator control output to use the internal linear regulator, connect reg to v5 or connect reg to the base of an external npn pass transistor. leave reg unconnected and connect v5 to an external 5v supply to bypass the internal regulator. 7 b3 led1 led driver output 1 led1 is a 5v logic output. connect a current-limiting resistor in series between led1 and the led to limit the led current. led1 can be controlled by driving the led1in high or low, of through the spi interface. set the led1b bit high to turn on the led, clear the led1b bit to turn off the led. alternatively, drive the led1in input high to turn on the led, drive led1in low to turn off the led. see table 2. led1 is a 5v logic output. connect a current-limiting resistor in series between led1 and the led to limit the led current. drive the led1in input high to turn on the led, drive led1in low to turn off the led. - c3 led2 led driver output 2 led2 is a 5v logic output. connect a current-limiting resistor in series between led2 and the led to limit the led current. set the led2b bit high to turn on the led, clear the led2b bit to turn off the led. led2 cannot be controlled in pin-mode. led2 is off. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 18 pin description (continued) downloaded from: http:///
pin name pin description function tqfn wlp parallel mode (spi/ pin = high) multiplexed mode (spi/ pin = high) pin mode (spi/ pin = low) uartsel = low uartsel = high 8 a1 c/q c/q transceiver output/ input the c/q driver can be controlled and monitored with the logic input/output pins or through the spi interface. drive txen high to enable the c/q driver. the logic on the c/q output is the inverse logic-level of the signal in the tx input. rx is the logic inverse of c/q. drive txen high to enable the c/q driver. the logic on the c/q output is the inverse logic-level of the signal in the tx input. rx is the logic inverse of c/q. conigure the c/q driver with the pin-mode inputs. 9 a2 v24 power-supply input bypass v24 to gnd with a 1f ceramic capacitor as close to the device as possible. 10 a3 gnd ground 11 a4 do do driver output do is the inverse logic level of the lo input. the do driver can be enabled/disabled, conigured, controlled, and monitored with the logic input/output pins or through the spi interface. do is the inverse logic level of the lo input. conigure the do driver with the pin- mode inputs. do cannot be disabled in pin-mode. 12 a5 di di receiver input the di receiver can be monitored on the li output or through the spi interface. the li output is the inverse logic-level of the signal on the di input. the li output is the inverse logic-level of the signal on the di input. the di receiver cannot be disabled in pin- mode. 13 b4 v33 3.3v linear regulator output bypass v33 to gnd with a 1f capacitor as close to the ic as possible. the v33 regulator can be disabled through the spi interface. bypass v33 to gnd with a 1f capacitor as close to the ic as possible. v33 cannot be disabled in pin-mode. 14 b5 vl logic-level supply input vl deines the logic levels on all of the logic inputs and outputs. apply a voltage from 2.5v to 5.5v on vl. bypass vl to gnd with a 0.1f ceramic capacitor. 15 c5 li di receiver logic output the li output is the inverse logic-level of the signal on the di input. disable the li output through the spi interface. li is high impedance when the di_dis bit is set. the li output is the inverse logic-level of the signal on the di input. li cannot be disabled in pin-mode. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 19 pin description (continued) downloaded from: http:///
pin name pin description function tqfn wlp parallel mode (spi/ pin = high) multiplexed mode (spi/ pin = high) pin mode (spi/ pin = low) uartsel = low uartsel = high 16 c4 uartsel uart interface select logic input drive uartsel low to use rx, tx, and txen for uart signaling. when cs /pp is high, use sdo/rx/thsh, sdi/tx/npn, and clk/ txen/200ma for uart signaling. uartsel is inactive when spi/ pin is low. 17 d5 lo do driver logic input the logic on the do output is the inverse logic-level of the signal on the lo input. conigure, control, and monitor the do output through the logic pins or through the spi interface. the logic on the do output is the inverse logic-level of the signal on the lo input. conigure the do driver with the pin-mode inputs. 18 d4 wu wake-up request push- pull output wu asserts low for 200s when an io-link 80s wake-up condition is detected on the c/q line. 19 e5 led1in led1 driver logic input drive led1in high or low to enable/disable the led1 driver. the led1 driver can also be controlled through the spi interface. see table 2. drive led1in high to turn on the led connected to led1. drive led1in low to turn the led driver off. 20 e4 irq / oc open-drain interrupt/ over-current output irq / oc asserts when any bit in the interrupt register is set. irq / oc deasserts when the interrupt register is read. irq / oc asserts low when the load current on the c/q or do output exceeds the set current limit. 21 d3 sdo/ rx/ thsh spi serial data output/ rx logic output/ thermal shutdown indicator spi serial data output when cs /pp is high, the spi interface is disabled and uart interface mode is enabled. sdo/ rx/thsh is the logic inverse of c/q. sdo/rx/thsh asserts low when the ic enters thermal shutdown. sdo/rx/thsh deasserts when the device returns to normal operation. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 20 pin description (continued) downloaded from: http:///
pin name pin description function tqfn wlp parallel mode (spi/ pin = high) multiplexed mode (spi/ pin = high) pin mode (spi/ pin = low) uartsel = low uartsel = high 22 e3 clk/ txen/ 200ma spi clock input/ uart txen input/ current limit setting input spi clock input when cs /pp is high, the spi interface is disabled and uart interface mode is enabled. drive clk/txen/200ma high to enable the c/q driver. drive clk/txen/200ma high to enable a 200ma current limit on the c/q and do driver outputs. drive clk/txen/200ma low to set the current limit for the driver outputs to 100ma. 23 d2 spi/ pin spi or pin- mode select input drive spi/ pin high for spi or uart interface operation. drive spi/ pin low for pin-mode operation. 24 e2 sdi/tx/ npn spi serial data input/ tx logic input/ npn driver mode select input spi serial data input when cs /pp is high, the spi interface is disabled and uart interface mode is enabled. drive sdi/ tx/npn to switch c/q. c/q is the logic inverse of the sdi/tx/npn input. drive sdi/tx/npn high to set the c/q and do driver outputs in npn mode. drive sdi/tx/npn low to set the driver outputs in pnp mode. sdi/tx/npn is ignored when the cs /pp input is high. ep - ep exposed pad. connect to ground. not intended as the main ground connection. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 21 pin description (continued) downloaded from: http:///
table 1. c/q and do control table 2: led1 configuration table 3. driver npn, pnp, pp selection in pin-mode x = dont care, z = high impedance spi/ pin txen tx or lo cq_dis or do_dis cq_q or do_q npn mode pnp mode pp mode c/q do c/q do c/q do l l l - - z z z h z h h - - z l z z z l h l - - z z h h h h h - - l l z z l l h l l 0 0 z z z h z h l 0 1 z z h h h h h 0 0 z l z z z l h 0 1 z z h h h h h l 0 0 z z h h h h l 0 1 z z h h h h h 0 0 l l z z l l h 0 1 z z h h h h x x 1 x z z z z z z led1in led1b bit led1 driver status l 0 off 1 on h 0 on 1 on spi/ pin cs /pp sdi/tx/npn c/q and do driver mode l l l pnp l l h npn l h l push-pull l h h push-pull h x x c/q and do modes are set with the spi interface max14827 io-link device transceiver www.maximintegrated.com maxim integrated 22 downloaded from: http:///
detailed description the max14827 is an industrial sensor output driver/io- link device transceiver. the ic integrates the high voltage functions commonly found in sensors, including two 24v line driver and two on-board linear regulators (ldos). the max14827 can be conigured and monitored either through the spi interface or by setting logic interface pins. the max14827 features multiple programmable functions that allow the user to optimize operation and power dissipation for various loads and application scenarios. the integrated 3.3v and 5v ldos provide the power needed for low noise analog and logic supply rails. spi, uart, or pin-mode interface pin-mode the max14827 provides a selectable spi or pin interface to conigure and monitor device operation. drive the spi/ pin input high to use the spi. drive spi/ pin low to use the pin interface (pin-mode control). when operating in pin mode, the following functionality is set and cannot be changed: ? rx and di are enabled (cannot be disabled) ? rx deglitch ilter is enabled ? weak pull-ups/pull-downs on c/q and do are disabled ? autoretry functionality is disabled ? the blanking time on c/q and do is 128s spi operation (parallel operating mode) when the max14827 is operated in spi mode, an external uart can be connected to separate uart interface pins (tx, rx, txen). this is called the parallel spi/uart operating mode. this is the common approach used when the microcontroller offers a uart and a separate spi port in the typical applications circuit. drive uartsel low for operation in parallel mode. spi operation (multiplexed mode) in cases where only one microcontroller serial port is available with both spi and uart functions, the max14827 can be operated in multiplexed spi/uart mode. this is feasible in io-link operation due to the deined idle times in the io-link cycle time. in multiplexed mode, the uart and spi pins are shared. two operating modes are available in multiplexed mode, as selected by the enmpx bit. when enmpx = 0, uart and spi operation are selected by setting the cs /pp input. in this mode the spi interface is active when cs /pp is low and uart operation when cs /pp is high. when enmpx = 1, uart and spi operations are selected by setting the uartsel input. to avoid glitches on c/q, clk/txen/200ma and sdi/tx/npn are sampled on the falling edge of uartsel in this mode. see mode selection table for more information. when entering multiplexed mode, set txen low and tx high to disable the driver. irq / oc is active in both multiplexed modes during uart communication.24v interface the max14827 features an io-link transceiver interface capable of operating with voltages up to 60v. this is the 24v interface and includes the c/q input/output, the logic- level digital output (do), the logic-level digital input (di), and the v24 supply. the max14827 features selectable push-pull, high-side (pnp), or low-side (npn) switching drivers at c/q and do. conigurable drivers (pin-mode) in pin-mode, use sdi/tx/npn and cs /pp inputs to conigure the c/q and do drivers in push-pull, pnp, or npn modes ( table 3 ) in this mode, toggle txen, tx, and lo to switch the c/q and do outputs.conigurable drivers (spi mode) in spi operation, the c/q and do drivers can be conigured independently. set the bits in the cqconig register to conigure the c/q driver, enable/disable the weak pull-up and pull-down currents on c/q. set the bits in the dioconig register to conigure the do driver and enable/disable the weak pull-up and pull-down currents on do. the c/q and do drivers can be disabled by setting the cq_dis and do_dis bits. driver outputs are high impedance and power dissipation is reduced when these bits are set. see the register functionality section for more information on coniguring the drivers. for io-link operation, tx, txen, and rx are the uart interface to control c/q communication. set cq_dis = cq_q = 0 and drive tx and txen inputs for c/q driver control. for lower rate switching on the c/q and do drivers, register bits can be used for c/q and do control. for bit control, drive txen, tx, and lo high and use the cq_q and do_q bits to control the c/q and do driver states. the cq_dis and do_dis bits are used to enable/disable the drivers in this mode. io-link is a registered trademark of profibus user organization (pno). spi is a trademark of motorola, inc. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 23 downloaded from: http:///
c/q driver enable/disable in pin-mode, the c/q driver is enabled/disabled with the txen input. drive txen high to enable the c/q driver. c/q is the logic inverse of the tx input. in spi mode, the c/q driver can also be enabled/disabled, conigured, and controlled in the cqconig register. c/q current limit the c/q driver is optimized for driving large capacitive loads and dynamic impedances like incandescent lamps. in pin-mode, the driver current limit is selectable by setting the clk/txen/200ma input high or low. set clk/txen/200ma low for 100ma maximum load current. set clk/txen/200ma high for a 200ma maximum load current. in spi operation, the maximum driver current limit is selectable as 50ma, 100ma, 200ma, or 250ma by setting the cl1 and cl0 bits in the currlim register. c/q driver fault detection the max14827 senses a fault condition on the c/q driver when it detects a short circuit for longer than the blanking time. a short condition exists when the c/q drivers load current exceeds the current limit. in spi mode, both the current limit and blanking time may be conigured. in pin-mode, the irq / oc output asserts low when a short circuit fault occurs on c/q or do. in spi mode, the c/qfault and c/qfaultint bits are set and irq / oc asserts. when a short-circuit event occurs on c/q, the driver can either be set to continue supplying the selected current until the device enters thermal shutdown or to enter autoretry mode when an overcurrent event occurs. in autoretry mode the driver is automattically disabled after the current blanking time and is then re-enabled. c/q receiver output (rx) rx is the output of the c/q receiver. rx is the inverse logic of the c/q input. in pin-control mode, the c/q receiver is always on. in spi mode, the receiver can be disabled by setting the rx_dis bit in the cqconig register. rx is high impedance when rx_dis is set. note that the cqlvl bit in the status register is invalid when the rx_dis bit is set. when operating in multiplexed mode, sdo/rx/thsh is the output of the c/q receiver. in this mode, sdo/rx/thsh is high impedance when cs /pp is high and rx_dis bit is set. c/q receiver threshold the io-link standard deines device operation with a sensor supply between 18v and 30v. industrial sensors, however, commonly operate with supply voltages as low as 9v. the max14827 c/q receiver supports operation with lower supply voltages by scaling the receiver thresholds when v24 is less than 18v (v 24 < 18v). do driver in pin-mode, the do driver is always enabled. do is the logic inverse of the lo input. in spi mode, the do driver can be enabled/disabled, conigured, and controlled in the dioconig register. do current limit the do driver is optimized for driving large capacitive loads and dynamic impedances like incandescent lamps. in pin-control mode, the driver current limit is selectable by setting the clk/txen/200ma input high or low. set clk/txen/200ma low for 100ma maximum load current. set clk/txen/200ma high for a 200ma maximum load current. in spi operation, the maximum driver current limit is selectable as 50ma, 100ma, 200ma, or 250ma by setting the cl1 and cl0 bits in the currlim register. do fault detection the max14827 senses a fault condition on the do output when it detects a short circuit for longer than the blanking time. a short condition exists when the do drivers load current exceeds the current limit. in spi mode, both the current limit and blanking time may be conigured. in pin-mode, the irq / oc output asserts low when a short circuit fault occurs on c/q or do. in spi mode, the dofault and dofaultint bits are set and irq / oc asserts. when a short-circuit event occurs on do, the driver can either be set to continue supplying the selected current until the device enters thermal shutdown or to enter autoretry mode when an overcurrent event occurs. in autoretry mode the driver is automattically disabled after the current blanking time and is then re-enabled. do and c/q tracking in spi mode, the do driver can be conigured to track the c/q driver. set the cqdopar bit in the cqconig register to enable this functionality. when the do driver is set to track c/q, both c/q and do switch as a function of the tx and txen inputs or cq_q bit. in pin-mode, or when cqdopar is 0, c/q and do operate independently. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 24 downloaded from: http:///
reverse-polarity protection the max14827 is protected against reverse-polarity connections on v24, c/q, do, di, and gnd. any combination of these pins can be connected to dc voltages up to 65v (max), resulting in a current low of less than 1ma. ensure that the maximum voltage between any of these pins does not exceed 65v. driver short-circuit detection the max14827 monitors the do and c/q driver outputs for overcurrent and driver overheating conditions. in pin-mode, the driver short-circuit current limit is set with the clk/txen/200ma input. irq / oc asserts when an overcurrent or overheating condition occurs on either the c/q or do driver. irq / oc deasserts when the overcurrent or overheating condition is removed. in spi mode, the do and c/q are independently monitored. driver current limits for both drivers are set using the cl1 and cl0 bits in the currlim register. when an overcurrent or overheating condition occurs on c/q, the cqfault and cqfaultint bits are set and irq / oc asserts. when an overcurrent or overheating condition occurs on do, the dofault and dofaultint bits are set. the cqfault and dofault bits are cleared as soon as the overcurrent or overheating conditions on the c/q and do drivers are removed. irq / oc deasserts and the cqfaultint and dofaultint bits are cleared only when the interrupt register is read. 5v and 3.3v linear regulators the max14827 includes two internal regulators to generate 5v (v5) and 3.3v (v33). the v5 regulator is capable of driving external loads up to 30ma, including device and 3.3v ldo current consumption. to drive larger loads, use an external pass transistor to generate the required 5v. when using an external transistor, connect reg to the base of the transistor to regulate the voltage and connect v5 to the emitter ( figure 10 ). when the internal 5v linear regulator is not used, v5 is the supply input for the internal analog and digital functions and must be supplied externally. ensure that v5 is present for normal operation. the 3.3v regulator is capable of driving external loads up to 30ma. in spi mode, the 3.3v ldo can be enabled/ disabled by setting the v33dis bit in the mode register. v5 and v33 are not protected against short circuits. power-up the c/q and do driver outputs are high impedance when v24, v5, vl, and/or v33 voltages are below their respective undervoltage thresholds during power-up. the drivers are automatically disabled if v24, v5, or vl falls below its threshold. low voltage and undervoltage detection in spi mode, the device monitors the v24 supply for low voltage and undervoltage conditions. low-voltage warnings must be enabled in the mode register. when v 24 falls below the 16v (typ) low-voltage warning threshold, the v 24w bit in the status register is set. if v24wen is set to 1, the v24wint interrupt bit is also set and irq / oc asserts. when v24 falls below the 7.4v (typ) undervotlage lockout (uvlo) threshold, the uv24 bit in the status register is set. similarly, the uv24int bit in the interrupt register is set and irq / oc asserts. uvlo monitoring and interrupts cannot be disabled. wake-up detection the max14827 detects an io-link wake-up condition on the c/q line in push-pull, high-side (pnp), or low-side (npn) operation modes. a wake-up condition is detected when the c/q output is shorted for 80s (typ). wu pulses low for 200s (typ) when the device detects a wake-up pulse on c/q ( figure 5 ). in spi mode, the wuint bit in the interrupt registeris set and irq / oc asserts when an io-link wake-up event is detected. wake-up detection can be disabled in spi mode by setting the wu_dis bit in the mode register to 0. wake-up detection cannot be disabled in pin-mode. the device includes a wake-up detection algorithm to avoid false wake-up detection on c/q. the false wake-up blanking time is deined by the current limit blanking time. in pin-mode, this is 128s. in spi-mode, this is set by the cl_bl0 and cl_bl1 bits in the currlim reigster. thermal protection and considerations the internal ldos and drivers can generate more power than the package for the devices can safely dissipate. ensure that the driver and ldo loading is less than the package can dissipate. total power dissipation for the device is calculated using the following equation: p total = p c/q + p do + p v5 + p 33 + p 24 + (2 x p pu ) + (2 x p pd ) max14827 io-link device transceiver www.maximintegrated.com maxim integrated 25 downloaded from: http:///
where p c/q is the power generated in the c/q driver, p do is the power dissipated by the do driver, p v5 and p v33 are the power generated by the ldos, p 24 is the quiescent power generated by the device, and p pu and p pd are the power generated in the c/q and do weak pullup/pulldown current sources/sinks, respectively. ensure that the total power dissipation is less than the limits listed in the absolute maximum ratings section. use the following to calculate the power dissipation (in mw) due to the c/q driver: p c/q = [i c/q (max)] 2 r o where r o driver on-resistance. calculate the internal power dissipation of the do driver using the following equation: p do = [i do (max)] 2 x r o where r o driver on-resistance. calculate the power dissipation in the 5v ldo, v 5 , using the following equation: p 5 = (v 24 - v 5 ) i 5 where i 5 includes the i 33 current sourced from v33. calculate the power dissipated in the 3.3v ldo, v33, using the following equation: p 33 = 1.7v i load33 calculate the quiescent power dissipation in the device using the following equation: p 24 = i 24 (max) v 24 (max) if the weak current sinks/sources are enabled, calculate their associated power dissipation as: p pd = i pd (max) v c/q (max) p pu = i pu (max) [v 24 - v c/q ](max) overtemperature warning in spi mode, the device generates interrupts when the junction temperature of any of the drivers (c/q or do) exceeds +140c (typ) warning threshold. the tempw bit in the status register is set and the tempwint in the interrupt register is set and irq / oc asserts under these conditions. the tempw bit is cleared when the die temperature falls to +125c. the interrupt register must be read to clear the tempwint bit and deassert irq / oc . the device continues to operate normally unless the die temperature reaches the +165c thermal shutdown threshold, when the device enters thermal shutdown. the device does not generate overtemperature warnings when operating in pin-mode. thermal shutdown the c/q and do drivers, and the v5 and v33 regulators are automatically switched off when the junction temperature exceeds the +165c (typ) thermal shutdown threshold. spi communication and and the internal regulators are not disabled during thermal shutdown. in spi mode, the thshut bit in the status register and the thshutint in the interrupt register are set. regulators are automatically switched on when the internal die temperature falls below the thermal shutdown threshold plus hysteresis. if the internal v5 regulator is used, the internal registers return to their default state when the v5 regulator is switched back on. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 26 downloaded from: http:///
mode selection table operating mode spi/ pin uartsel enmpx bit cs /pp pin name pin function function pin l x x low or high sdi/tx/npn npn parallel coniguration/monitoring sdo/rx/thsh thsh parallel coniguration/monitoring clk/txen/200ma 200ma parallel coniguration/monitoring cs /pp pp parallel coniguration/monitoring irq / oc oc parallel coniguration/monitoring rx c/q rx parallel coniguration/monitoring/ uart communication tx c/q tx parallel coniguration/monitoring/ uart communication txen c/q txen parallel coniguration/monitoring/ uart communication parallel uart + spi h l 0 low or high sdi/tx/npn sdi spi coniguration/monitoring sdo/rx/thsh sdo spi coniguration/monitoring clk/txen/200ma clk spi coniguration/monitoring cs /pp cs spi coniguration/monitoring irq / oc irq spi coniguration/monitoring rx c/q rx uart communication tx c/q tx uart communication txen c/q txen uart communication multiplexed uart/spi h h 0 l sdi/tx/npn sdi spi coniguration/monitoring sdo/rx/thsh sdo spi coniguration/monitoring clk/txen/200ma clk spi coniguration/monitoring cs /pp low spi coniguration/monitoring irq / oc irq spi coniguration/monitoring rx c/q rx uart communication tx c/q tx uart communication txen c/q txen uart communication h sdi/tx/npn c/q tx uart communication sdo/rx/thsh c/q rx uart communication clk/txen/200ma c/q txen uart communication cs /pp high irq / oc irq spi coniguration/monitoring rx c/q rx active tx c/q tx ignored txen c/q txen ignored max14827 io-link device transceiver www.maximintegrated.com maxim integrated 27 downloaded from: http:///
mode selection table (continued) operating mode spi/ pin uartsel enmpx bit cs /pp pin name pin function function multiplexed uart/spi h 0 1 low or high sdi/tx/npn sdi spi coniguration/monitoring sdo/rx/thsh sdo spi coniguration/monitoring clk/txen/200ma clk spi coniguration/monitoring cs /pp cs spi coniguration/monitoring irq / oc irq spi coniguration/monitoring rx active tx ignored txen ignored 1 sdi/tx/npn c/q tx uart communication sdo/rx/thsh c/q rx uart communication clk/txen/200ma c/q txen uart communication cs /pp not used irq / oc irq spi monitoring rx active tx ignored txen ignored max14827 io-link device transceiver www.maximintegrated.com maxim integrated 28 downloaded from: http:///
table 4. register summary interrupt register [a2, a1, a0] = [000] register functionality the devices have four 8-bit-wide registers for coniguration and monitoring ( table 1 ). bit bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit name thshutint wuint dofaultint cqfaultint v24wint uv24int - tempwint read/write r r r r r r r r por state 0 0 0 0 0 0 0 0 reset upon read n n n n n n n n the interrupt register relects current state of various fault conditions . the irq/oc output asserts when any of the bits in the interrupt register is set. interrupt register bits are latched and are not cleared when the initiating condition is removed. reading the interrupt register clears all the bits and deasserts irq/oc . irq/oc reasserts only when another fault condition occurs. bit name description 7 thshutint thermal shutdown interrupt 1: this bit is set when the max14827 has entered thermal shutdown mode. once set, this bit is not cleared until the register is read. the current status of the thermal shutdown condition can be read in the status register. 0: the max14827 is not in thermal shutdown. 6 wuint wake-up event interrupt 1: this bit is set when an io-link wake-up condition is detected on the c/q line. 0: no wake-up condition is detected. the wake-up interrupt can be disabled by setting the wudis bit to 1. register add r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 interrupt 00h r thshutint wuint dofaultint cqfaultint v24wint uv24int - tempwint status 01h r thshut dilvl dofault cqfault v24w uv24 cqlvl tempw mode 02h r/w rst wu_dis v33_dis enmpx v24wen cqfil led2b led1b currlim 03h r/w cl1 cl0 cldis cl_bl1 cl_bl0 tar1 tar0 aren cqconig 04h r/w rx_dis cq_wpd cq_wpu cqdopar cq_npn cq_pp cq_q cq_dis dioconig 05h r/w - do_wpd do_wpu do_av do_npn do_pp do_q do_dis max14827 io-link device transceiver www.maximintegrated.com maxim integrated 29 downloaded from: http:///
interrupt register [a2, a1, a0] = [000] (continued) bit name description 5 dofaultint do driver fault interrupt 1: this bit is set when a fault occurs on the do driver (over current or over heating). once set, this bit is not cleared until the register is read. the current status of the thermal shutdown condition can be read in the status register. 0: no fault on the do driver. 4 cq_faultint c/q driver fault interrupt 1: this bit is set when a fault occurs on the c/q driver (over current or over heating). once set, this bit is not cleared until the register is read. the current status of the thermal shutdown condition can be read in the status register. 0: no fault on the c/q driver. 3 v24wint v24 low voltage warning interrupt 1: this bit is set when v 24 falls below the io-link low-voltage warning threshold fault (v 24 < v 24w ). once set, this bit is not cleared until the register is read. the current status of the thermal shutdown condition can be read in the status register. 0: v 24 is greater than the low-voltage warning threshold. 2 uv24int v24 supply undervoltage interrupt 1: this bit is set when v 24 falls below the uvlo threshold (v 24 < v 24uvlo ). once set, this bit is not cleared until the register is read. the current status of the thermal shutdown condition can be read in the status register. 0: v 24 is greater than the uvlo threshold. 1 ? this bit is not used. 0 tempwint overtemperature warning interrupt 1: this bit is set when the die temperature exceeds the warning threshold (t j > t wrn ). once set, this bit is not cleared until the register is read. the current status of the thermal shutdown condition can be read in the status register. 0: the die temperature has not exceeded the overtemperature warning threshold. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 30 downloaded from: http:///
status register [a2, a1, a0] = [000] bit bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit name thshut dilvl dofault cqfault v24w uv24 cqlvl tempw read/write r r r r r r r r por state 0 0 0 0 0 0 0 0 reset upon read n n n n n n n n the status register relects current state of various ic functions. bit name description 7 thshut thermal shutdown status 1: this bit is set when the max14827 has entered thermal shutdown mode. 0: this bit is cleared automatically when the device exits thermal shutdown. 6 dilvl di logic level 1: this bit is set when the di voltage is a logic high (v di < v tl ). 0: this bit is clear when the di voltage is a logic low (v di > v th ). 5 dofault do driver fault status 1: this bit is set when a fault occurs on the do driver (over current or over heating). 0: this bit is cleared automatically when the fault on do is removed. 4 cq_fault c/q driver fault status 1: this bit is set when a fault occurs on the c/q driver (over current or over heating). 0: this bit is cleared automatically when the fault on c/q is removed. 3 v24w v24 low voltage warning status 1: this bit is set when v24 falls below the io-link low-voltage warning threshold (v 24 < v 24w ). 0: this bit is cleared automatically when v24 rises above the low-voltage warning threshold. 2 uv24 v24 supply status 1: this bit is set when v24 falls below the uvlo threshold (v 24 < v 24uvlo ). 0: this bit is cleared automatically when v24 rises above the uvlo threshold. 1 cqlvl c/q logic level 1: this bit is set when the c/q voltage is a logic high (v c/q < v tl ). 0: this bit is clear when the c/q voltage is a logic low (v c/q > v th ). 0 tempw overtemperature warning 1: this bit is set when the die temperature exceeds the warning threshold (t j > t wrn ). 0: this bit is cleared automatically when the when the die temperature falls below the warning threshold and hysteresis (t j < t wrn - t wrn_hyst ). max14827 io-link device transceiver www.maximintegrated.com maxim integrated 31 downloaded from: http:///
mode register [a2, a1, a0] = [010] bit bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit name rst wu_dis v33_dis enmpx v24wen cqfil led2b led1b read/write r/w r/w r/w r/w r/w r/w r/w r/w por state 0 0 0 0 0 0 0 0 reset upon read n n n n n n n n use the mode register to conigure the max14827 and manage the 3.3v ldo. bit name description 7 rst register reset 1: reset all registers to their default power-up state. the status register is cleared and irq deasserts (if asserted) when rst = 1. interrupts are not generated while rst = 1. 0: normal operation. 6 wu_dis wake-up interrupt disable/enable 1: wake-up detection is disabled. 0: enable io-link wake-up detection. 5 v33_dis v33 enable/disable 1: disable the v33 linear regulator. 0: enable the v33 linear regulator. 4 enmpx enable/disable spi/uart multiplexing 1: enable uart multiplexing on spi interface pins. see the mode selection table for more information. 0: disable uart multiplexing on spi interface pins. 3 v24wen v24 undervoltage warning enable 1: enable the v24 undervoltage warning interrupt. v24wint is set when v24 falls below the uvlo threshold. 0: disable the v24 undervoltage warning interrupt. 2 cqfil c/q deglitch filter enable/disable 1: deglitch ilter is disabled on rx. 0: deglitch ilter is enabled on rx. 1 led2b led2 driver logic 1: set the led2 output high. 0: set the led2 output low. 0 led1b led1 driver logic. 1: set the led1 output high.0: led1 output is driven by the led1in logic input. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 32 downloaded from: http:///
currlim register [a2, a1, a0] = [011] bit bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit name cl1 cl0 cl_dis cl_bl1 cl_bl0 tar1 tar0 aren read/write r/w r/w r/w r/w r/w r/w r/w r/w por state 0 0 0 0 0 0 0 0 reset upon read n n n n n n n n the currlim register sets the c/q and do driver current limits and the ixed off-time once the driver s have exceeded their individual thermal shutdown thresholds. bit name description 7 cl1 driver current limit set the cl1 and cl0 bits to select the active current limit for the c/q and do drivers when cl_dis = 0. 00: driver current limit is set to 50ma 01: driver current limit is set to 100ma 10: driver current limit is set to 200ma 11: driver current limit is set to 250ma 6 cl0 5 cl_dis driver current limit disable/enable 1: disable the driver current limit for the c/q and do drivers.0: enable the driver current limit (as set by the cl1 and cl0 bits). 4 cl_bl1 current limit blanking time set the cl_bl1 and cl_bl0 bits to select the minimum blanking time to signal a current limit or thermal fault. 00: blanking time is 128s 01: blanking time is 500s 10: blanking time is 1ms 11: blanking time is 5ms 3 cl_bl0 2 tar1 auto-retry fixed off-time set the tar1 and tar0 bits to select the ixed driver off-time after a fault has been generated when auto-retry functionality is enabled (aren = 1). the driver is re-enabled automatically after the ixed off-delay. 00: fixed off-time is 50ms 01: fixed off-time is 100ms 10: fixed off-time is 200ms 11: fixed off-time is 500ms 1 tar0 0 aren auto-retry fixed off-time enable/disable 1: fixed off-time functionality is enabled. c/q and do drivers are disabled for a ixed time after an overcurrent or thermal fault occurs. the driver is re-enabled automatically after the ixed off-delay. 0: fixed off-time functionality is disabled. the driver is re-enabled after temperature falls below the thermal hysteresis. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 33 downloaded from: http:///
cqconfig register [a2, a1, a0] = [100] bit bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit name rx_dis cq_wpd c/q_wpu c/qdopar c/q_npn cq_pp cq_q cq_dis read/write r/w r/w r/w r/w r/w r/w r/w r/w por state 0 0 0 0 0 0 0 1 reset upon read n n n n n n n n use the cqconig register to control the c/q driver and receiver parameters. all bits in the cqconig register are read- write. bit name description 7 rx_dis receiver disable/enable 1: the rx receiver output is disabled. rx is high impedance when disabled. 0: rx is enabled. 6 cq_wpd c/q weak pull-down enable 1: enable the weak pull-down current sink on the c/q driver. 0: disable the weak pull-down current sink on the c/q driver. 5 cq_wpu c/q weak pull-up enable 1: enable the weak pull-up current source on the c/q driver. 0: disable the weak pull-up current source on the c/q driver. 4 cqdopar c/q and do driver tracking 1: enable c/q and do tracking. in this mode, both c/q and do switch as a function of the tx input or the cq_q bit. 0: c/q and do operate independently. 3 cq_npn c/q driver npn/pnp mode 1: enable npn operation (when cq_pp = 0) on the c/q driver. 0: enable pnp operation (when cq_pp = 0) on the c/q driver. cq_npn is ignored when cq_pp = 1. 2 cq_pp c/q driver push-pull mode 1: enable push-pull operation on the c/q driver. 0: enable open-drain (pnp or npn mode) operation on the c/q driver. 1 cq_q c/q driver output logic 1: set the c/q driver high (push-pull mode), set the c/q pnp switch on (pnp mode), or set the c/q npn switch off (npn mode). see table 1. 0: cq is high impedance when cq_q = 0 and txen is low (or cq_dis = 1). cq logic is the inverse of tx logic when txen is high (and cq_dis = 0) and cq_q = 0. see table 1. 0 cq_dis c/q driver disable/enable 1: disable the c/q driver, regardless of the state of the txen input. the driver is high impedance in this mode. 0: status of the c/q driver is determined by the txen input or cq_q bit. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 34 downloaded from: http:///
dioconfig register [a2, a1, a0] = [101] bit bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit name - do_wpd do_wpu do_av do_npn do_pp do_q do_dis read/write r r/w r/w r/w r/w r/w r/w r/w por state 0 0 0 0 0 0 0 1 reset upon read n n n n n n n n use the dioconig register to control the di and do interfaces. all bits in the dioconig register are read-write . bit name description 7 - this bit is not used. 6 do_wpd do weak pull-down enable 1: enable the weak pull-down current sink on the do driver. 0: disable the weak pull-down current sink on the do driver. 5 do_wpu do weak pull-up enable 1: enable the weak pull-up current source on the do driver. 0: disable the weak pull-up current source on the do driver. 4 do_av do antivalent operation 1: enable antivalent operation on the c/q and do outputs. in this mode, do switches as a function of the lo input or the do_q bit, but with opposite logic. if cqdopar = 1, both c/q and do switch as a function of tx and/or cq_q, but with opposite logic. 0: c/q and do switch with normal polarity. 3 do_npn do driver npn/pnp mode 1: enable npn operation (when do_pp = 0) on the do driver. 0: enable pnp operation (when do_pp = 0) on the do driver. do_npn is ignored when do_pp = 1. 2 do_pp do driver push-pull mode 1: enable push-pull operation on the do driver. 0: enable open-drain (pnp or npn mode) operation on the do driver. 1 do_q do driver output logic 1: set the do driver high (push-pull mode), set the do pnp switch on (pnp mode), or set the do npn switch off (npn mode). see table 1. 0: do logic is the inverse of lo logic when do_dis = 0 and do_q = 0. see table 1. 0 do_dis do driver disable/enable 1: disable the do driver. do is high impedance when disabled. 0: state of the do driver is determined by the lo input or the do_q bit. max14827 io-link device transceiver www.maximintegrated.com maxim integrated 35 downloaded from: http:///
spi interface the device communicates through an spi-compatible 4-wire serial interface. the max14827 supports burst read/write access. the maximum spi clock rate for the device is 12mhz. the spi interface complies with clock polarity cpol = 0 and clock phase cpha = 0 (see figure 7 and figure 8 ). the spi interface is not available when v 5 or v l are not present. figure 7. spi write cycle figure 8. spi read cycle cs/pp clk/ txen/ 200ma sdi/tx/ npn w 0 0 0 0 a2 a1 a0 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 a_ = register address bit_ = data bit = clock edge that intiates latching of sdi data cs/pp clk/ txen/ 200ma sdi/tx/ npn r 0 0 0 0 a2 a1 a0 bit 7 x bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 x sdo/rx/ thsh a_ = register address bit_ = data bit = clock edge that intiates latching of sdi data = clock edge that intiates writing of sdo data max14827 io-link device transceiver www.maximintegrated.com maxim integrated 36 downloaded from: http:///
spi burst access burst access allows writing or reading in one block, by only deining the initial register address in the spi command byte. once the initial spi address is received, the max14827 automatically increments the register after each spi data byte. eficient programming of multiple consecutive registers is thus possible. chip select, cs / pp, must be kept low during the whole write/read cycle. the spi clock continues clocking throughout the burst access cycle. the burst cycle ends when the spi master pulls cs /pp high. applications information microcontroller interfacing the logic levels of the microcontroller interface i/os are deined by v l . apply a voltage from 2.5v to 5.5v to vl for normal operation. logic outputs are supplied by vl. the device can be conigured for simultaneous or multiplexed uart communication. when conigured for a multipexed uart interface, the spi interface and uart interface pins are shared. see the mode selection table for more information. transient protection inductive load switching, esd, bursts, and surges create high transient voltages. v24, c/q, di, and do should be protected against high overvoltage and undervoltage transients. positive voltage transients on v24, c/q, do, and di must be limited to +70v relative to gnd. negative voltage transients must be limited to -70v relative to v24. use protection diodes on c/q, do, and di as shown in figure 9 . for standard esd and burst protection demanded by the io-link speciication, small package tvs can be used (like the uclamp3603t or the spt01-335). if higher level surge ratings need to be achieved (iec 61000-4-5 1kv/ 42), smaj33a or smbj36a tvs protectors can also be used. using an external transistor with the 5v regulator the internal 5v regulator (v5) can provide up to 30ma of total load current (including the current on to the v33 ldo) when v5 is connected to reg. to achieve larger load currents or to shunt the power dissipation away from the max14827, an external npn transistor can be connected as shown in figure 10 . select an npn transistor with high vce voltage to support the max l+ supply voltage. in order to protect the npn transistor against reverse polarity of the l+ / l- supply terminals, connect a silicon or a schottky diode in series with the npn transistors collector that has a reverse voltage capability large enough for reverse connected l+/l-. a 1f capacitor on the v5 is required for stability. using an step-down regulator with the 5v regulator to decrease power dissipation in the max14827, v5 can be powered by an external step-down regulator. connect the external regulators output to the v5 input and leave reg unconnected. ( figure 11 ) figure 9. max14827 operating circuit with tvs protection max14827 v24 do c/q gnd di max14827 io-link device transceiver www.maximintegrated.com maxim integrated 37 downloaded from: http:///
figure 11. using an external step-down with the 5v regulator figure 10. using an external npn transistor with the 5v regulator v5 reg v24 max14827 gnd l- l+ 1 f max14827 gnd c/q do v24 reg v5 l+ l- 14 3 2 di 1 f microcontroller v cc 3.3v 5v vl v33 gpio2 irq/oc gnd spi/pin 1 f c/q di/do 0.1 f gpo uartsel miso/rx sdo/rx gpo wu mosi/tx sdi/tx sclk/rts clk/txen ss cs led1 led2 max17552 en in lx fb gnd max14827 io-link device transceiver www.maximintegrated.com maxim integrated 38 downloaded from: http:///
shared spi/uart interface figure 12 is an example of the use of a minimum pin- count microcontroller. a microcontroller serial port, which supports both uart and spi functions, is used for managing both transceiver control (spi) and io- link data communication (uart). the microcontrollers shared uart and spi interface pins are multiplexed. the transceivers spi is typically only used for coniguration at power-up and occasionally afterwards for reconiguration, and diagnostics. during an io-link master-device communication cycle, the idle time on the c/q interface can be used for spi activity. this is possible by slightly increasing the io-link device minimum cycle time. figure 12. multiplexed spi/uart mode configuration max14827 gnd c/q do v24 reg v5 l+ l- 14 3 2 di 1 f microcontroller v cc 3.3v 5v vl v33 gpio2 irq/oc gnd spi/pin 1 f c/q di/do 0.1 f gpo uartsel miso/rx sdo/rx gpo wu mosi/tx sdi/tx sclk/rts clk/txen ss cs led1 led2 max14827 io-link device transceiver www.maximintegrated.com maxim integrated 39 downloaded from: http:///
+ denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. t = tape & reel. part temp range pin-package max14827atg+ -40c to +125c 24 tqfn-ep* max14827atg+t -40c to +125c 24 tqfn-ep* max14827awa+ -40c to +125c 25 wlp max14827awa+t -40c to +125c 25 wlp package type package code outline no. land pattern no. 24 tqfn-ep t2444+4 21-0139 90-0022 25 wlp w252l2+1 21-0787 refer to application note 1891 max14827 io-link device transceiver www.maximintegrated.com maxim integrated 40 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different sufix character, but the drawing pertains to the package regardless of rohs status. chip information process: bicmos ordering information downloaded from: http:///
revision number revision date description pages changed 0 12/15 initial release maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and speciications without n otice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. max14827 io-link device transceiver ? 2015 maxim integrated products, inc. 41 revision history for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com. downloaded from: http:///

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