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1 for more information www.linear.com/lt6658 typical a pplica t ion fea t ures descrip t ion precision dual output, high current, low noise, voltage reference the lt ? 6658 precision 2.5 v dual output reference com - bines the performance of a low drift low noise reference and a linear regulator. both outputs are ideal for driving the precision reference inputs of high resolution adcs and dacs, even with heavy loading while simultaneously acting as output supplies powering microcontrollers and other supporting devices. both outputs have the same precision specifications and track each other over temperature and load. both outputs are nominally 2.5 v, however each can be configured with external resistors to give an output voltage up to 6v. using kelvin connections, the lt6658 typically has 0.1ppm/ ma load regulation with up to 150ma load current. a noise reduction pin is available to band-limit and lower the total integrated noise. dual outputs provide flexibility for powering reference and regulator applications and localizing pcb routing. the outputs have excellent supply rejection and are stable with 1f to 50f capacitors. short circuit and thermal protection help maintain stability and prevent thermal overstress. the lt6658 is offered in the mse16 exposed pad package. precision dual output 2.5v reference and supply output voltage temperature drift both outputs a pplica t ions n dual output tracking reference n each output confgurable: 2.5v to 6v n output 1: 150ma source/20ma sink n output 2: 50ma source/20ma sink n low drift: n a-grade: 10ppm/c max n b-grade: 20ppm/c max n high accuracy: n a-grade: 0.05% max n b-grade: 0.1% max n low noise: 1.5ppm p-p (0.1hz to 10hz) n wide operating voltage range to 36v n load regulation: 0.1ppm/ma n ac psrr: 96db at 10khz n kelvin sense connection on outputs n thermal shutdown n separate supply pins for each output n available in exposed pad package mse16 n microcontroller with adc/dac applications n data acquisition systems n automotive control and monitoring n precision low noise regulators n instrumentation and process control l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. 1f 1f 1f 0.1f v in 5v to 36v v out2 2.5v 50ma v out1 2.5v 150ma 6658 ta01a lt6658-2.5 r load2 v in1 v in2 v in od bypass v out2_f v out2_s v out1_f v out1_s gnd r load1 lt 6658 6658f 50 75 100 125 150 2.498 2.499 2.500 2.501 2.502 i load1 = 150ma output voltage (v) 6658 ta01b v out1 v out2 temperature (c) ?50 ?25 0 25
2 for more information www.linear.com/lt6658 p in c on f igura t ion a bsolu t e maxi m u m r a t ings supply voltages v in , v in 1 , v in 2 to gnd ............................ C 0.3 v to 38 v input voltages od to gn d ............................................. C 0.3 v to 38 v v out 1_ s , v out 2_ s , nr , bypass to gnd .. C0. 3 v to 6v output voltages v out 1_ f , v out 2_ f to gnd ......................... C 0.3 v to 6v input current by pass ........................................................... 1 0 ma output short - circuit duration .......................... in definite specified temperature range i- g rade ................................................. C 40 c to 85 c h- g rade ............................................. C 40 c to 125 c operating junction temperature range . C 55 c to 150 c storage temperature range ( note 2) ..... C6 5 c to 150 c lead temperature ( soldering , 10 sec ) ( no te 3) ............................................................ 30 0 c (note 1) 1 2 3 4 5 6 7 8 gnd gnd bypass dnc nr gnd v out2_s v out2_f 16 15 14 13 12 11 10 9 dnc nc v in v out1_s v out1_f v in1 v in2 od top view mse package 16-lead plastic msop 17 gnd t jmax = 150c, jc = 10c/w, ja = 35c/w dnc: connected internally do not connect external circuitry to these pins exposed pad ( pin 17) is gnd, must be soldered to pcb o r d er i n f or m a t ion tube tape and reel part marking* package description specified junction temperature range lt6658aimse-2.5#pbf lt6658aimse-2.5#trpbf 665825 16-lead plastic msop C40c to 85c lt6658bimse-2.5#pbf lt6658bimse-2.5#trpbf 665825 16-lead plastic msop C40c to 85c lt6658ahmse-2.5#pbf lt6658ahmse-2.5#trpbf 665825 16-lead plastic msop C40c to 125c lt6658bhmse-2.5#pbf lt6658bhmse-2.5#trpbf 665825 16-lead plastic msop C40c to 125c * the temperature grade is identified by a label on the shipping container. consult lt c marketing for parts specified with wider operating temperature ranges. parts ending with pbf are rohs and weee compliant. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ http://www .linear.com/product/lt6658#orderinfo lt 6658 6658f
3 for more information www.linear.com/lt6658 e lec t rical c harac t eris t ics parameter conditions min typ max units output voltage accuracy lt6658a lt6658b lt6658ai lt6658bi lt6658ah lt6658bh l l l l C0.05 C0.1 C0.175 C0.35 C0.215 C0.43 0.05 0.1 0.175 0.35 0.215 0.43 % % % % % % output v oltage temperature coefficient (note 4) lt6658a lt6658b l l 3 10 10 20 ppm /c ppm/c line regulation (note 5) v out ?+?2.5v v in 36v, v in = v in1 = v in2 l 1.4 4.5 5 ppm /v ppm/v load regulation (note 5) output 1 sourcing, i load ?=?0ma to 150ma l 0.1 0.5 0.8 ppm /ma ppm/ma output 2 sour cing, i load ?=?0ma to 50ma (note 6) l 0.1 1.3 1.5 ppm /ma ppm/ma output 1 sinking, i load ?=?0ma to 20ma l 0.1 2.2 2.5 ppm /ma ppm/ma output 2 sinking, i load ?=?0ma to 20ma l 0.1 2.2 2.5 ppm /ma ppm/ma v in minimum voltage v out ?=?0.1%, i out ?=?0ma, v in1 ?=?v in2 ?=?v out ?+?2.5v l 3.5 3.9 4.25 v v v in1 dropout voltage v out ?=?0.1%, i out ?=?0ma, v in ?=?v in2 ?=?v out ?+?2.5v v out ?=?0.1%,i out ?=?150ma,v in ?=?v in2 ?=?v out ?+?2.5v l 2.0 2.2 2.3 2.5 v v v in2 dropout voltage v out ?=?0.1%, i out ?=?0ma, v in ?=?v in1 ?=?v out ?+?2.5v v out ?=?0.1%, i out ?=?50ma, v in ?=?v in1 ?=?v out ?+?2.5v l 1.8 2 2.2 2.5 v v supply current v od ?= 5v, no load v od ?=?0.8v, no load l l 1.9 1.0 3.0 1.2 ma ma output short-cir cuit current short v out1_f to gnd short v out2_f to gnd l l 170 65 270 120 ma ma output noise v oltage (note 7) 0.1hz f 10hz 1.5 ppm pCp 10hz f 1khz, c out = 1f, c nr = 10f, i load = full current (note 9) frequency = 1khz, c out1 = 1f, c nr = 10f, i load = full current (note 9) 2 8 ppm rms nv/hz output voltage tracking tracking = output 1?C?output 2 0.9 v/c v out1_s , v out2_s pin current unity gain 135 na od threshold voltage logic high input voltage logic low input voltage l l 2 0.8 v v od pin current v od ?=?0v v od ?=?36v l l 30 0.3 45 1.5 a a the l denotes the specifications which apply over the full specified temperature range, otherwise specifications are at t a = 25c . v in ?=?v in1 ?=?v in2 ?=?v out1,2_f + 2.5v , c out1,2 ?=?1f , i load ?=?0, unless otherwise noted. a vailable o p t ions output voltage initial accuracy temperature coefficient specified junction temperature range 2.500v 0.05% 10ppm/c C40c to 85c 0.1% 20ppm/c C40c to 85c 0.05% 10ppm/c C40c to 125c 0.1% 20ppm/c C40c to 125c lt 6658 6658f
4 for more information www.linear.com/lt6658 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c . v in ?=?v in1 ?=?v in2 ?=?v out1,2_f + 2.5v , c out1,2 ?=?1f , i load ?=?0, unless otherwise noted. note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: thermal hysteresis can occur during storage at extreme temperatures. note 3: the stated temperature is typical for soldering of the leads during manual rework. for detailed ir reflow recommendations, refer to the applications information section. note 4: temperature coefficient is measured by dividing the maximum change in output voltage by the specified temperature range. note 5: line and load regulation are measured on a pulse basis for specified input voltage or load current ranges. output changes due to die temperature change must be taken into account separately. note 6: v out2 load regulation specification is limited by practical automated test resolution. please refer to the typical performance characteristics section for more information regarding actual typical performance. note 7: peak-to-peak noise is measured with a 1-pole highpass filter at 0.1 hz and 2-pole lowpass filter at 10hz. the unit is enclosed in a still-air environment to eliminate thermocouple effects on the leads. the test parameter conditions min typ max units ripple rejection v in1 ?=?v out1 ?+?3v, v ripple ?=?0.5v pCp , f ripple ?=?120hz, i load ?=?150ma, c out1 = 1f, c nr = 10f v in2 ?=?v out2 ?+?3v, v ripple ?=?0.5v pCp , f ripple ?=?120hz, i load ?=?50ma, c out2 = 1f, c nr = 10f 107 107 db db t urn-on t ime 0.1% settling, c load ?=? 1f 160 s long term drift (note 8) 120 ppm/khr thermal hysteresis (note 9) t = C40c to 85c t = C40c to 125c 30 45 ppm ppm time is 10 seconds. rms noise is measured on a spectrum analyzer in a shielded environment where the intrinsic noise of the instrument is removed to determine the actual noise of the device. note 8: long-term stability typically has a logarithmic characteristic and therefore, changes after 1000 hours tend to be much smaller than before that time. total drift in the second thousand hours is normally less than one third that of the first thousand hours with a continuing trend toward reduced drift with time. long-term stability will also be affected by differential stresses between the ic and the board material created during board assembly. note 9: hysteresis in output voltage is created by package stress that differs depending on whether the ic was previously at a higher or lower temperature. output voltage is always measured at 25c, but the ic is cycled to the hot or cold temperature limit before successive measurements. hysteresis measures the maximum output change for the averages of three hot or cold temperature cycles. for instruments that are stored at well controlled temperatures (within 20 or 30 degrees of operational temperature), its usually not a dominant error sour ce. typical hysteresis is the worst-case of 25c to cold to 25c or 25c to hot to 25c, preconditioned by one thermal cycle. note 10: the full current for i load is 150ma and 50ma for output 1 and output 2, respectively. lt 6658 6658f
5 for more information www.linear.com/lt6658 2.5v v out1 load regulation, sourcing 2.5v v out2 load regulation, sourcing 2.5v v out1 load regulation, sinking 2.5v v out2 load regulation, sinking 2.5v line regulation v out1 2.5v line regulation v out2 2.5v v out1 output voltage temperature drift 2.5v v out2 output voltage temperature drift 2.5v v out1 and v out2 output voltage vs temperature with 150ma load on v out1 t a = 25c, v in = v in1 = v in2 = v out1_f + 2.5v = v out2_f + 2.5v, c out1 = c out2 = 1f, i load = 0ma, unless otherwise noted. typical p er f or m ance c harac t eris t ics lt 6658 6658f 100 output current (ma) 1 10 100 0 4 8 12 16 20 125 24 output voltage change (ppm) 6658 g06 125c 25c ?40c output current (ma) 0.1 1 10 150 100 0 3 6 9 12 15 18 output voltage change (ppm) 6658 g07 2.498 125c 25c ?40c input voltage (v) 0 5 10 15 20 25 2.499 30 35 40 2.496 2.497 2.498 2.499 2.500 2.501 2.502 2.500 output voltage (v) 6658 g08 125c 25c ?40c input voltage (v) 0 5 10 15 2.501 20 25 30 35 40 2.496 2.497 2.498 2.499 2.500 2.502 2.501 2.502 output voltage (v) 6658 g09 output voltage (v) 6658 g01 three typical parts three typical parts temperature (c) ?50 ?25 0 25 50 75 100 125 temperature (c) 150 2.498 2.499 2.500 2.501 2.502 output voltage (v) 6658 g02 i load1 = 150ma v out1 ?50 v out2 temperature (c) ?50 ?25 0 25 50 75 100 125 ?25 150 2.498 2.499 2.500 2.501 2.502 output voltage (v) 6658 g03 125c 25c 0 ?40c output current (ma) 0.1 1 10 100 500 ?100 ?90 ?80 25 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 output voltage change (ppm) 6658 g04 50 125c 25c ?40c output current (ma) 0.1 1 10 100 ?25 ?20 75 ?15 ?10 ?5 0 5 output voltage change (ppm) 6658 g05 125c 25c ?40c
6 for more information www.linear.com/lt6658 2.5v minimum v in to v out1 differential, sourcing 2.5v minimum v in to v out2 differential, sourcing 2.5v v out1 power supply rejection ratio vs frequency 2.5v v out2 power supply rejection ratio vs frequency 2.5v v out1 power supply rejection ratio vs frequency 2.5v v out2 power supply rejection ratio vs frequency 2.5v output accuracy histogram 2.5v supply current vs input voltage 2.5v output disable (od) low supply current vs input voltage t a = 25c, v in = v in1 = v in2 = v out1_f + 2.5v = v out2_f + 2.5v, c out1 = c out2 = 1f, i load = 0ma, unless otherwise noted. typical p er f or m ance c harac t eris t ics lt 6658 6658f 28 20 40 60 80 100 120 psrr (db) 6658 g16 c nr = 10f c out1 = 1f 32 v in = v in1 = v in2 = 6v i load1 = 0a i load1 = 150ma frequency (khz) 0.01 0.1 1 10 100 1000 36 0 20 40 60 80 100 120 psrr (db) 6658 g17 c nr = 10f 40 c out1 = 1f v in = v in1 = v in2 = 6v i load = 0a i load = 50ma frequency (khz) 0.01 0.1 1 10 100 0 1000 0 20 40 60 80 100 120 psrr (db) 6658 g18 0.5 v out1 (v) 2.4985 2.4990 2.4995 2.5000 2.5005 2.5010 2.5015 0 5 1.0 10 15 20 25 30 35 40 number of units 6658 g10 125c 1.5 25c ?40c input?output voltage (v) 1.1 1.3 1.5 1.7 1.9 2.1 0.1 2.0 1 10 100 output current (ma) 6658 g14 2.5 input voltage (v) supply current (ma) 6658 g11 125c 25c ?40c 125c 25c ?40c input voltage (v) 0 0 4 8 12 16 20 24 28 32 36 40 4 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 supply current (ma) 6658 g12 8 125c 25c ?40c input?output voltage (v) 1.1 1.4 1.6 1.9 2.1 0.1 12 1 10 100 200 output current (ma) 6658 g13 c out1 = 1f i load = 0a v in = v in1 = v in2 = 6v c nr = 1f 16 c nr = 10f frequency (khz) 0.01 0.1 1 10 100 1000 0 20 20 40 60 80 100 120 psrr (db) 6658 g15 c out2 = 1f i load = 0a v in = v in1 = v in2 = 6v 24 c nr = 1f c nr = 10f frequency (khz) 0.01 0.1 1 10 100 1000 0
7 for more information www.linear.com/lt6658 2.5v v out2 ac output impedance 50ma load 2.5v v out2 ac output impedance 1ma load 2.5v v out1 ac output impedance 10ma load 2.5v v out1 ac output impedance 150ma load t a = 25c, v in = v in1 = v in2 = v out1_f + 2.5v = v out2_f + 2.5v, c out1 = c out2 = 1f, i load = 0ma, unless otherwise noted. typical p er f or m ance c harac t eris t ics 2.5v turn-on characteristic 2.5v channel to channel isolation v in2 to v out1 2.5v channel to channel isolation v in1 to v out2 2.5v channel to channel load regulation (effects of heating removed) 2.5v channel to channel isolation, time domain lt 6658 6658f 100 frequency (khz) 0.01 0.1 1 10 100 0 20 40 60 1000 80 100 120 140 160 v out1 channel to channel isolation (db) 6658 g24 c out2 = 1f / c nr = open c out2 = 10f / c nr =10f c out2 = 50f / c nr = 10f 0.0001 v in = v in2 = 7v v in1 = 6vdc + 700mv rms i load1 = i load2 = 0a, t a = 25c frequency (khz) 0.01 0.1 1 10 100 0 0.001 20 40 60 80 100 120 140 v out2 channel to channel isolation (db) 6658 g25 v out1 load current (ma) 0.01 1 10 100 500 0 2 4 6 8 10 0.1 12 14 16 18 20 v out2 voltage change (ppm) 6658 g26 1 output impedance () 6658 g19 i out1 = 150ma i out1 = 10ma c out1 = 1f c out1 = 50f frequency (khz) 0.01 0.1 1 10 100 1000 0.0001 c out1 = 1f 0.001 0.01 0.1 1 output impedance () 6658 g20 i out2 = 50ma c out2 = 1f c out2 = 50f frequency (khz) c out1 = 50f 0.01 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 frequency (khz) 1 output impedance () 6658 g22 v in v bypass v out1 v out2 c nr = open c out1 = 1f c out2 = 1f 0.01 50s/div 2v/div 5v/div 2v/div 2v/div 6658 g23 i out1 v out2 c nr = 0.1f c out1 = 1f 0.1 c out2 = 1f 10s/div 150ma 10ma 100v/div 6658 g27 i out2 = 1ma c out2 = 1f c out2 = 50f frequency (khz) 1 0.01 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 10 1 10 output impedance () 6658 g21 c out1 = 1f / c nr = open c out1 = 10f / c nr =10f c out1 = 50f / c nr = 10f v in = v in1 = 7v v in2 = 6vdc + 700mv rms i load1 = i load2 = 0a, t a = 25c
8 for more information www.linear.com/lt6658 t a = 25c, v in = v in1 = v in2 = v out1_f + 2.5v = v out2_f + 2.5v, c out1 = c out2 = 1f, i load = 0ma, unless otherwise noted. typical p er f or m ance c harac t eris t ics 2.5v v out1_s pin input current vs temperature 2.5v od pin current vs od pin input voltage 2.5v tracking (v out1 C v out2 ) vs temperature 2.5v tracking (v out1 C v out2 ) vs input voltage 2.5v tracking (v out1 C v out2 ) vs v out1 load current 2.5v v out1 output noise 0.1hz to 10hz 2.5v v out1 output voltage noise spectrum i load = 0ma 2.5v v out2 output voltage noise spectrum i load = 0ma 2.5v v out2 output noise 0.1hz to 10hz lt 6658 6658f 100 od pin input voltage (v) 0 1 2 3 4 0.1 1 10 100 125 od pin input current (a) 6658 g29 125c 25c ?40c 1s/div output noise (2v/div) 6658 g34 c out1 = 1f c nr = open 150 c nr = 10f frequency (khz) 0.01 0.1 1 10 100 1000 0 60 0 120 180 240 300 noise voltage (nv/ hz ) 6658 g35 frequency (khz) 0.01 0.1 1 25 10 100 1000 0 60 120 180 240 300 noise voltage (nv/ hz ) 50 6658 g36 c nr = open c nr = 10f c out2 = 1f 75 100 125 150 three typical parts 175 200 225 250 v out1_s pin current (na) 6658 g28 three typical parts temperature (c) ?60 ?40 temperature (c) ?20 0 20 40 60 80 100 120 140 ?250 ?50 ?200 ?150 ?100 ?50 0 50 100 150 200 250 ?25 v out1 ? v out2 (v) 6658 g30 three typical parts v in (v) 4 8 12 16 20 24 0 28 32 36 ?150 ?120 ?90 ?60 ?30 0 30 25 60 90 120 150 v out1 ? v out2 (v) 6658 g31 three typical parts v out1 load current (ma) 0.01 0.1 50 1 10 100 1k ?200 ?160 ?120 ?80 ?40 0 75 40 80 120 160 200 v out1 ? v out2 (v) 6658 g32 1s/div output noise (2v/div) 6658 g33
9 for more information www.linear.com/lt6658 t a = 25c, v in = v in1 = v in2 = v out1_f + 2.5v = v out2_f + 2.5v, c out1 = c out2 = 1f, i load = 0ma, unless otherwise noted. typical p er f or m ance c harac t eris t ics 2.5v v out1 output voltage noise spectrum i load = 150ma 2.5v line transient response 2.5v line transient response 2.5v line transient response 2.5v v out2 output voltage noise spectrum i load = 50ma 2.5v v out1 integrated noise i load = 0ma 2.5v v out2 integrated noise i load = 0ma 2.5v v out1 integrated noise i load = 150ma 2.5v v out2 integrated noise i load = 50ma lt 6658 6658f 0 integrated noise (v rms ) 6658 g41 c out2 = 1f i load = 50ma c nr = open c nr = 10f frequency (khz) 0.01 0.1 1 50 10 100 1000 0 10 20 30 40 50 60 100 integrated noise (v rms ) 6658 g42 v in v bypass v out1 v out2 v in = 5v to 5.5v i load = 0ma c nr = open c out1 = c out2 = 1f 150 50s/div 500mv/div 2mv/div 2mv/div 2mv/div 6658 g43 v in v bypass v out1 v out2 200 v in = 5v to 5.5v i load = 0ma c nr = 1f c out1 = c out2 = 1f 50s/div 500mv/div 2mv/div 2mv/div 2mv/div 6658 g44 250 v in v bypass v out1 v out2 v in = 5v to 5.5v i load = 50ma c nr = 1f c out1 = c out2 = 1f 50s/div 500mv/div 300 2mv/div 2mv/div 2mv/div 6658 g45 noise voltage (nv/ hz ) 6658 g37 c nr = open c out1 = 1f c nr = 10f c out2 = 1f c nr = open c nr = 10f frequency (khz) 0.01 0.1 1 10 100 frequency (khz) 1000 0 50 100 150 200 250 300 noise voltage (nv/ hz ) 6658 g38 0.01 c out1 = 1f i load = 0ma c nr = 0pen c nr = 10f frequency (khz) 0.01 0.1 1 10 100 0.1 1000 0 10 20 30 40 50 60 70 integrated noise (v rms ) 1 6658 g39 c out2 = 1f i load = 0ma c nr = open c nr =10f frequency (khz) 0.01 0.1 1 10 10 100 1000 0 10 20 30 40 50 60 70 100 integrated noise (v rms ) 6658 g40 c out1 = 1f i load = 150ma c nr = open c nr = 10f frequency (khz) 0.01 0.1 1 1000 10 100 1000 0 10 20 30 40 50 60
10 for more information www.linear.com/lt6658 t a = 25c, v in = v in1 = v in2 = v out1_f + 2.5v = v out2_f + 2.5v, c out1 = c out2 = 1f, i load = 0ma, unless otherwise noted. typical p er f or m ance c harac t eris t ics v out1 current limit v out2 current limit current limit vs supply voltage lt 6658 6658f 20 40 60 80 100 120 140 0 50 100 v in = 5v 150 200 250 300 350 400 450 500 current limit (ma) 6658 g46 v in = 7.5v v in = 5v v in = 10v temperature (c) ?60 ?40 ?20 0 20 40 60 v in = 10v 80 100 120 140 0 20 40 60 80 100 temperature (c) 120 140 160 current limit (ma) 6658 g47 i out1 i out2 supply voltage (v) 0 5 ?60 10 15 20 25 30 35 40 0 50 100 ?40 150 200 250 300 350 400 450 500 current limit (ma) 6658 g48 ?20 0
11 for more information www.linear.com/lt6658 p in func t ions gnd (pins 1, 2, 6, exposed pad pin 17): these pins are the main ground connections and should be connected into a star ground or ground plane. the exposed pad must be soldered to ground for good electrical contact and rated thermal performance. bypass (pin 3): bypass pin. this requires a 1 f capacitor for bandgap stability. dnc (pin 4, 16): do not connect. keep leakage current from these pins to a minimum. nr (pin 5): noise reduction pin. to band limit the noise of the reference, connect a capacitor between this pin and ground. see applications information section. v out2_s (pin 7): v out2 sense pin. connect this kelvin sense pin at the load. v out2_f (pin 8): v out2 output voltage. a 1 f to 50f output capacitor is required for stable operation. this output can source up to 50ma. od (pin 9): output disable. this active low input disables both outputs. v in2 ( pin 10): input voltage supply for channel 2. bypass v in2 with 0.1 f capacitor to ground. this pin supplies power to buffer amplifier 2. v in1 ( pin 11): input voltage supply for channel 1. bypass v in1 with 0.1 f capacitor to ground. this pin supplies power to buffer amplifier 1. v out1_f (pin 12): v out1 output voltage. a 1 f to 50f output capacitor is required for stable operation. this output can source up to 150ma. v out1_s (pin 13): v out1 sense pin. connect this kelvin sense pin at the load. v in (pin 14): input voltage supply. bypass v in with 0.1f capacitor to ground. nc (pin 15): no connect. lt 6658 6658f
12 for more information www.linear.com/lt6658 b lock diagra m lt 6658 6658f 5 9 17 10 8 7 12 13 11 800 14 800 400 v in thermal shutdown dnc dnc nc gnd gnd 4 gnd gnd od v in2 v in1 v out2_f v out1_f v out2_s v out1_s nr 16 bypass 6658 bd bandgap 15 1 2 6 3
13 for more information www.linear.com/lt6658 the lt6658 combines the low noise and accuracy of a high performance reference and the high current drive of a regulator. the lt6658 is a high performance regula - tor providing two precise low noise outputs with kelvin sense pins. the isolated outputs maintain their precision even when large voltage or current transients exist on the adjacent channel. the lt6658 architecture consists of a low drift bandgap reference followed by an optional noise reduction stage and two independent buffers. the bandgap reference and the buffers are trimmed for low drift and high accuracy. the high gain buffers ensure outstanding line and load regulation. the guidance that follows describes how to reduce noise, lower power consumption, generate different output voltages, and maintain low drift. also included are notes on internal protection circuits, pcb layout, and expected performance . supply pins and ground the lt6658 can operate with a supply voltage from v out? +?2.5 v , to 36v . to provide design flexibility, the lt6658 includes 3 supply pins. the v in pin supplies power to the bandgap voltage reference. the v in1 and v in2 pins supply power to buffer amplifiers 1 and 2, respectively. figure 1 illustrates how current flows independently through each of the output buffers. the simplest configuration is to connect all three supply pins together. to reduce power consumption or isolate the buffer amplifiers, separate the supply pins and drive them with independent supplies. separate v in ,v in1 and v in2 supply pins isolate the bandgap reference and the two outputs v out1_f and v out2_f from each other. for example, a load current surge through v in1 to v out1_f is isolated from v out2_f and the bandgap voltage reference. in figure 2 a 140 ma load current pulse on buffer 1 and the resulting output waveforms are shown. despite the large current step on buffer 1, there is only a small transient at the output of buffer 2. when providing a stable voltage reference to quiet circuits like an adc or dac, it is important the two buffer outputs are isolated. a pplica t ions i n f or m a t ion to minimize power consumption each supply pin can be operated with its minimum voltage. for example, if buffer ?1 has a 2.5 v output, v in1 can be operated at 5 v. if buffer?2 s output is run at 3 v, run v in2 at 5.5 v. the power savings gained by minimizing each supply voltage can be considerable. excessive ground current and parasitic resistance in ground li nes can degrade load regulation. unlike an ldo, the ground current of the lt6658 is designed such that ground current does not increase substantially when sourcing a large load current. all three ground pins and exposed pad should be connected together on the pcb, through a ground plane or through a separate trace terminating at a star ground. the supply pins can be powered up in any order without an adverse response. however, all three supplies pins need the minimum specified voltage for proper operation. lt6658-2.5 + ? + ? + ? 6658 f01 indicates current flow + ? + ? load2 gnd gnd gnd load1 thermal shutdown bandgap v in1 v in2 v in v out1_f v out2_f 14 11 10 1,2 17 6 8 12 figure 1. lt6658 current flow through the supply pins figure 2. 10ma to 150ma load step on v out1 lt 6658 6658f c out1 = 10f c out2 = 10f load current v out1 v out2 50s/div 20mv/div 100ma/div 100v/div 6658 f02
14 for more information www.linear.com/lt6658 a pplica t ions i n f or m a t ion input bypass capacitance each input voltage pin requires a 0.1 f capacitor located as close to the supply pin as possible. a 10 f capacitor is recommended for each supply where the supply enters the board. when the supply pins are connected together, a single 0.1f and single 10f capacitor can be used. the bypass pin requires a 1f capacitor for stability. stability and output capacitance the lt6658 is designed to be stable for any output ca - pacitance between 1 f and 50 f, under any load condi- tion, specified input voltage, or specified temperature. choosing a suitable capacitor is important in maintaining stability. preferably a low esr and esl capacitor should be chosen. the value of the output capacitor will affect the settling response. care should be exercised in choosing an output capacitor, as some capacitors tend to deviate from their specified value as operating conditions change. although ceramic capacitors are small and inexpensive, they can vary considerably over the dc bias voltage. for example, the capacitance value of x5r and x7r capacitors will change significantly over their rated voltage range as shown in figure 3. in this example the 1 f x5r capacitor loses almost 75% of its value at its rated voltage of 10v. dc bias (v) 0 capacitance (f) 1.2 1.0 0.8 0.6 0.4 0.2 0.0 5 9 3 7 6658 f03 10 4 8 2 6 1 x5r x7r figure 3. capacitance value of a 1 f x7r over its full rated voltage x5r and x7r capacitors will also vary up to 20% or more over a temperature range of C55 c to 125 c. this change in capacitance will be combined with any dc bias voltage variation. film capacitors do not vary much over temperature and dc bias as much as x5r and x7r capacitors, but gener - ally they are only rated to 105 c. film capacitors are also physically larger. effective series resistance ( esr) in the output capacitor can add a zero to the loop response of the output buffers creating an instability or excessive ringing. for the best results keep the esr at or below 0.2. one measure of stability is the closed loop response of the output buffer. by driving the nr pin, a closed loop response can be obtained. in figure 4 the closed loop response of the output buffer with three different output capacitance values is shown. in the figure 5 the same plot is repeated with a 150ma load. a large value electrolytic capacitor with a 1 f to 50 f ce - ramic capacitor in parallel can be used on the output pins. the buffers will be stable, and the bandwidth will be lower. figure 4. lt6658 closed loop response of the channel?1 output buffer for 3 values of output capacitance and no load lt 6658 6658f ?10 0 10 20 gain (db) 6658 f04 c out1 = 1f c out1 = 10f c out1 = 50f frequency (khz) 0.01 0.1 1 10 100 1k ?20
15 for more information www.linear.com/lt6658 figure 5. lt6658 closed loop response of the channel?1 output buffer for 3 values of output capacitance and 150ma load the channel 2 output buffer has a similar response. start-up and transient response when the lt6658 is powered up, the bandgap reference charges the capacitor on the bypass pin. the output buffer follows the voltage on the bypass pin charging the output capacitor. figure 6 shows the start- up response on the bypass and v out1_f pins for three different output capacitor values. the start- up response is limited by the current limit in the bandgap charging the bypass capaci - tor. the turn - on time is also restricted by the current limit in the output buffer and the size of the output capacitor. a larger output capacitor will take longer to charge. adding a capacitor to the nr pin will also affect turn- on time. figure 6. start-up response on the bypass and v out1_f pins the test circuit for the transient response test is shown in figure 7. the transient response due to load current steps are shown in figures 8, 9, and 10. a pplica t ions i n f or m a t ion 1f 1f 1f 0.1f v in 5v i gen 6658 f07 10 lt6658-2.5 1, 2, 6, 17 v in1 v in2 v in od bypass 11 12 14 9 3 v out2_f v out2_s v out1_f v out1_s 8 7 12 13 gnd figure 7. load current response time test circuit in figure 8 and figure 9, a 75 ma and 140 ma load step is applied to channel?1, respectively. in figure 10, a 40ma load step is applied to channel?2. the settling time is de - termined by the size and edge rate of the load step, and the size of the output capacitor. figure 8. lt6658-2.5 output 1 response to 75ma load step figure 9. lt6658-2.5 output 1 response to 140ma load step lt 6658 6658f 100 1k ?20 ?15 ?10 ?5 0 5 10 15 c out1 = 1f 20 gain (db) 6658 f05 v in v bypass c out1 = 1f v out1 v out1 v out1 c out1 = 10f c out1 = 10f c out1 = 50f 100s/div 2v/div 5v/div 2v/div 2v/div 2v/div 6658 f06 i out1 v out1 c out1 = 50f v out2 c nr = 0.1f c out1 = 1f c out2 = 1f 10s/div 20mv/div 85ma 10ma 50v/div 6658 f08 frequency (khz) i out1 v out1 v out2 c nr = 0.1f c out1 = 1f c out2 = 1f 10s/div 20mv/div 150ma 10ma 0.01 100v/div 6658 f09 0.1 1 10
16 for more information www.linear.com/lt6658 a pplica t ions i n f or m a t ion figure 10. lt6658-2.5 output 2 response to 40ma load step output voltage scaling each output can be configured with external resistors to gain up v out , enabling the output to be set from 2.5 v to 6v. unity gain is configured by tying the sense and force pins together. in figure 11, channel ?2 is configured with a gain of 2 (see typical applications section for more examples). this can be done to one or both of the channels. when configuring a gain >1 make sure that the associated supply pin is 2.5 v higher than the v out_f pin. also note that the absolute maximum voltage on the output pins ( both force and sense) is 6 v. place the gain resistors close to the part keeping the traces short. since this is part of the feedback path, the feedback resistor should be connected near the load, avoiding any resistive parasitic in the high current path. another source of error is having some resistance in the feedback network to ground. if possible the resistor should be connected as close as possible to the chip ground. when using non- unity gain configurations, v os drift errors are possible. there is an 800 resistor in the kelvin sense line which is designed to cancel base current variation on the input of the buffer amplifier. matching the impedances on the positive and negative inputs reduces base current error and minimizes v os drift. a feedback network will have a small base current flowing through the feedback resistor possibly causing a small v os drift. referring to the 2.5 v v out1_s pin input current vs tem - perature plot in the typical performance characteristics section, the input sense current varies about 50na between C40c and 125 c. this 50 na variation may cause a 0.5mv voltage change across the 10 k feedback resistor affect - ing the output voltage. lt6658-2.5 + ? 6658 f11 1f 1f gnd gnd gnd + ? + ? thermal shutdown bandgap v in1 v in2 v in v out1_f v out2_f v out1_s v out2_s 14 11 10 1,2 17 6 8 12 7 13 10k 10k figure 11. the lt6658-2.5 with output?2 configured for a 5 v output kelvin sense pins to ensure the lt6658 maintains good load regulation, the kelvin sense pins should be connected close to the load to avoid any voltage drop in the copper trace on the force pin. it only takes 10 m of resistance to develop a 1.5mv drop with 150 ma. this would cause an ideal 2.5v output voltage to exceed the 0.05% specification at the load. the circuit in figure 12 a illustrates how an incorrect kelvin sense connection can lead to errors. the parasitic resistance of the copper trace will cause the output voltage to change as the load current changes. as a result, the voltage at the load will be lower than the voltage at the sense line. the circuit in figure 12 b shows the proper way to make a kelvin connection with the sense line as close to the load as possible. the voltage at the load will now be well regulated. the v out1_s current is typically 135na, and a low resistance in series with the kelvin sense input is unlikely to cause a significant error or drift. lt 6658 6658f 50ma 10ma 50v/div 6658 f10 i out2 v out1 v out2 c nr = 0.1f c out1 = 1f c out2 = 1f 10s/div 5mv/div
17 for more information www.linear.com/lt6658 6658 f12 a) b) lt6658-2.5 + ? r par r load i load v par v out2_f v out2_s 12 13 + ? lt6658-2.5 + ? r par r load i load v par v out2_f v out2_s 12 13 + ? figure 12. how to make a proper kelvin sense connection output noise and noise reduction (nr) the lt6658 noise characteristic is similar to that of a high performance reference. the total noise is a combination of the bandgap noise and the noise of the buffer amplifier. the bandgap noise can be measured at the nr pin and is shown in figure 13 with a 1 f capacitor, 10 f capaci - tor and no capacitor on the nr pin. the bandgap can be bandlimited by connecting a capacitor between the nr pin and ground. the rc product sets the low pass 3db corner attenuating the out-of-band noise of the bandgap. an internal 400 15% resistor combines with the external capacitor to create a single-pole low pass filter. table 1 lists capacitor values and the corresponding 3 db cutoff frequency. figure 13. lt6658 bandgap output voltage noise a pplica t ions i n f or m a t ion table 1. nr capacitor values and the corresponding 3 db frequency nr capacitor (f) nr 3db frequency (hz) 0.1 3979 0.22 1809 0.47 847 1 398 2.2 181 4.7 85 10 40 22 18 the primary trade-off for including an rc filter on the nr pin is a slower turn-on time. the effective resistance seen by the nr capacitor is 400. the rc time constant ( ) for charging the nr capacitor is ? =?r ??? c. to reach the initial accuracy specification for the lt6658 , 0.05%, it will take 7.6 of settling time. example settling time constants are shown in table 2. an example of the nr pin charging and the relationship to the output voltage is shown in figure?14. the appropriate trade-off between settling time and noise limiting is specific to the demands of each unique application. table 2. settling times for different nr capacitor values output voltage (v) nr pin resistance () c (f) 7.6 (ms) 2.5 400 0.01 0.030 0.1 0.30 1 3.04 figure 14. start-up response on the nr pin and v out_f lt 6658 6658f 100 1000 0 50 100 150 200 250 noise (nv/ hz ) 6658 f13 c nr = 0f v in c nr = 1f c out1 = 1f v nr v out1 500s/div 5v/div 1v/div 1v/div 6658 f14 c nr = 1f c nr = 10f frequency (khz) 0.01 0.1 1 10
18 for more information www.linear.com/lt6658 a pplica t ions i n f or m a t ion the lt6658s two low noise buffer amplifiers measure 8nv/hz . the combined bandgap and buffer noise results for buffer?1 and buffer?2 are shown in the typical per - formance characteristics section. note that beyond the nr pin cutoff frequency, the noise is primarily due to the buffer amplifiers. as shown, the buffer can be bandlimited by increasing the size of the output capacitors. figure 15 and figure 16 show the total integrated noise of buffer ?1 and buffer?2, respectively. figure 15. lt6658-2.5 total integrated output voltage noise with c nr = 22f and c out1 = 1f, 50f and 100f output capacitors figure 16. lt6658-2.5 v out2 integrated noise with c nr = 22f and c out2 = 1f, 50f and 100f the output voltage noise does not change appreciably as load current increases. the wide range of output capacitance capability and the nr pin capacitance allows the lt6658 noise density spectrum to be customized for specific applications. table 3 lists the output noise for different conditions. the output and nr capacitances also affect the ac psrr response as shown in table 3. see the typical performance characteristics section for more information. table 3. output noise and ripple rejection typical values parameter conditions typ units output noise voltage (v out1 and v out2 ) frequency = 10hz, c out = 1f, c nr = 0f, i load = full current* frequency = 10hz, c out = 1f, c nr = 10f, i load = full current* frequency = 1khz, c out = 1f, c nr = 0f, i load = full current* frequency = 1khz, c out = 1f, c nr = 10f, i load = full current* 176 164 157 9 nv/hz nv/hz nv/hz nv/hz output rms noise 10hz to 100khz, c out1 = 1f, c nr = 0f 10hz to 100khz, c out1 = 1f, c nr = 10f 10hz to 100khz, c out1 = 50f, c nr = 22f 10hz to 100khz, c out2 = 1f, c nr = 0f 10hz to 100khz, c out2 = 1f, c nr = 10f 10hz to 100khz, c out2 = 50f, c nr = 22f 26.2 1.5 0.7 21.8 1.1 0.9 ppm rms ppm rms ppm rms ppm rms ppm rms ppm rms power supply rejection (v in1 = v out1 + 3v, v in2 = v out2 + 3v) v ripple = 500mv p-p , f ripple = 120hz, i load1 = 150ma, c out1 = 1f, c nr = 1f v ripple = 150mv p-p , f ripple = 10khz, i load1 = 150ma, c out1 = 1f, c nr = 1f v ripple = 150mv p-p , f ripple = 100khz, i load1 = 150ma, c out1 = 1f, c nr = 1f v ripple = 150mv p-p , f ripple = 1mhz, i load1 = 150ma, c out1 = 1f, c nr = 1f v ripple = 500mv p-p , f ripple = 120hz, i load2 = 50ma, c out2 = 1f, c nr = 1f v ripple = 150mv p-p , f ripple = 10khz, i load2 = 50ma, c out2 = 1f, c nr = 1f v ripple = 150mv p-p , f ripple = 100khz, i load2 = 50ma, c out2 = 1f, c nr = 1f v ripple = 150mv p-p , f ripple = 1mhz, i load2 = 50ma, c out2 = 1f, c nr = 1f 107 96 65 64 104 96 66 65 db db db db db db db db * the full current for i load is 150ma and 50ma for output 1 and output 2, respectively. lt 6658 6658f 10 100 1000 10000 0 1 2 3 4 5 c nr = 22f integrated noise (v rms ) 6658 f15 c nr = 22f c out2 = 1f c out2 = 50f c out2 = 100f frequency (khz) 0.01 0.1 1 c out1 = 1f 10 100 1000 10000 0 1 2 3 4 5 c out1 = 50f integrated noise (v rms ) 6658 f16 c out1 = 100f frequency (khz) 0.01 0.1 1
19 for more information www.linear.com/lt6658 power supply rejection the three supply pins provide flexibility depending on the demands of the application. the lt6658 provides excellent ac power supply rejection with all three supply pins connected together. superior performance can be achieved when the supply pins are independently powered. for example, use a quiet supply for the v in pin. this will isolate the bandgap circuit from the outputs. further, each buffer can be supplied independently providing >140 db of isolation across some frequencies. table 3 summarizes several conditions of power supply rejection. output disable the od pin disables the output stage of both output buf - fers. this pin is useful for disabling the buffers when fault conditions exist. for example, if external circuitry senses that the load is too hot or there is a short circuit condi - tion, asserting this pin will remove the output current. this active low pin will disable the output buffers when the voltage on the pin is less than 0.8 v. when the input voltage is greater than 2v the lt6658 is enabled. the start-up time when the lt6658 enables is determined by the size of the output capacitor. figure 17 is an example of the lt6658-2.5 being enabled and disabled. the od pin has an internal pull-up current that will keep the output buffers enabled when the od pin floats. in noisy environ - ments, it is recommended that od be tied high explicitly. figure 17. the output disable function internal protection there are two internal protection circuits for monitoring output current and die temperature. a pplica t ions i n f or m a t ion the output stage of each output buffer is disabled when the internal die temperature is greater than 165 c. there is 11 c of hysteresis allowing the part to return to normal operation once the die temperature drops below 154c. in addition, a short circuit protection feature prevents the output from supplying an unlimited load current. a fault or short on either output force pin will cause the output stage to limit the current and the output voltage will drop accordingly to the output fault condition. for example, if a 1 fault to ground occurs on channel?1, the circuit protection will limit both outputs. a load fault on either channel will affect the output of both channels. power dissipation to maintain reliable precise and accurate performance the lt6658 junction temperature should never exceed t jmax ? =? 150c. if the part is operated at the absolute maximum input voltage and maximum output currents, the mse package will need to dissipate over 7 watts of power. the lt6658 is packaged in an mse package with an ex - posed pad . the thermal resistance junction to case, jc , of the mse package is 10 c/w. the thermal resistance junction to ambient, ja , is determined by the amount of copper on the pcb that is soldered to the exposed pad. when following established layout guidelines the ja can be as low as 35c/w for the mse package. as a simple example, if 2 watts is dissipated in the mse package, the die temperature would rise 70 c above the ambient temperature. the following expression describes the rise in temperature ( ja ??? p total ), and the increase of junction temperature over ambient temperature as t j ?=?t a + ja ???p total where t j is the junction temperature, t a is the ambient temperature, ja is the thermal resistance junction to ambi - ent, and p total is the total power dissipated in the lt6658. further, if the package was initially at room temperature (25c), the die would increase to 95 c. at 3 watts the die would exceed the specified h-grade temperature of 125 c. the derating curve for the mse package is shown in figure 18. three different ja curves are shown. ja is dependent on the amount of copper soldered to the lt 6658 6658f 1v/div 6658 f17 od v out2 v out1 c out1 = 1f c out2 = 1f 500s/div 5v/div 1v/div
20 for more information www.linear.com/lt6658 a pplica t ions i n f or m a t ion exposed pad. multiple layers of copper with multiple vias is recommended. figure 18. mse derating curve the power dissipated by the lt6658 can be calculated as three components. there is the power dissipated in the two output devices ( one for each channel) and the power dissipated within the remaining internal circuits. calculate the power in the remaining circuits using the following expressions p static = v in ? i static where p static is the power dissipated in the lt6658 minus the output devices, v in is the supply voltage, and i static is the current flowing through the lt6658. to calculate the power dissipated by the output devices use p1 = (v in1 C v out1 ) ? i out1 p2 = (v in2 C v out2 ) ? i out2 where p1 and p2 are the power dissipated in the chan- nel ?1 and channel ?2 output devices, v in1 and v in2 are the supply voltages for each channel, and v out1 and v out2 are the output voltages. finally, p total = p1 + p2 + p static where p total is the total power dissipated in the package. p static tends to be much smaller than p1 or p2. to lower the power in the output devices, the supply volt- age for each of the output buffers can be reduced to only 2.5v above the output voltage. for example, with a 2.5v output, use a 5 v supply and maximum output current on each channel, the total power can be calculated as p1 = (5v C 2.5v ) ? 0.15a = 0.375w p2 = (5v C 2.5v ) ? 0.05a = 0.125w p static = 5v ? 0.001a = 0.005w p total = 0.375w + 0.125w + 0.005w = 0.505w which is an operating condition that can be tolerated above 100c when proper heat sinking is used. in figure 19, the output current in both channels is increased linearly for three values of v in where all three supply pins are connected together. as v in and i out increases, the total power increases proportionally. when the supply voltage is 30 v and the total output current is 200 ma, the power exceeds 5 w, representing a junction temperature increase of over 175 c using a best case scenario when using a mse with a ja ?=?35c/w. figure 20, illustrates how rapidly power increases when the supply voltage increases, especially with 200ma of total load current. if possible, reduce the voltage on v in 1 and v in 2 , which in turn will reduce the power dissipated in the lt6658 package. the lt6658 is a high performance reference and extreme thermal cycling will cause thermal hysteresis and should be avoided if possible. see the thermal hysteresis section. output current (a) 0 power (w) 6 5 4 3 2 1 0 0.14 0.16 0.18 0.06 6658 f19 0.2 0.08 0.1 0.12 0.040.02 v in = 5v v in = 15v v in = 30v figure 19. power dissipation vs output current when the supply voltage, v in1 or v in2 , is greater than 30v, a hard short from either output to ground can result in more than 3 to 6 watts of instantaneous power which can damage the output devices. lt 6658 6658f 100 125 0 1 2 3 max. power dissipation (w) 6658 f18 ja = 35c/w ja = 60c/w ja = 85c/w temperature (c) 0 25 50 75
21 for more information www.linear.com/lt6658 supply voltage (v) 0 power (w) 7 6 5 4 3 2 1 0 35 15 6658 f20 40 20 25 30 105 200ma no load figure 20. power dissipation vs supply voltage safe operating area the safe operating area, or soa, describes the operating region where the junction temperature does not exceed t jmax . in figure 21, the soa for the lt6658 is plotted. in this plot, the output voltage is 2.5 v and the output current is the combined current of both channels. the soa is plot - ted for three values of ja . this illustrates how a lower ja value will remove more heat and allow more power to be dissipated through the package without damaging the part. supply voltage ? load voltage (v) load current (ma) 6658 f21 1000 100 10 1 1 10 100 ja = 35c/w ja = 60c/w ja = 85c/w t a = 25c figure 21. soa for the lt6658 a pplica t ions i n f or m a t ion there are three regions in the soa plot. the top left region is the maximum rated current of the lt6658. the diagonal lines in the middle are where both the load current and supply voltage must be reduced as not to exceed t jmax . the bottom right is the maximum voltage of the lt6658. it is important to realize the soa limit is an absolute maxi - mum rating at t jmax . it is not recommended to operate at this limit for extended periods of time. pcb layout the lt6658 is a high performance reference and there - fore, requires good layout practices. each supply pin should have 0.1 f capacitor placed close to the package. the output capacitors should also be close to the part to keep the equivalent series resistance to a minimum. as mentioned earlier, avoid parasitic resistance between the sense line and the load. any error here will directly affect the output voltage. all three ground pins (1, 2, 6) , and exposed pad should be connected together, preferably in a star ground con - figuration or ground plane. the exposed pad, pin?17, is electrically connected to the die and must be connected to ground. it is also necessary for good thermal conductivity to use plenty of copper and multiple vias. if the design requires the part to dissipate significant power, consider using 2 oz copper and/or a multilayer board with a large area of copper connected to the exposed pad. note that ja is proportional to the amount of copper soldered to the exposed pad. preferably the copper should be on the outermost layers of the board for good thermal dissipation. a sample layout is shown in figure 22 a. the sense lines, v out1_s and v out2_s should connect as close as possible to the top of the load. in figure 22 b, a star ground is shown where the lt6658 ground is directly connected to the bottom of the load. connect all other grounds in the system to this same point. minimize the resistance between gnd side of the load and the lt6658 gnd pins, especially for applications where the lt6658 is sinking current. this minimizes load regulation errors. lt 6658 6658f
22 for more information www.linear.com/lt6658 a pplica t ions i n f or m a t ion lt6658-2.5 (a) lt6658 sample pcb layout (b) bring out ground to the load and make a star connection + ? r load v out2_f v out2_s 12 1, 2, 6, 17 10, 11, 14 13 v in , v in1 , v in2 gnd 5v to 36v star-ground 6658 f22 figure 22. long term drift long term drift is a settling of the output voltage while the part is powered up. the output slowly drifts at levels of parts per million ( ppm). the first 1000 hours of being powered up sees the most shift. by the end of 3000 hours, most parts have settled and will not shift appreciably. the plot in figure 23 is representative of the lt6658 long term drift. figure 23. lt6658 long term drift ir reflow shift as with many precision devices, the lt6658 will experi- ence an output shift when soldered to a pcb. this shift is caused by uneven contraction and expansion of the plastic mold compound against the die and the copper pad underneath the die. critical devices in the circuit will experience a change of physical force or pressure, which in turn changes its electrical characteristics, resulting in subtle changes in circuit behavior. lead free solder reflow profiles reach over 250 c, which is considerably higher than lead based solder. a typical lead free ir reflow profile is shown in figure 24. the experimental results simulating this shift are shown in figure 25. in this experiment, lt6658 is run through an ir reflow oven once and three times. minutes temperature (c) 0 0 75 ramp down t p 30s 40s t l 130s 120s 150 225 300 2 4 6 8 6658 f24 10 ramp to 150c 380s t p = 260c t l = 217c t s(max) = 200c t s = 190c t = 150c figure 24. lead free reflow profile lt 6658 6658f time (hours) 0 500 1000 1500 2000 2500 3000 ?50 0 50 100 150 200 long term drift (ppm) 6658 f23
23 for more information www.linear.com/lt6658 a pplica t ions i n f or m a t ion figure 25. ?v out1 due to ir reflow shift thermal hysteresis thermal hysteresis is caused by the same effect as ir reflow shift. however, in the case of thermal hysteresis, the temperature is cycled between its specified operating extremes to simulate how the part will behave as it experi - ences extreme temperature excursions and then returns to room temperature. for example, an h-grade part is repeatedly cycled between 125 c and C40 c. each time the temperature passes through 25 c, the output voltage is recorded. the plots in figure 26 illustrate the change in output voltage from the initial output voltage after a cold and hot excursion. (a) h-grade (b) i-grade figure 26. thermal hysteresis lt 6658 6658f ?100 ?50 0 50 0 2 4 6 8 10 mse?16 12 14 number of units 6658 f25 max avg hot cycle 25c to 125c to 25c max avg cold cycle 25c to ?40c to 25c change in output voltage (ppm) ?100 1 cycle ?75 ?50 ?25 0 25 50 75 100 0 2 3 cycles 4 6 8 10 12 14 number of units 6658 f26a max avg hot cycle 25c to 85c to 25c change in output voltage (ppm) max avg cold cycle 25c to ?40c to 25c change in output voltage (ppm) ?100 ?75 ?50 ?25 0 25 50 ?300 75 100 0 2 4 6 8 10 12 14 ?250 16 18 20 22 24 number of units 6658 f26b ?200 ?150
24 for more information www.linear.com/lt6658 typical a pplica t ions 200ma reference single supply precision data acquisition circuit 2f 1f 0.1f 5.15v < v in < 36v r load 6658 ta02 0.03 0.01 lt6658-2.5 v in1 v in2 v in od bypass 11 10 14 9 3 v out2_f v out2_s v out1_f v out1_s 8 7 12 13 gnd 1, 2, 6, 17 6658 ta03 1k v cm v ? 4 5 6 v + 3 8 1 2 1k 1k 35.7 3300pf 35.7 1k 1k v cm 1k 0.41v 3.69v 0.41v 3.69v 4.096v 6.6v 47f 10f ltc2378-20 ref/dgc in + ref v dd 2.5v in ? ?3.28v 3.28v 0v 6800pf 6800pf ? + ltc6362 13.7k 21.5k 10f 1f lt6658-2.5 v in1 v in2 v in od v out2_f v out2_s 8 7 12 13 10 11 9 14 1, 2, 6, 17 gnd bypass v out1_f v out1_s 0.1f lt 6658 6658f
25 for more information www.linear.com/lt6658 lt6658 driving tw o code dependent dac reference inputs. separate dac reference biasing eliminates code dependent reference current interaction typical a pplica t ions lt6658 driving the ltc2323-16 dual adc with independent voltage references 5v to 36v 0.1f 7.5v to 36v 0.1f 10f 10f 10k 10k 2.5v 5v ltc2323-16 gnd 6658 ta04 refout2 refout1 refrtn1 refrtn2 refint 1f 1f 1f lt6658-2.5 v in v in1 14 11 10 v out2_f v out2_s 12 13 gnd bypass 1, 2, 6, 17 v out1_f v out1_s 8 v in2 7 v ref 2.5v 5v v dd ltc2641-16 4.7f ref 1 6 8 v out gnd 6658 ta05 1f 0.1f 7 5 4 3 2 cs sclk din clr v dd ltc2641-16 ref 6 v out gnd 5 4 3 2 r par * cs sclk din clr v ref 2.5v 5v 4.7f 1 8 0.1f 7 r par * 5v < v in < 36v lt6658-2.5 v in v in1 v in2 14 11 10 v out2_f v out2_s 8 7 12 13 gnd 1, 2, 6, 17 v out1_f v out1_s bypass 16-bit dac *r par is the parasitic resistance of the board trace and should be > 0.048 to maintain good inl 16-bit dac 0.1f lt 6658 6658f
26 for more information www.linear.com/lt6658 typical a pplica t ions r1 and r2 tolerance (%) r par () i load (ma) error (mv) 1 0.05 0 35.4 1 0.05 150 42.9 0.1 0.05 0 3.5 0.1 0.05 150 11.0 0.1 0.02 150 6.5 0.1 0.01 150 5.0 r1 and r2 tolerance errors added root-sum-square common errors for non-unity gain applications lt6658-2.5 6658 ta06 1f 1f 0.1f bypass 1f 7.5v to 36v kelvin sense error: r par will cause an error v error = i load ? r par . connect the top of r1 directly to the top of r load . resistor tolerance error: gain network error can be reduced by using a matched resistor network such as the lt5400. v error = i load ? r par 1f gnd gnd gnd + ? + ? thermal shutdown bandgap v in2 v in1 v in v out2_f v out1_f v out2_s v out1_s 14 10 11 2 3 gnd 17 6 12 8 13 7 r1 10k r2 10k i load r load r par v ideal = 5v 1 load current (ma) load voltage error due to parasitic resistance load voltage error (mv) 100 10 1 0.1 -10 10 30 110 130 150 50 70 90 0.1 0.05 0.01 lt 6658 6658f
27 for more information www.linear.com/lt6658 typical a pplica t ions 1f 10f 0.1f 10f 10f 0.1f 7.5v to 36v 6658 ta08 1f 1f 1f 1f lt6658-2.5 v in1 v in2 v in od bypass 11 10 14 9 3 v out2_f v out2_s v out1_f v out1_s 8 7 12 13 gnd gnd (pad) 1, 2, 6 17 v ref + v ref ? v in + v in ? v cc gnd ltc2440 335 335 335 1f v ref + v ref ? v in + v in ? v cc gnd ltc2440 335 335 335 1f v ref + v ref ? v in + v in ? v cc gnd ltc2440 335 335 335 1f v ref + v ref ? v in + v in ? v cc gnd ltc2440 335 335 335 1f 10k 2.5v 5v 10k ltc2440 and strain gauge bias automotive reference and supply voltage application lt6658 biasing multiple strain gauges 1f 1f 1f 1f 0.1f 12v battery 2.5v 50ma reference voltage 5v 150ma supply voltage 6658 ta07 10k 10k lt6658-2.5 v in v in1 v in2 od bypass 14 11 10 9 3 v out2_f v out2_s v out1_f v out1_s 8 7 12 13 gnd 1, 2, 6, 17 lt 6658 6658f
28 for more information www.linear.com/lt6658 typical a pplica t ions recursive reference application (v out1 supplies power to v in and v in2 ) low drift regulator application precision low drift application drift = 1.5ppm/c; C40c to 125c recursive reference power supply rejection ratio 6658 ta09a 11 8 7 12 13 5 3 1, 2, 6, 17 10 14 14 11 10 8 7 12 13 1,2,6,17 5 3 lt 6658 6658f 10f 10f v in 7.5v to 36v v out1_f v in1 bypass lt6658-2.5 v out1_s v out2_f 1f v in2 bandgap 2.5v v out2_s gnd nr v out2 v out1 5v 4.7v 1n5230 1f 1n4148 1n4148 frequency (khz) 0.001 0.01 0.1 1 10 100 0 1f 20 40 60 80 100 120 140 power supply rejection ratio (db) 6658 ta09b 1f 400 1f 1f 1f 400 1f shdn in gnd out s out f 1f ltc6655-2.5 v in 5v to 13.2v v out1_f v in1 bypass lt6658-2.5 v out1_s v out2_f v in2 10k bandgap 2.5v v out2_s gnd 6658 ta10a nr v out2 v out1 2.5v nr 10k v out1 v out2 temperature (c) ?40 ?20 0 20 40 60 80 1.5k 1w 100 120 140 2.498 2.499 2.500 2.501 2.502 output voltage (v) 6658 ta10b
29 for more information www.linear.com/lt6658 p ackage descrip t ion msop (mse16) 0213 rev f 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 16 16151413121110 1 2 3 4 5 6 7 8 9 9 1 8 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref mse package 16-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1667 rev f) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. please refer to http://www .linear.com/product/lt6658#packaging for the most recent package drawings. lt 6658 6658f
30 for more information www.linear.com/lt6658 ? ? linear technology corporation 2016 lt 0816 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/lt6658 r ela t e d p ar t s typical a pplica t ion part number description comments lt1460 micropower series references 20ma output drive, 0.075% accuracy, 10ppm/c drift lt1461 precision low dropout series references 50ma output drive, 0.04% accuracy, 3ppm/c drift, 50a supply current, 300mv dropout lt 6654 all purpose, rugged and precise series references 10ma output drive, 0.05% accuracy, 10ppm/c drift, 100mv dropout, 1.6ppm p-p noise (0.1hz to 10hz), C55c to 125c ltc6655 precision low noise series references 5ma output drive, 0.025% accuracy, 2ppm/c max, 0.25ppm p-p noise (0.1hz to 10hz), C40c to 125c lt 6660 t iny micropower series references 20ma output drive, 0.2% accuracy, 20ppm/c drift, 2mm 2mm dfn package lt1761 low noise low dropout linear regulator 100ma output drive, 300mv dropout, v in = 1.8v to 20v, 20v rms noise (10hz to 100khz), thinsot? package lt 3042 ultralow noise, ultrahigh psrr linear regulator 200ma output drive, 350mv dropout, v in = 1.8v to 20v 0.8v rms noise (10hz to 100khz), 79db psrr (1mhz) LT3050 low noise linear regulator with current limit and diagnostic functions 100ma output drive, 300mv dropout, v in = 2v to 45v, 30v rms noise (10hz to 100khz), 50a supply current, adj. output lt 3060 micropower, low noise, low dropout linear regulator 100ma output drive, 300mv dropout, v in =1.7v to 45v, 30v rms noise (10hz to 100khz), 40a supply current, adj. output lt 3063 micropower, low noise, low dropout linear regulator with output discharge 200ma output drive, 300mv dropout, v in =1.6v to 45v, 30v rms noise (10hz to 100khz), 40a supply current + ? + ? s 14 11 10 8 7 12 13 1,2,6,17 5 3 lt 6658 6658f 1k 1k 1k 35.7 35.7 21k 13.7k 10k 10k 1f 1f 1f 1k 1k 10f 464 400 1f v in 7.5v to 36v v out1_f 10f v in1 bypass lt6658-2.5 v out1_s 2.5v (x7r, 1210 size) 6658 ta11 lt5400-4 v out2_f v in2 ltc6362 bandgap 5v 4.096v v out2_s gnd 3.28v 0v ?3.28v to other analog circuits 3300pf nr in + in ? v dd ref gnd ref/ dgc ltc2379-18 v ocm 6800pf 6800pf 47f 1k

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