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1 fn6788.2 caution: these devices are sensitive to electrostatic discharge ; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil ame ricas llc xdcp is a trademark of intersil americas inc. copyright intersi l americas llc 2008, 2010, 2015. all rights reserved all other trademarks mentioned are the property of their respec tive owners. isl22102 dual, audio, push-button cont rolled potentiometer (xdcp?) 32 tap, push-button, dual audio logarithmic potentiome ter with buffer amplifiers and audio detection the isl22102 integrates t wo digitally controlled potentiometers (dcp) with buf fered wiper outputs and an internal bias voltage generato r (vb) on a monolithic cmos integrated circuit. the wiper pos ition is adjust ed by the user through simple up and down pus h buttons, ideal for stereo volume control in audio applications. each potentiometer is impl emented using 31 polysilicon resistors in a logarithmic array. between each of the resistors are tap points connected to the wiper terminal through switches. when powered up, the wipers are reset to the -20db position. in addition to the isl22102s low noise design, the isl22102 also contains a zero-crossing de tection circuitry to further minimize click and pop nois e during volume transition. the internal vb generator o f the isl22102 provides a precision middle scale volt age reference that reduces external circuitry and sim plifies application design. the isl22102 implements two p ower saving techniques for power critical applications. it is a standby mode that can be enabled to reduce the power c onsumption of the part when dcp is not in use. the par t also has audio detection circuitry that provides an indication flag to external devices and services. the flag can be delayed through d0, d1 and d2 pin configuration. by connecting the flag to the standby pin (sb ), it will automatically put the part into standby mode. pinout features ? dual audio control C two 32 taps log pots ? buffered wiper outputs ? audio detection with thres hold input and controlled delay ? zero amplitude wiper switching (zaws) ? simple push-button interface ? auto increment/decremen t after 1s button press ? standby mode ? mute function ? total resistance: 18.5k ? each dcp (typical) ? voltage operation - vcc = 2.7v to 5.5v - avcc = 2.7v to 5.5v ? temp range = -40c to +85c ? package options - 20 ld tssop -20 ld qfn ? pb-free (rohs compliant) audio performance ? 0db to -72db volume control ? -90db mute ? snr: -90db ? thd+n: 0.01% @ 1khz ? crosstalk rejection: -100db @ 1khz ? channel-to-channel variation: 0.1db ? mid point 3db-cutoff: 100khz applications ? set top boxes ? stereo amplifiers ?dvd players ? portable audio products isl22102 (20 ld qfn) top view up flag d2 sb d1 left_out vb right_out cb right_in dn vcc avcc mute left_in d0 gnd hpb v th hpa 1 2 3 4 5 678910 15 14 13 12 11 20 19 18 17 16 data sheet september 21, 2015
2 fn6788.2 september 21, 2015 block diagram ordering information part number (note) part marking total resistance (k ? ) temp range (c) package (pb-free) pkg. dwg.# isl22102iv20z* (no longer available or supported) 22102 ivz 18.5 -40 to +85 20 ld tssop m20.173 ISL22102IR20Z* 221 02irz 18.5 -40 to +85 20 ld qfn l20.4x4c + - + - + - up dn mute sb gnd avcc left_in vb vcc right_in left_out cb right_out control unit 2.5m 2.5m 32-tap log 18.5k 32-tap 18.5k log audio detect flag v th d0 d1 d2 and delay hpb hpa isl22102
3 fn6788.2 september 21, 2015 pinouts isl22102 (20 ld qfn) top view isl22102 (20 ld tssop) top view up flag d2 sb d1 left_out vb right_out cb right_in dn vcc avcc mute left_in d0 gnd hpb v th hpa 1 2 3 4 5 678910 15 14 13 12 11 20 19 18 17 16 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 1 flag sb up dn mute vcc left_in avcc left_out cb d2 d0 v th gnd d1 hpb hpa right_in right_out vb n o l o n g e r a v a i l a b l e o r s u p p o r t e d pin description pin (qfn) pin (tssop) symbol function 1 4 dn active low volume decrem ent input with internal pull-up. 2 5 mute active low mute input with internal pull-up. 3 6 vcc digital power supply. 4 7 avcc analog power supply. 5 8 left_in input terminal of the left channel potentiometer. refe renced to vb. 6 9 left_out left channel output. referenced to vb. 7 10 cb terminal for external bypass capacitor to gnd. 8 11 vb avcc/2 reference output. can be used as a signal reference for other system components. 9 12 right_out right channel output. referenced to vb. 10 13 right_in input terminal of the right channel potentiometer. referenced to vb. 11 14 hpa terminal a of audio-detecto r high pass filter capacitor. 12 15 hpb terminal b of audio-detecto r high pass filter capacitor. 13 16 gnd system ground. overall for analog and digital power supp ly. 14 17 v th analog input threshold for audio detection. require an external resistor to vb. 15 18 d0 programming bit (lsb) input for delayed flag low output. 16 19 d1 programming bit input for delayed flag low output. 17 20 d2 programming bit (msb) input for delayed flag low output. 18 1 flag output signal indica tes audio input detection. 19 2 sb active low standby mode input with internal pull-up. 20 3 up active low volume increment input with internal pull-up. epad* exposed die pad in ternally connected to gnd *note: pcb thermal land for qfn/tdfn epad should be connected t o gnd plane or left floating. for more information refer to http://www.intersil.com/data/tb/tb389.pdf isl22102
4 fn6788.2 september 21, 2015 absolute maximum ratings thermal information storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65 ? c to +150 ? c voltage on up , dn , mute or sb with respect to gnd . . . . . . . . . . . . . . . . . . . . .-0 .3v to vcc + 0.3 voltage on avcc (referenced to gnd) . . . . . . . . . . . . . -0 .3v to +6v voltage on vcc (referenced to gnd) . . . . . . . . . . . . . . - 0.3v to +6v any audio inputs (referenced to vb) . . . . . . . . . . . . . av cc/2 0.3 any outputs (referenced to gnd) . . . . . . . . . . .-0.3v to a vcc + 0.3 i out max (10s). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30ma latchup . . . . . . . . . . . . . . . . . . . . . . . . . . cla ss ii, level a at +85c esd rating human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5kv machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250v thermal resistance (typical) ? ja (c/w) ? jc ( c / w ) 20 lead tssop (note 1) . . . . . . . . . . . 85 n/a 20 lead qfn (notes 2, 3) . . . . . . . . . . 40 4 maximum junction temperat ure (plastic package). . . . . . . . +1 50c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp recommended operating conditions temperature range (industrial) . . . . . . . . . . . . . . . . . . -40c to 85c supply voltage (v cc ). . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7v to 5 .5v analog supply voltage (av cc ). . . . . . . . . . . . . . . . . . . . 2.7v to 5.5v power rating of each dcp . . . . . . . . . . . . . . . . . . . . . . . . . . .15mw caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 1. ? ja is measured with the component mounted on a high effective the rmal conductivity test board in f ree air. see tech brief tb379 for details. 2. ? ja is measured in free air with the component mounted on a high e ffective thermal conductivity tes t board with direct attach f eatures. see tech brief tb379. 3. for ? jc , the case temp location is the center of the exposed metal p ad on the package underside. analog specifications over the recommended operating c onditions unless otherwise spec ified. symbol parameter test conditions min (note 8) typ (note 4) max (note 8) unit dynamic performance (notes 5, 6) volume control range -72 0 db mute mode @1v rms -90 db snr (note 7) signal noise ratios (unweighted) @1v rms @ 1khz, avcc = 5v -90 db thd + n (note 7) total harmonic distortion + noise @1v rms @ 1khz, avcc = 5v tap position from 0 to 10 0.01 % xtalk (note 7) dcp isolation @1khz, @ tap 10 -100 db psrr (note 7) power supply rejection avcc = 5v -90 db (note 7) -3db cutoff frequency tap position from 0 to 25 100 khz (note 7) noise 20hz to 20khz, vb input 3 v rms dcp accuracy r total end-to-end resistance 18.5 k ? end-to-end resistance tolerance -20 +20 % dcp input resistance matching -2 +2 % wiper step size tap position from 0 to 26 -2 db tap position from 27 to 31 -4 db wiper step size error tap position from 0 to 26 0.1 0.5 db tap position from 27 to 29 1 db tap position from 30 to 31 2 db dcp-to-dcp matching tap position from 0 to 26 0.5 db tap position from 27 to 29 1 db tap position from 30 to 31 2 db power-up attenuation (default wiper position at tap 10) -20 db tc v (note 7) ratiometric temperature coefficient tap position 15 10 ppm/c isl22102
5 fn6788.2 september 21, 2015 tc r (note 7) temperature coefficient of end-to-end resistance 340 ppm/c dc electrical specification avcc analog power supply 2.7 5.5 v vcc digital power supply 2.7 5.5 v t r avcc and vcc ramp rate 0.2 50 v/ms i avcc analog supply current avcc = 5.5v, i bias = 0ma, i out = 0ma for both channels 750 a i asb analog standby current avcc = 5.5v, i bias = 0ma 360 a i cc1 v cc supply current all inputs = 5.5v, vcc = 5.5v, avcc = 5.5v 60 a i sb v cc current (standby) vcc = 5.5v 35 a v in input signal on left_in, right_in pins reference to vb pin -avcc/2 avcc/2 v v out output signal on left_out, right_out pins reference to gnd 0 avcc v i out (note 5) left_out, right_out buffer current vcc = 5.5v -15 15 ma r out buffer output impedance 25 ? c in (note 7) input capacitance left_in, right_in 10 pf vb bias output voltage avcc/2 v vb accuracy -50 50 mv i bias vb output current vcc = 5.5v -5 5 ma vb output impedance 20 ? analog specifications over the recommended operating c onditions unless otherwise spec ified. symbol parameter test conditions min (note 8) typ (note 4) max (note 8) unit digital specifications over the recommended operating c onditions unless otherwise spec ified. symbol parameter test conditions min (note 8) typ (note 4) max (note 8) units i lkg input leakage current for d0, d1, and d2 -0.3 0.3 a v ih input high voltage vcc x 0.7 v v il input low voltage vcc x 0.1 v ics (notes 6, 7) internal pull-up current source on up , dn , mute , sb pins 1.5 2.75 a ac timing over recommended operating conditions symbol parameter min (note 8) typ (note 4) max (note 8) units t pu (note 7) power-up time to wiper stable 10 ms t wrpo (note 7) wiper response time (include t db and t zaws ) 35 ms auto increment starts after up or dn input is keeping low 1 s auto increment rate for the first 4s 4 hz auto increment rate after 4s 8hz t db debounce time 50 ms t lock (note 7) lockout time after debounce time, when any new command will be ignored 40 ms t flag_high (note 7) flag delay time from when audio input is detected to flag asser ted high 1 s isl22102
6 fn6788.2 september 21, 2015 timing diagrams t flag_low flag delay time interval step size, from d2:d0 = 001b to 111b. flag is asserted low when audio input is below threshold. (see table 1, page 7) 30 s t zaws (note 7) zero amplitude detection time for wiper switching 32 ms t low active low pu , dn or mute pulse 20 ms t gap time between two separate push-button events 80 ms notes: 4. typical values are for avcc = vcc = 2.7v to 5.0v, t a = +25c. 5. t a = +25c, avcc = 5.0v; 2hz to 20khz measurement bandwidth, inpu t signal 1v rms , 1khz sine wave. 6. when pin is open, voltage is pulled up through current source to vcc. 7. limits should be considered typical and are not production te sted. 8. parameters with min and/or max limits are 100% tested at +25 c, unless otherwise specified. temperature limits established b y characterization and are not production tested. ac timing over recommended operating conditions (continued) symbol parameter min (note 8) typ (note 4) max (note 8) units figure 1. digital input timing t gap t wrpo mi v w up t low (dn , mute ) (note 9) (note 9) figure 2. auto increment timing t db + t zaws up mi 1s v w 4 s auto increment 4hz rate auto increment 8hz rate note: 9. mi in these timing diagrams refers to the minimum incremental change of the output (wiper) voltage. isl22102
7 fn6788.2 september 21, 2015 pin descriptions left_in, right_in the left_in and right_in p ins of the isl22102 are equivalent to the fixed t erminals of a mechanical potentiometer. the stereo audio signal applied to these pins are referenced to vb and may have avcc/2 maximum amplitude. left_out, right_out the left_out and right_out pins are the buffered wiper terminals of the potentiometers which are equivalent to the movable terminals of a me chanical potentiometers with attached unity gain operationa l amplifiers (op amp). the default output position of wip er terminals preset to -20db attenuation of input signals. vb this is reference voltage output equal avcc/2 . it is used as common point for audio inputs, as well as reference signal for other system components. up the debounced active low up input is increment the wipers position of both channels. an o n-chip 2a current source pull-up holds the up input high. a switch closure to ground or a low logic level will af ter a debounce t ime and zero amplitude crossing detection, move the wiper to the next adjacent higher tap po sition. if the up input signal is held down for 1s, the wipers will auto increment their position with a 4hz frequency rate for 4s, and then a 8hz frequency rate (see figure 2). when the wipers reach their t op position of 0db attenuation, they will stay at this position ignoring any further up commands. dn the debounced dn input is decrement the wipers position of both channels. an on-chip 2a c urrent source pull-up holds the dn input high. a switch closure to ground or a low logic level will, after a debounce time and zero amplitude crossing detection, move the wiper to the next adjacent lower tap position. if dn input signal is held down for 1s, the wipers will auto decrement t heir position with a 4hz frequency rate for 4s, and the n a 8hz frequency rate. when the wipers reach their bottom position of -90db attenuation, they will stay at this position ignoring an y further down or mute commands. mute the first active low mute input pulse allows both wipers to move, after a debounce time and zero amplitude crossing detection, to the highest attenuation level of -90db in one step. the second active low mute pulse will return both wipers to their original position, prior to mute command. an on-chip 2a current sourc e pull-up holds the mute input high. sb the active low sb input allows totally disconnect dcp arrays from their left_in and righ t_in pins, and move both wipers to position closest to vb pin (as shown in figure 3). it also sets isl22102 in low p ower standby mode. when sb will be released, the both wipers will be set at position they have prior standby. . flag this output pin provides status information to t he rest of the system about audio activity. it is high when a t least one audio input exceeds v th threshold, otherwise its output level is low. the flag output can be directly connected to sb pin for automatical setting the isl22102 in standby mode. d0-d2 these three digital input pins allow to program a delay time for flag low output up to 240s. table 1 lists the d0-d2 settings and corresponding de lay times (typical values). cb this low pass filter terminal requires an external capacitor to gnd. the value of this capacitor, together with 5m ?? internal resistor divider, directly determines the psrr (power supply rejection ratio) of audio and vb outputs. a 1f to 10f capacitor is recommended. hpa, hpb these two high pass filter te rminals require an external capacitor of 100nf or higher in-between. table 1. flag programmed delay settings d2 d1 d0 delay, (s) 000 0 001 60 010 90 011 120 100 150 101 180 110 210 111 240 vb wiper_left left_in figure 3. dcp connection in standby mode (right_in) (wiper_right) isl22102
8 fn6788.2 september 21, 2015 v th this terminal allows to set up the thres hold level of audio input to be detected. when audio input to either left or right channel is below this threshol d - the flag output is low; when audio input is above this threshold - the flag output is high. the threshold level is maintained over an external resistor r th placed between v th pin, which is a source of 10a current, and vb pin. to calculate the actual threshold we need to multiply 10a by a resistor val ue and divide the result by 1000. for example, a 100k ? resistor is a subject of 1mv audio detection threshold, e.g. 10a*100k/1000 = 1mv. note, the v th threshold multiplied by 1000 should not exceed 1/2 of avcc. the maximum res istor value for detection threshold can be found in table 2. device operation there are four secti ons in the isl22102: the input control, counter and decode section, two resistor arrays with buffered wiper outputs, reference voltage generator of vb output, and audio dete ction block with pr ogrammable delay flag output. the input control s ection operates just like an up/down counter. the output of t his counter is decoded to turn on a single electronic sw itch, connecting a point on the resistor array to the wiper out put. each resistor array is comprised of 31 individual resi stors connected in series and its wiper output pass an attenuated audio input to the power amplifier. both resistor array s have logarithmic taper with -72db dynamic range as shown in table 2. the isl22102 is designed to interface directly to two push-button switches for effectively moving the wipers up or down. the up and dn inputs increment or decrement 5-bit counters respectively. the output of these counters are decoded to select one of the thirty -two wiper positions along the resistive array. the wiper increment input, up , and the wiper decrement input, dn , are both connected to an internal pull-up so that they normally remain high. when pulled low by an external push button switch or a logic low level input, the wipers will be switched to the next adjacent tap position. internal debounce circuitry prevents inadvertent switching of the wipers position if up or dn remain low for less than 15ms, typical. each of the buttons can be pu shed either once for a single in crement/decrement or continuously for a multiple increments/decrement s. when making a continuous push, after the first second, t he device is going to auto increment/decrement mode. if the button is held for longer than 1s, the wiper p osition will be auto incremented/decremented with a rate of 4hz for 4s, and with a rate of 8hz after that. as so on as the button is released, the isl22102 will return to a l ow power standby condition. each wiper acts like its mech anical equivalent and does not move beyond the last position. t hat is, the counter does not wrap around when clocked to either extreme. table 3 contains information about attenuation level for each tap position. table 2. r th vs avcc avcc (v) max r th (k ? ) 5.5 188 5.25 177 5.0 167 4.75 156 4.5 146 4.25 135 4.0 125 3.75 115 3.5 104 3.25 94 3.0 83 2.75 73 table 3. wiper tap position vs attenuation tap position attenuation 00 1-2db 2-4db 3-6db 4-8db 5 -10db 6 -12db 7 -14db 8 -16db 9 -18db 10 -20db 11 -22db 12 -24db 13 -26db 14 -28db 15 -30db 16 -32db 17 -34db 18 -36db 19 -38db 20 -40db 21 -42db 22 -44db 23 -46db 24 -48db isl22102
9 fn6788.2 september 21, 2015 once an up , dn or mute button has been validly pushed, the left and right inputs ar e examined for zero amplitude crossing. when either audio inpu t exhibits a zero crossing prior to 32ms, that command is immediately applied to appropriate wiper. if the zero crossing does not occur before the end of 32ms, the command is exec uted at the end of 32ms period. zero crossing determines for each channel independently. there is a 40ms lockout t ime after any of the up , dn or mute button has been validl y pushed, when any new command is ignored. if two or more buttons are pressed simultaneously, all commands are ignored upon release of all buttons. typical application diagram 25 -50db 26 -52db 27 -56db 28 -60db 29 -64db 30 -68db 31 -72db 32 mute (-90db) table 3. wiper tap position vs attenuation (continued) tap position attenuation left_in right_in left_out right_out vb v th cb hpa hpb sb up dn mute flag d2 d1 d0 vcc* vcc avcc r th 1f 100nf vb vb to power amplifier *flag low output delay is 240s isl22102
10 fn6788.2 september 21, 2015 about intersil intersil corporation is a leading provider of innovative power management and precision analog solutions. the company's produc ts address some of the largest marke ts within the industrial and i nfrastructure, mobile computing and high-end consumer markets. for the most updated datasheet, application no tes, related documentation and related parts, please see the respective product information page found at www.intersil.com . you may report errors or suggesti ons for improving this datashe et by visiting www.intersil.com/ask . reliability reports are also a vailable from our website at www.intersil.com/support. revision history the revision history provided is for informational purposes onl y and is believed to be accurate, but not warranted. please go to the web to make sure that you have the latest revision . date revision change september 21, 2015 fn6788.2 - updated ordering information table on page 2. - added revision history. - added about intersil verbiage. isl22102
11 fn6788.2 september 21, 2015 isl22102 package outline drawing l20.4x4c 20 lead quad flat no-lead plastic package rev 0, 11/06 located within the zone indicate d. the pin #1 indentifier may b e unless otherwise specified, t olerance : decimal 0.05 tiebar shown (if present) i s a non-functional feature. the configuration of the pin #1 identifier is optional, but mus t be between 0.15mm and 0.30mm from the terminal tip. dimension b applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing c onform to amse y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" typical recommen ded land pattern top view bottom view side view 4.00 a 4.00 b 6 pin 1 index area (4x) 0.15 4x 0.50 2.0 16x 20 16 15 11 pin #1 index area 6 2 .70 0 . 15 5 1 20x 0.25 +0.05 / -0.07 0.10 m ab c 20x 0.4 0.10 4 6 10 base plane seating plane 0.10 see detail "x" 0.08 c c c 0 . 90 0 . 1 0 . 2 ref c 0 . 05 max. 0 . 00 min. 5 ( 3. 8 typ ) ( 2. 70 ) ( 20x 0 . 6) ( 20x 0 . 5 ) ( 20x 0 . 25 )
12 all intersil u.s. products are m anufactured, assembled and test ed utilizing iso9001 quality systems. intersil corporations quality ce rtifications can be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products , see www.intersil.com fn6788.2 september 21, 2015 isl22102 thin shrink small outlin e plastic packages (tssop) ? index area e1 d n 123 -b- 0.10(0.004) c a m bs e -a- b m -c- a1 a seating plane 0.10(0.004) c e 0.25(0.010) b m m l 0.25 0.010 gauge plane a2 notes: 1. these package dimensions are w ithin allowable dimensions of jedec mo-153-ac, issue e. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension d does not include mold flash, protrusions or gat e burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension e1 does not include interlead flash or protrusion s. inter- lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. l is the length of terminal for soldering to a substrate. 7. n is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension b does not include dambar protrusion. allowable d ambar protrusion shall be 0.08mm (0.003 inch) total in excess of b dimen- sion at maximum material conditi on. minimum space between protr u- sion and adjacent lead is 0.07mm (0.0027 inch). 10. controlling dimension: millime ter. converted inch dimensions are not necessarily exact. (angles in degrees) 0.05(0.002) m20.173 20 lead thin shrink small outline plastic package symbol inches millimeters notes min max min max a - 0.047 - 1.20 - a1 0.002 0.006 0.05 0.15 - a2 0.031 0.051 0.80 1.05 - b 0.0075 0.0118 0.19 0.30 9 c 0.0035 0.0079 0.09 0.20 - d 0.252 0.260 6.40 6.60 3 e1 0.169 0.177 4.30 4.50 4 e 0.026 bsc 0.65 bsc - e 0.246 0.256 6.25 6.50 - l 0.0177 0.0295 0.45 0.75 6 n20 207 ? 0 o 8 o 0 o 8 o - rev. 1 6/98

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