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VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 1 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 high sensitivity long distance proximity and ambient light sensor with i 2 c interface description VCNL4100 integrates a high sensitivity long distance proximity sensor (ps), ambient light sensor (als), and 940 nm ired into one smal l package. it incorporates photodiodes, amplifiers, and analog to digital converting circuits into a single chip using a cmos process. the 16-bit high resolution als offers excellent sensing capabilities with sufficient selections to fulfill most applications whether a dark or high transparency lens design. VCNL4100 offers individual programmable high and low threshold interrupt features for the best utilizat ion of resources and power saving on the microcontroller. for the 8-bit proximity sensing function, VCNL4100 has a built-in intelligent cancellation scheme that eliminates background light issues. the persistence featur e prevents false judgment of proximity sensing due to ambient light noise. the adoption of the patented filtron tm technology achieves the closest ambient light spectr al sensitivity to real human eye responses. VCNL4100 provides excellent temperature compensation capability for keeping the output stable under changing temperature. als and ps functions are easily operated via the simple command format of i 2 c (smbus compatible) interface protocol. operating voltage ranges from 2.5 v to 3.6 v. pin definition features ? package type: surface mount ? dimensions (l x w x h in mm): 8.0 x 3.0 x 1.8 ? integrated modules: infrared emitter (ired), ambient light sensor (a ls), proximity sensor (ps), and signal conditioning ic ? operates als and ps in parallel structure ?filtron tm technology adoption for robust background light cancellation ? supports low transmittance (dark) lens design ? temperature compensatio n: -40 c to +85 c ? low power consumption i 2 c (smbus compatible) interface ? floor life: 168 h, msl 3, according to j-std-020 ? output type: i 2 c bus (als / ps) ? operation voltage: 2.5 v to 3.6 v ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 proximity function ? immunity to red glow (940 nm ired) ? intelligent background light cancellation ? smart persistence scheme to reduce ps response time ? proximity distance up to 1 m ambient light function ? fluorescent light flicker immunity ? spectrum close to real human eye responses ? selectable maximum detection range (655 / 1311 / 2621 / 5243) lux with highest sensitivity 0.01 lux/step interrupt ? programmable interrupt function for als and ps with upper and lower thresholds ? adjustable persistence to prevent false triggers for als and ps applications ? presence detection to acti vate displays in printers, copiers, and home appliances ? collision detection in robots and toys ? proximity sensing and lighting control in offices, corridors and public buildings ? vehicle occupancy dete ction in parking lots ? proximity detection in lavatory appliances 1gnd6led+ 2led_cathode7 nc 3v dd 8int 4 nc 9 sdat 5led-10sclk 9 2 1 3 4 5 6 7 8 10 top view
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 2 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 note (1) maximum allowed current for VCNL4100 internal ired note (1) moq: minimum order quantity product summary part ? number operating range (mm) operating voltage range (v) i 2 c bus voltage range (v) ired pulse current (ma) ambient light range (lx) ambient light resolution (lx) output code adc resolution proximity / ambient light VCNL4100 0 to 1000 2.5 to 3.6 1.8 to 3.6 800 (1) 0.01 to 5243 0.01 16 bit, i 2 c 8 bit / 16 bit ordering information ordering code packaging volume (1) pin number remarks VCNL4100 tape and reel moq: 2500 pcs 10 8.0 mm x 3.0 mm x 1.8 mm absolute maximum ratings (t amb = 25 c, unless otherwise specified) parameter test condition symbol min. max. unit supply voltage v dd -5.0v operation temperature range t amb -40 +85 c storage temperature range t stg -40 +100 c recommended operating conditions (t amb = 25 c, unless otherwise specified) parameter test condition symbol min. max. unit supply voltage v dd 2.5 3.6 v operation temperature range t amb -40 +85 c i 2 c bus operating frequency f (i2cclk) 10 400 khz pin descriptions pin assignment symbol type function 1 gnd i ground 2 led_cathode i ired cathode connection 3v dd i power supply input 4 nc - no connection 5 led- o ired cathode 6led+iired anode 7 nc - no connection 8 int o interrupt pin 9 sdat i / o (open drain) i 2 c data bus data input / output 10 sclk i i 2 c digital bus clock input
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 3 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 block diagram notes (1) light source: white led (2) maximum detection range to ambient light can be determined by als refresh time adjustment. refer to ta ble 17 als resolution an d maximum detection range (3) based on ired on / off duty ratio = 1/5120, 1/640, 1/80, and 1/20. the circuitry should use an external mosfet as shown with fi g.10. please see also the application no te designing the VCNL4100 into an application ( www.vishay. com/doc?84361 ). ? ? basic characteristics (t amb = 25 c, unless otherwise specified) parameter test conditio n symbol min. typ. max. unit supply voltage v dd 2.5 - 3.6 v supply voltage for ired v ired 3.8 - 5.0 v supply current excluded led driving i dd - 195 - a shutdown current light condition = dark, v dd = 3.3 v i dd (sd) - 0.2 - a als shut down als disable, ps enable i alssd - 180 - a ps shut down als enable, ps disable i pssd - 175 - a i 2 c signal input logic high v dd = 3.3 v v ih 1.5 - - v logic low v il --0.8 logic high v dd = 2.6 v v ih 1.4 - - v logic low v il --0.6 peak sensitivity wavelength of als ? p - 550 - nm peak sensitivity wavelength of ps ? pps - 940 - nm full als counts 16-bit resolution - - 65 535 steps full ps counts 8-bit resolution - - 255 steps detectable intensity minimum it = 640 ms, v dd = 3.3 v, 1 step (1)(2) -0.01- lx maximum it = 80 ms, v dd = 3.3 v, 65 535 steps (1)(2) - 5243 - als dark offset it = 80 ms, v dd = 3.3 v, normal sensitivity (1) 0-3steps operating temperature range t amb -40 - +85 c ired driving current (3) - - 800 ma g nd i 2 c bu s logic control al s pd p s pd led driver p s buffer led_cathode v dd s clk s dat int ired p s timing controller d s p o s cillator temperature s en s or low pa ss filter al s 16-bit s data buffer led- led+
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 4 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 1 - i 2 c bus timing diagram i 2 c bus timing characteristics (t amb = 25 c, unless otherwise specified) parameter symbol standard mode fast mode unit min. max. min. max. clock frequency f (smbclk) 10 100 10 400 khz bus free time between start and stop condition t (buf) 4.7 - 1.3 - s hold time after (repea ted) start condition; ? after this period, the fi rst clock is generated t (hdsta) 4.0 - 0.6 - s repeated start condition setup time t (susta) 4.7 - 0.6 - s stop condition setup time t (susto) 4.0 - 0.6 - s data hold time t (hddat) 3450 - 900 ns data setup time t (sudat) 250 - 100 - ns i 2 c clock (sck) low period t (low) 4.7 - 1.3 - s i 2 c clock (sck) high period t (high) 4.0 - 0.6 - s detect clock / data low timeout t (timeout) 25 35 - - ms clock / data fall time t (f) - 300 - 300 ns clock / data rise time t (r) - 1000 - 300 ns v ih v ih t (low) v il t (r) t (hd s ta) t (buf) v il t (hddat) t (f) t (hi g h) t ( s u s ta ) t ( s udat ) t ( s u s to ) {{ p s top condition s s tart condition {{ p s t (lo s ext ) t (lowmext ) t (lowmext ) s clk ack s da ack s tart s top t (lowmext ) i 2 c bu s clock ( s clk) i 2 c bu s data ( s dat) i 2 c bu s clock ( s clk) i 2 c bu s data ( s dat)
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 5 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 parameter timing information fig. 2 - i 2 c bus timing for sending word command format fig. 3 - i 2 c bus timing for receiving word command format w s a6 s a5 s a4 s a3 s a2 s a1 s a7 i 2 c bu s s lave addre ss byte s tart by ma s ter ack by s a6 s a5 s a4 s a3 s a2 s a0 s a7 command code s a1 ack by s a7 s a6 s a5 s a4 s a3 s a2 s a1 s a0 ack by s a7 s a6 s a5 s a4 s a3 s a2 s a1 s a0 s top by ma s ter ack by data byte low data byte high i 2 c bu s clock ( s clk) i 2 c bu s data ( s dat) i 2 c bu s clock ( s clk) i 2 c bu s data ( s dat) VCNL4100 VCNL4100 VCNL4100 VCNL4100 w s a6 s a5 s a4 s a3 s a2 s a1 s a7 i 2 c bu s s lave addre ss byte s tart by ma s ter ack by s a6 s a5 s a4 s a3 s a2 s a0 s a7 command code s a1 ack by s a7 s a6 s a5 s a4 s a3 s a2 s a1 s a0 s top by ma s ter ack by ma s ter data byte high r s a6 s a5 s a4 s a3 s a2 i 2 c bu s s lave addre ss byte s tart by ma s ter ack by s a6 s a5 s a4 s a3 s a2 s a0 s a7 data byte low s a1 ack by ma s ter s a1 s a7 VCNL4100 VCNL4100 VCNL4100 i 2 c bu s clock ( s clk) i 2 c bu s data ( s dat) i 2 c bu s clock ( s clk) i 2 c bu s data ( s dat) i 2 c bu s clock ( s clk) i 2 c bu s data ( s dat)
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 6 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical performance characteristics (t amb = 25 c, unless otherwise specified) fig. 4 - normalized spectral response fig. 5 - als normalized output vs. view angle fig. 6 - als refresh time vs. maximum detection range fig. 7 - i dd vs.temperature fig. 8 - relative radiant intensity vs. angular displacement fig. 9 - relative radiant intensity vs. angular displacement p s al s 10 100 1000 10000 0 0.1 0.2 0.3 0.4 0.5 0.6 1.1 -90 -60 0 30 90 axi s title 1 s t line 2nd line relative radiant inten s ity normalized output view angle 2nd line 0.9 0.8 0.7 -30 60 1.0 10 100 1000 10000 0 10 000 20 000 30 000 40 000 50 000 60 000 70 000 0 2000 4000 6000 10 000 axi s title 1 s t line 2nd line s tep s tep lux 2nd line 80 m s 160 m s 320 m s 640 m s 8000 10 100 1000 10000 0 0.1 0.2 0.3 0.4 0.5 0.6 1.0 -100 -75 0 25 75 100 axi s title 1 s t line 2nd line relative radiant inten s ity relative radiant inten s ity view angle 2nd line 0.9 0.8 0.7 -50 -25 50
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 7 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 application information pin connection with the host VCNL4100 is a cost effective solution of a long distance proximity sensor with i 2 c interface. the standard serial digital interface easily accesses light intensity by using simple calculations. application circuitry below shows the added mosf et which is driven by the asics pin 2. a 22 k ? pull-up resistor needs to be added here. the r led defines the current through the ired. a small 0.1 f is sufficient at v dd for power supply noise rejection, but a 2.2 f should be placed at v ired to provide the energy for the ired. for the i 2 c bus design, the pull-up voltage refers to the i/o specification of the baseba nd due to its ope n drain design. the pull-high resistors for the i 2 c bus lines are recommended to be ? 2.2 k ? . fig. 10 - appli cation diagram notes ?v dd range: 2.5 v to 3.6 v and v ired is recommended 5.0 v ? power path of v dd and v ired should be routed separately up to stable power source. ?the r led resister value should be eval uated within ready-made applic ation and the current through v cnl4100-internal ired should not exceed 800 ma. ? digital interface VCNL4100 applies single 8-bit slav e address 0xc0 (hex) following i 2 c protocol. all operations can be controlled by the command register. the simple command structur e helps users easily program the operatio n setting and latch the light data from VCNL4100. as fig. 11 shows, VCNL4100s i 2 c command format is simple for read and write operations between VCNL4100 and the host. the white sections indicate host activity and the gray sections indicate VCNL4100 s acknowledgement of the host access activity. write word and read word protocols are suitable for accessing registers particul arly for 16-bit als data and 8-bit ps data. interrupt can be cleared by reading data out from register: int_flag. fig. 11 - command protocol format v dd int int s clk VCNL4100 led cathode 10 9 3 2 1 0.1 f g nd s ck s da 8 v ired 2.2 f 2.2 k v pull up v dd pmo s s g d 2.7 r led led+ led- 6 5 2.2 k 20 k mcu s clk s dat 8.2 k int s s lave addre ss wr a command code a data byte low a data byte high a 17 8 11 1 818 p 11 s end byte f write command to VCNL4100 1 s lave addre ss 7 wr a command code a s s lave addre ss rd a data byte low a data byte high a p 11 8 1 1 711 8 18 11 s receive byte f read data from VCNL4100 s = s tart condition p = s top condition a = acknowledge s haded area = VCNL4100 acknowledge
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 8 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 function description VCNL4100 applies a 16-bit high resolution als that provides the best ambient light sensing capability up to 0.011375 lx/step which works well under a low transmittance le ns design (dark lens). a flexible interru pt function of als (register: als_conf) i s also supported. the int signal will not be asserted by VCNL4100 if the als value is no t over high int threshold window level, or lower than low int threshold window level of als. as long as the als int is asserted, the host can read the data from VCNL4100. for proximity sensor function, VCNL4100 supports different kinds of mechanical design to achiev e the best proximity detection performance for any color object . the basic ps function settings, such as du ty ratio, integration time, interrupt, and ps enable / disable and persistence, are handle d by the register: ps_conf1. duty ratio co ntrols the ps response time. integration time represents the duration of the energy being received. the interrupt is asserted when the ps detection levels over the high threshold level setting (register: ps_thdh) or lower than low threshold (register: ps_thdl). if the interrupt function is enabl ed, the host reads the ps output data from VCNL4100 that saves host loading from periodically reading ps data. more than that, int flag (register: int_flag) indicates th e behavior of int triggered under different conditions. ps persistence (ps_pers) sets up the ps int asserted conditions as long as the ps output value continually exceeds the threshold level. descriptions of each slave addre ss operation are shown in table 1. table 1 - command code and register description command ? code register name r / w default value function description 00h_l als_conf r / w 00h als integration time, persiste nce, interrupt, and function enable / disable 00h_h reserved r / w 00h reserved 01h_l als_thdh_l r / w 00h als high interrupt threshold lsb byte 01h_h als_thdh_m r / w 00h als high interrupt threshold msb byte 02h_l als_thdl_l r / w 00h als low interrupt threshold lsb byte 02h_h als_thdl_m r / w 00h als low interrupt threshold msb byte 03h_l ps_conf1 r / w 00h ps duty ratio, integratio n time, persistence, an d ps enable / disable 03h_h ps_conf2 r / w 00h ps gain, itb, interrupt setting 04h_l ps_conf3 r / w 00h ps active forced, averag ing, background light cancellation setting 04h_h ps_spo r / w 00h set initial value to 0xa0 or 0x20 05h_l reserved r / w 00h reserved 05h_h reserved r / w 00h reserved 06h_l ps_thdl r / w 00h ps low interrupt threshold setting 06h_h ps_thdh r / w 00h ps high interrupt th reshold setting 07h_l reserved r / w 00h reserved 07h_h reserved r / w 00h reserved 08h_l ps_data r 00h ps output data 08h_h reserved r 00h reserved 09h_l als_data_l r 00h als lsb output data 09h_h als_data_m r 00h als msb output data 0ah_l reserved r 00h reserved 0ah_h reserved r 00h reserved 0bh_l reserved r 00h reserved 0bh_h int_flag r 00h als, ps interrupt flags
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 9 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 command register format VCNL4100 provides an 8-bit command register for als and ps controlling independently. the description of each command format is shown in following tables. ? ? table 2 - register: als_conf description register name command code: 0xh_l (0xh data byte low) or 0xh_h (0xh data byte high) command bit76543210 als_conf command code: 00h_l (00h data byte low) command bit description als_it 7 : 6 (0 : 0) = 80 ms; (0 : 1) = 160 ms; (1 : 0) = 320 ms; (1 : 1) = 640 ms ? als integration time setting , longer integration time has higher sensitivity reserved 5 : 4 defaul t = (0 : 0), reserved als_pers 3 : 2 (0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 4, (1 : 1) = 8 ? als interrupt persistence setting als_int_en 1 0 = als interrupt disable, 1 = als interrupt enable als_sd 0 0 = als power on, 1 = als shut down table 3 - register: reserve command description reserved command code: 00h_h (00h data byte high) command bit description reserved 7 : 0 default = 00h table 4 - register als_thdh_l and als_thdh_m description als_thdh_l ? als_thdh_m command code: 01h_l (01h data byte low) command code: 01h_h (01h data byte high) register bit description als_thdh_l 7 : 0 00h to ffh, als high interrupt threshold lsb byte als_thdh_m 7 : 0 00h to ffh, als high interrupt threshold msb byte table 5 - register: als_thdl_l and als_thdl_m description als_thdl_l ? als_thdl_m command code: 02h_l (02h data byte low) command code: 02h_h (02h data byte high) register bit description als_thdl_l 7 : 0 00h to ffh, als low interrupt threshold lsb byte als_thdl_m 7 : 0 00h to ffh, als low interrupt threshold msb byte table 6 - register: ps_conf1 description ps_conf1 command code: 03h_l (03h data byte low) command bit description ps_duty 7 : 6 (0 : 0) = 1/5120, (0 : 1) = 1/640, (1 : 0) = 1/80, (1 : 1) = 1/20 ? ps ired on / off duty ratio setting ps_ it 5 : 4 (0 : 0) = 1t, (0 : 1) = 1.3t, (1 : 0) = 1.6t, (1 : 1) = 2t ? ps integration time setting ps_pers 3 : 2 (0 : 0) = 1, (0 : 1) = 2, (1 : 0) = 3, (1 : 1) = 4 ? ps interrupt persistence setting reserved 1 default = 0, reserved ps_sd 0 0 = ps power on, 1 = ps shut down
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 10 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 table 7 - register: ps_conf2 description ps_conf2 command code: 03h_h (03h data byte high) command bit description ps_itb 7 : 6 (0 : 0) = 1/2t, (0 : 1) = 1t, (1 : 0) = 2t, (1 : 1) = 4t ? ps it bank setting ps_gain 5 : 4 (0 : 0) = /4, (0 : 1) = /2, (1 : 0) = 1, (1 : 1) = 2 reserved 3 defaul t = 0, reserved ps_sp_int_en 2 0 = disable int function for ps ente r / leave sunlight protection mode ? 1 = issue int while ps enter / leave sunlight protect ion mode. while ps enter s unlight protection mode, the ps output will keep 0xff reserved 1 default = 0, reserved ps_int_en 0 0 = ps int function disable ? 1 = ps int function enable table 8 - register: ps_conf3 description ps_conf3 command code: 04h_l (04h data byte low) command bit description ps_av 7 : 6 (0 : 0) = /2, (0 : 1) = /4, (1 : 0) = /8, (1 : 1) = /16 ps_av_en 5 0 = ps average function disable, 1 = ps average function enable reserved 4 default = 0, reserved ps_af 3 0 = active force mode disable (normal mode), 1 = active force mode enable ps_trig 2 0 = no ps active force mode trig ger, 1 = trigger one time cycle ? VCNL4100 output one cycle data ever y time host writes in 1 to sensor. the state returns to 0 automatically. ps_mpulse 1 0 = disable, 1 = enable ? ps multi pulse mode setting; ps mult i pulse number set by ps_av [1 : 0] reserved 0 default = 0, reserved table 9 - register: ps_ms description reserved command code: 04h_h (04h data byte high) command bit description ps_spo 7 : 0 set initial value = 0xa0 (ps_out = 0xff while ps into sunlight protection ? set initial value = 0x20 (ps_out = 0x00 while ps into sunlight protection table 10 - register reserve command description reserved command code: 05h_l (05h data byte low) register bit description reserved 7 : 0 default = 00h table 11 - register: reserve command description reserved command code: 05h_h (05h data byte high) register bit description reserved 7 : 0 default = 00h table 12 - register: ps_thdl description ps_thdl command code: 06h_l (06h data byte low) register bit description ps_thdl 7 : 0 00h to ffh, ps low interrupt threshold setting
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 11 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 ? adjustable sampling time VCNL4100s embedded led driver drives the external ired with the led cathode pin by a pulsed duty cycle. the ired on / off duty ratio can be programmable by i 2 c command at register: ps_duty is re lated to the current consumption and ps response time. the higher the duty ra tio selected, the faster response time achieved with higher power consumption. table 13 - register: ps_thdh description ps_thdh command code: 06h_h (06h data byte high) register bit description ps_thdh 7 : 0 00h to ffh, ps hi gh interrupt th reshold setting table 14 - register: reserve command description reserved command code: 07h_l (07h data byte low) register bit description reserved 7 : 0 default = 00h table 15 - register: reserve command description reserved command code: 07h_h (07h data byte high) register bit description reserved 7 : 0 default = 00h table 16 - read out register description register command code bit description ps_data 08h_l (08h data byte low) 7 : 0 00h to ffh, ps output data reserved 08h_h (08h data by te high) 7 : 0 default = 00h als_data_l 09h_l (09h data byte low) 7 : 0 00h to ffh, als lsb output data als_data_m 09h_h (09h data byte high) 7 : 0 00h to ffh, als msb output data reserved 0ah_l (0ah da ta byte low) 7 : 0 reserved 0ah_h (0ah da ta byte high) 7 : 0 reserved 0bh_l (0bh data by te low) 7 : 0 default = 00h int_flag 0bh_h (0bh data byte high) 7 6 5 4 3 2 1 0 ps_spf_leave, ps leaving protection mode ps_spf_enter, ps entering protection mode als_if_l, als crossing low thd int trigger event als_if_h, als crossing high thd int trigger event default = 0, reserved default = 0, reserved ? ps_if_close, ps rise above ps_thdh int trigger event ps_if_away, ps drop below ps_thdl int trigger event
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 12 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 threshold window setting ? als threshold window setting (applying als int) register: als_thdh_l and als_thdh_m define 16-bit als hi gh threshold data for lsb by te and msb byte. register: als_thdl_l and als_thdl_m define 16-bit als low threshol d data for lsb byte and msb byte. as long as als int function is enabled, int will be asserted once the als data exceeds als_th dh or goes below als_thdl. to easily define the threshold range, multiply the va lue of the resolution (lx/step) by the threshold level (refer table 17). ? the following is an example of the application for als_it = 160 ms. if als_thdh = 07d0(hex) and als_thdl = 03e8(hex), then the als int will not asserted if the als value does not ex ceed 80 lx [07d0(hex) = 2000 step s x 0.04 lx/step = 80 lx] or lower than 40 lx [03e8(hex) = 1000 steps x 0.04 lx/step = 40 lx. ?als persistence the als int is asserted as long as the als value is hi gher or lower than the thre shold window when als_pers (1 / 2 / 4 / 8 times) is set to one time. if als_pers is set to four times, then the als int will not be asserted if the als value is not over (or lower) than the threshold wind ow for four continued refresh times (integration time). ? programmable ps threshold VCNL4100 provides both high and low thresholds 8-bit data setting for proximity sensor. (register: ps_thdl, ps_thdh) that fulfills different mechanical designs with the best pro ximity detection capability for any kind of objects. ?ps persistence the ps persistence function (ps_pers 1 / 2 / 3 / 4) helps to avoid false trigger of the ps int. for example, if ps_pers = 3 times, the ps int will not be asserted unless the ps value is greater than the ps threshold (ps1_thdh) value for three periods of time continuously. data access all VCNL4100 command registers are readable. to access 16-bit high resolution als output data, it is suitable to use read word protocol to read out data by just one co mmand at register: als_data_l and als_data _m. to represent the 16 -bit data of als, it has to apply two bytes. one byte is for lsb, and the other byte is for msb as show n in table 18. in terms of reading out 8-b it ps data, host just need to access register: ps_data. interrupt (int) VCNL4100 has als and ps interrupt feature operated by a single pi n int. the purpose of the inte rrupt feature is to actively inform the host once int has been asserted. with the interrupt f unction applied, the host does not need to constantly pull data from the sensor, but to only read data fr om the sensor when receiving interrupt requ est from the sensor. as long as the host enables als interrupt (register: als_int_en) or ps interrupt (register: ps_int) function , the level of int pin (pin 8) is able to be pulled low once int asserted. all of registers are accessible even int is asserted. als int asserted when als value crosses over the value set by register: als_thdh or is lower than the value set by register: als_thdl. ps int asserted when ps value crosses ov er the value set by register: ps_thdh or is lower than the value set by register: ps_thdl. table 17 - als resolution and maximum detection range als_it sensitivity (lx/step) maximum detection range (lx) als_it (7 : 6) integration time (0, 0) 80 ms 0.08 5243 (0, 1) 160 ms 0.04 2621 (1, 0) 320 ms 0.02 1311 (1, 1) 640 ms 0.01 655 table 18 - 16-bit als data format VCNL4100 bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 register als_data_m als_data_l
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 13 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 interrupt flag register: int_flag represents all of interrup t trigger status for als and ps. any flag value changes from 0 to 1 state, the level of int pin will be pulled low. as long as host reads int_fl ag data, the bit will change from 1 state to 0 state after reading out. the int level will be returned to high afterwards. proximity detection hysteresis a ps detection hysteresis is important to keep the ps state in a certain range of detection dist ance. for example, ps int asser ts when ps value over ps_thdh. host switches on panel backlight and then clears int. when ps value is less than ps_thdl, host switches off panel backlight. any ps value lower than ps_th dh or higher than ps_thdl ps int will not be asserted. host keeps the same state. package information in millimeters fig. 12 - VCNL4100 package dimensions 3.0 0.1 8.0 0.1 5.0 1.6 .6 1 5 6 10 ? 1.7 ? 2.05 top view 10 5 1 1.0 1.2 0.8 1.7 1.7 1.0 (10 x) 1 2 3 4 5 10 9 8 7 6 bottom view 1.8 0.1 s ide view g nd led_cathode vdd nc led- led+ nc int s dat s clk 1 2 3 4 5 6 7 8 9 10 2.0 1.7 0.8 for reflow s oldering (pcb footprint) 1.2 1.2 6 s en s or led
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 14 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 layout notice and reference circuit circuit layout reference fig. 13 - suggested VCNL4100 layout application circuit block reference fig. 14 - VCNL4100 application circuit notes ?v dd range: 2.5 v to 3.6 v and v ired is recommended 5.0 v ? power path of v dd and v ired should be independent layout ?the r led resistor value is reference for test stage, it should be adjusted again for the product usage basing on the power and the lens final design. recommended storage and rebaking conditions parameter conditions min. max. unit storage temperature 5 50 c relative humidity - 60 % open time - 168 h total time from the date code on the aluminized envelope (unopened) - 12 months rebaking tape and reel: 60 c - 22 h tube: 60 c - 22 h v dd int int s clk VCNL4100 led cathode 10 9 3 2 1 0.1 f g nd s ck s da 8 v ired 2.2 f 2.2 k v pull up v dd pmo s s g d 2.7 r led led+ led- 6 5 2.2 k 20 k mcu s clk s dat 8.2 k int
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 15 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 recommended infrared reflow soldering conditions which are based on j-std-020 c. ? recommend normal solder reflow is 235 c to 255 c. fig. 15 - VCNL4100 solder reflow profile chart recommended iron tip soldering condition and warning handling 1. solder the device with the following conditions: 1.1. soldering tempera ture: 400 c (max.) 1.2. soldering time: 3 s (max.) 2. if the temperature of the method portion rises in addition to the resi dual stress between the lead s, the possibility that an open or short circuit occurs due to the defo rmation or destruction of the resin increases. 3. the following methods: vps and wave soldering, have not been suggested for the component assembly. 4. cleaning method conditions: 4.1. solvent: methyl alcohol, ethyl alcohol, isopropyl alcohol 4.2. solvent temperatu re < 45 c (max.) 4.3. time: 3 minutes (min.) ir reflow profile condition parameter conditions temperature time peak temperature 255 c + 0 c / - 5 c (max.: 260 c) 10 s preheat temperature rang e and timing 150 c to 200 c 60 s to 180 s timing within 5 c to peak temperature 10 s to 30 s timing maintained ab ove temperature / time 217 c 60 s to 150 s timing from 25 c to peak temperature 8 min (max.) ramp-up rate 3 c/s (max.) ramp-down rate 6 c/s (max.) 200 150 217 255 max. temperature (260 c + 0 c / - 5 c)/10 s s ol d erin g zone 60 s to 150 s temperature (c) time ( s ) t 2 t 1 ramp-down rate 6 c/ s (max.) pre-heatin g time t 2 - t 1 = 60 s to 180 s ramp-up rate 3 c/ s (max.) ramp-up rate 3 c/ s (max.)
VCNL4100 www.vishay.com vishay semiconductors rev. 1.2, 30-aug-16 16 document number: 84319 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 tape packaging information in millimeters fig. 16 - package carrier tape fig. 17 - reel dimensions
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