analog devices fax-on-demand hotline - page 6 n analog w devices i low power 14-b-it, 15 bit & 16-bit sampling analog-to-digital converters das 1157 /das 1158/das 1159 i features complete with high accuracy semple/hold and aid converter low power conaumption: 850mw mu. v. = :t: 15v rated pedormence: - 25"'<: to + bs"'<: low nonlinearity (das1158 and das1159) differential: :t: 0.0015% fsr max integral: :0.003% fsr max dlff8r8ntial t.c.: % 1ppmrc me. high throughput rete: 18khz min byte-selectable tri-state buffered outputs internel geln . offset potentiometers improved second source to ald/a/m434 end ald/ajm.&35 modules appuca t1ons seismic date acquisition portable reid instrumentation automated test equipment proceu control date acquisition medical instrumentation general description the daslls7/daslls8/dasl1s9 are 1+/ls-/16-bit sampling aualog-to-disital converters. they are ideally suited for use in portable and remote data acquisition equipment where low power consumption (6somw muimum) and wide temperature range ( - 2s"c to + 85"c rated performadcc) are required. daslls7idasl1s8idaslls9 provide guaranteed high accuracy and high stability system pcrformadcc essential to medical, analytical and process control equipment: differential nonlinearity of :o.oois% max and integral donlincarity of :0.003% max (daslls8 and daslls9); do missing codes guaranteed; pin t.c. of :8ppmf'c max. zero t.c. of :80jl.vioc iou and differential nonlinearity t.c. of : ippmi"c max. the wide dynamic range will enhancc the pcrformadcc of critical mcuurc:ments in au and liquid chromatography, blood aualyzcrs, distributed data acquisitiod in factory automatiod and power sencrating equipment, and in automatic test equipment. functional block diagram "na~do { ' """'t . . tal. su'e iuffe~s ,$it< 'npu' s/h cont.ol . ..v +'sv "'nalog . oigrr anos amo ..:~~~ !!!!".!!all:! "n.&i.og "no -isv .",nut "_analoo """ ..- ~o ii ullo .., our ... 'n"'u ...so "'$1 i (lit '" fl$&1 i,r 1 foil 0"""" lit' ii' . lit. iir i lit' lo .nalle lit . lit. iir '. lit 11 lit t2 lit " lit " 1ls8 das"." lit to ils8 0""".., .sv digital """ the daslls7idaslls8/daslls9 make use of analog devices' proprietary cmos technology to acb.ieve low power operation, while utilizing the latest integrated circuit and thin-film compo- nents to achieve the highest level of pcrformadcc and reliability. as shown in figure 1, each device codtains a precision samplclhold amplifier, high accuracy l+1is-/l6-bit analog-to-digital converter, precision referencc. cmos tri-state output buffen (for direct 8. bit or 16-bit bus interface), user accessible pin and offset adjust potentiometers, and power supply bypass capac:iton, all in a compact low profile 2~ x"" x 0.37s" metal casc paclcagc. no additional componenu are required for operation. i ~ obsolete
analog devices fax-on-demand hotline - page 7 das1157 /das1158/das1159 -specifications (typical @ +25c, vs = ::t15v, yo = +5y unless otherwise specified) model resolution oynamicp5rformance !"hroughput ra'e co.""nion time s h acqo..iuon time s hapertutcdc!:ay s h apertore uncertainly f?dthloulih re;?lion' droop ral. dici.",i, abs<>rp,p(7~",v rm,) 0.ooi5%!>,p(so...vrm.) :0,003% fsr'""" "o.ooi~%fsr'mul .. :: lppmf'cmu :0: 8ppmf'cmu :3oi;y,'ctyp, "'-so...vi"cmax :o.o~%i"c :o,ooi%fsr'!%v. i._lhen i minu,e = ippmi"cmu dv. :: jov 010+sv.o,o+10v ukh s1gic"i" durinjcon..nion 2til looa. + iov, ,,0,3% zma...... see no.. 7 see n"'e 7 :isv(:o:3%},+5v(:s%) "'- lzvto:!: 17v, .4.75vto + s.2sv :!:15ma ioma soomwtyp,6somwmu -zs'l:to +8s'i: -25'1:10 +8~'i: - 40'1: 10 + 100'1: moo.. mil.std.2dze, mc1hod 1038 elec"o...,;. (rfi)6 sid.. electromagnelic (em!) 5 sid.. z-, 4"' 0,37s" mctalp..kagc size notes 's"",."." oasiii7 "s""'"""""""'" oasii5a 'm_.m! ,. 0<>44 i.p'" lov pk." (" 'okh.. ',",""'-um ,.nun.- 0/ sih uid aid _io_ity ,non. 'fsr fuji s analog devices fax-on-demand hotline - page b applying the das1157/das1158/das1159 [ operation for operation, the only connections necessary to the dasl1s71 daslls8idaslls9 are the :t: 15v and + sv power supplies, analog input signal, trigger pulse, and the hi-enablello- enable tn-state controls. analog input and digital. output p~ are user selectable via external jumper connections. input voltaic ranges arc selectable via user pin programming: 0 to +5v,oto +lov, :t:svand :t:lov. unipolar coding is provided in true binary format with bipolar coding displayed in offset binary and two's complement (dasi ls7and das1l58). das1159 unipolar coding is provided in a modified binary format (msb complement) while bipolar coding is two's complement only. analog input section the analog input can be applied to just the aid converter or to the internal samplelhold ampliflct" ahead of the aid converter. when using just the aid converter, apply the analog input per the voltap: ranae pin programming shown in table i. when using the samplelhold amplifier in conjunction with aid con- verter, apply the analog input to the sih input terminal and connect the sih output terminal to the appropriate aid converter analog input. ref out '4-111-111- bit aio conveinai gain adjust , , , i connect i for i ijpolaii : 0fiiia tion , i l- ---- anaih1 ana in z ,..,in s sii4 output slh ihi'ut sii4 contfiol figure 2. analog input block diagram errors due to source loading are eliminated since the samplclhold amplifier is a high-impedance unity-gain amplifier. high feed- through rejection is provided for either single-channc1 or multi. channel applications. feedthrough rejection can be optimized, in multiclwmc1 applications, by changing channels at the rising or falling edge of the 8th control pulse. timing d ia g ram the timing diagram for the dasils7/da51l58/da81159 is illustrated in figure 3. this figure also includes the samplclhold amplifier acquisition time. if the samplelhold amplifier is required, the trigger input and 5th control terminal can be tied together providing only one conversion control signal. when the trigger pulse goes high, it places the samplelbold amplifier in the sample mode allowing it to acquire the present input signal. the trigger pulse must remain high for a minimum of 5..,.s to insure accuracy. if the samplelhold amplifier is not used, the trigger pulse needs to be iv-s (minimum) in length to satisfy the aid converter trigger requirements. at the fa1.ling edge of the trigger pulse, the sample! hold amplifier is placed in the hold mode, all internal logic is reset and the aid conversion begins. the conversion process can be retriggc:red at any time, including duno, conversion. with this negative edge of the trigger pulse, the msb is set high with the i"f'maining digital. outputs set to logic low state, and the end of conversion is set high and remains high through the full conversion cycle. during conversion each bit, starting with the msb, is sequentially switched high at the rising edge of the internal clock. the dac output is then compared to the analog input and the bit decision is made. each comparison lasts onc clock cycle with the complete 14-/15./16-bit conversion taking soioul maximum. at this time, the end of conversion line goes low signjfying that the conversion is complete. for micro- processor bus applications, the digital output can now be applied to the data bus by enabling the tri-state buffers. for muimum data throughput, the digital output data should be read while the samplelhold amplifier is acquiring the new analog input signal. i , talggfri .n sii4 cohtrol , , inl'ut +fs e signal 0 - -r -fs -,' i +fs ~ sih outp\jt 0 - : , -fs -, roc ---1--50... .!1x---- nons 'ai 1. output o.ta v.iid. 0 z. if slh contra' .nd tri11'ii'" m. -n.d t--. puim _1ft mutt lie 5... min '0 allow ,to. sih ~ to acquln _in, sign". if tll. adc ia only umd. 1ft. trig"" puim _t lie 1". min. figure 3. das 1157/das 1158/das 1159 timing diagram .j ana1o& voitap coan.ct connect coadect laplat v1n or s/h out anajos common ltefoui iwije to to to 010 + sv ana in i, ana in 2, ground nc" ana in 3 010 + iov ana in 2 ground nc" anain3 ana in j 5v ana in 1 ground, anain2 anain3 lov anain3 ground, ana in 2 ana in 1 'nocolulcc:lion table i. analog input pin programming obsolete
analog devices fax-on-dehand hotline - page 9 das1157idas1158idas1159 gain and offset adjustment the das ii 57/das 11 58/das 11 59 contain internal gain and offset adjusanent potentiometers. each potentiometer bas ample adjustment range so that pin and offset errors can be trimmed to zero. offset calibration is not affected by changes in pin calibration, and should be performed prior to gain calibration. proper gain and offset calibration requires great care and the use of atremdy sensitive and accurate reference instrumcd.ts. the voltage standard used as a signal source must be very stable and be capable of being set to within ~ l/lolsb of the desired value at any point within its range. offset calibration for a 0 to + 10v unipolar range, set the input voltage precisely to + 305fj. v for the daslls7, + is3fj. v for the das 1158 and + 76fj.v for the das1l59. for a 0 to +5v unipolar range, set the input to + 153fj.v for the das1l57, + 76fj.v for the das1158 and + 38fj.v for the das1159. then adjust the zero potentiometer until the converter is just on the verge of switching from 000 000 to 000 001 (das1157/dasi158) or from 100 000 to 100 001 (das1159). for the ~ 5v bipolar range, set the input voltage precisely to + 305fj. v for the das1l57, + 153fj. v for the das1l58 and + 76fj.v for the dasil59. for a ~ lov bipolar range, set the input voltage precisely to +610fj.y for the daslls7, +305fj.v for the das1l58 and + 153fj.v for the das1i59. adjust the zero potentiometer until the offset binary coded units are just on the verge of switching from 000 000 to 000 001 and the two's complement coded units are just on the verge of switching from 100 000 to 100 001. gain calibration set the input voltage precisely to + 9.99909v (das1l57)1 +9.99954v (das1l58)1 + 9.99977v (das1159) for the 0 to + lov units, +4.99954v (dasi157)/ +4.99977v (dasi158)1 +4.99989v (das1159) for 0 to + 5v units, +9.998l7v (das 1157)/+ 9.99909v (das 11 58)1 + 9. 99954v (das1159) for ~ iov units, or + 4.99909v (dasl157)/ + 4.99954v (dasi158)/ +4.99977v (das1l59) for ~5v units. note that these values are i 1/2lsbs less than nominal full scale. adjust the gain potentiometer until binary and offset binary coded units are just on the verge of switching from 11 10 to 11 11 or modified binary and two's complement coded units are just on the verge of switching from 011 10 to 011 11. das1157idasns8idas1159 input/output rela tionsiups the das1l57idas1i58 produces a true binary coded output when configured as a unipolar device. configured as a bipolar device, it can produce either offset binary or two's complement output codes. the most significant bit (msb) is used to obtain the binary and offset binary codes while (msb) is used to obtain two's complement coding. the das1159 produces a modified binary coded output when configured as a unipolar device. configured as a bipolar device it can only produce two's com- plement output codes. the das1159 uses msb to obtain the modified binary and two's complement output codes; the dasll59 duc~ not have an msb output. table ii shows the daslls7/ das1158/das1l59 unipolar analog input/digital output re- lauonships. table hi shows the das1l57/das1l581das1l59 btpolar analog input/digital output relationships. input voltap - output code reiatiouhips unipolar input voltaaa aaaloslnput di,itat output oto +svrange oto + 10vitaqe dasi157 +4.99969v + o.ooooov das1l58 +4.99985v +o.ooooov das1l59 +4.99992v +o.ooooov + 9. 99939v + o.ooooov binary code ii 1111 1111 1111 00 0000 0000 0000 binary code iii iiii 1111 1111 000 0000 0000 0000 modified binary code 0111 1111 1111 1111 1000 0000 0000 0000 +9.99969v +o.ooooov +9.99985v + o.ooooov table ii. unipolar input-output relationships bipolar "'pat voltaaa aaaioi "'put " s v " i tv ........ dasiis7 +4.99939y + o.oooooy - s.oooooy dasi is& +4.99969v +o.oooooy - s.oooooy dasijs9 +4.99985y +o.oooooy - s.oooooy diptaj 00njnt oft_iliauycodo t_'.c-pic-cook +9.9987&y +o.oooooy - 10.oooooy ii 1111 \iii 1111 i 0 0000 0000 0000 00 0000 0000 0000 01 1111 1111 iiji 00 0000 0000 0000 i 0 0000 0000 0000 +9.99939y +o.oooooy - 10.oooooy ii i 1111 1111 i \ii 011 1111 1111 1111 i 00 0000 0000 0000 000 0000 0000 0000 000 0000 0000 0000 100 0000 0000 0000 +'1.99969v +o.oooooy - 10.oooooy 0111 1111 1111 ]]11 0000 0000 0000 0000 i 000 0000 0000 0000 table iii. bipolar input-output relationships tri-state digital output the adc digital outputs are provided in parallel format to the output tri-state buffers. the output infonnation can be applied to a data bus in either a one-byte or a two-byte format by using the high byte enable and low byte enable tenninals. if the tn-state feature is not required, normal digital outputs can be obtained by connecting the enable pins to ground. power supply and grounding connections no power supply decoupling is required since the das1l57/ dasi 158/dasi 159 contain high quality tantalum capacitors on each of the power supply inputs to ground. the analog and digital grounds are internally connected in the das1l57/das1158/das1l59. but in many applications, an external connection between the digital ground pin and analog ground pin is advisable for optimum performance. star.1'ojfn" of star-point of digital oilounos analog giiovnds , , :. i dlgit'il 'in.f.log i giiovnd ground i i i i oas11s7ioas11581oa$1159 i i i " ) anauxi 'ower svt>l'l.y rommo" digital po_ii suppl.v common figure 4. tvpical ground lavout for das1157/das1158/ dasl159 j obsolete
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