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cypress semiconductor corporation 198 champion court san jose , ca 95134 - 1709 408 - 943 - 2600 document number: 002 - 15055 rev. *c revised july 1, 2016 the following document contains information on cypress products. although the document is marked with the name broadcom , the company that originally developed the specification, cypress will continue to offer these pr oducts to new and existing customers. continuity of specifications there is no change to this document as a result of offering the device as a cypress product. any changes that have been made are the result of normal document improvements and are noted in the document history page, where supported. future revisions will occur when appropriate, and changes will be noted in a document history page. continuity of ordering part numbers cypress continues to support existing part numbers. to order these products , please use only the ordering part numbers listed in this document. for more information please visit our website at www .cypress.com or contact your local sales office for additional information about cypress pro ducts and services. our customers cypress is for true innovators C in companies both large and small. our customers are smart, aggressive, out - of - the - box thinkers who design and develop game - changing products that revolutionize their industries or create n ew industries with products and solutions that nobody ever thought of before. about cypress founded in 1982, cypress is the leader in advanced embedded system solutions for the worlds most innovative automotive, industrial, home automation and appliances, consumer electronics and medical products. cypresss programmable systems - on - chip, general - purpose microcontrollers, analog ics, wireless and usb - based connectivity solutions and reliable, high - performance memories help engineers design differentiated pro ducts and get them to market first. cypress is committed to providing customers with the best support and engineering resources on the planet enabling innovators and out - of - the - box thinkers to disrupt markets and create new product categories in record tim e. to learn more, go to www.cypress.com .
advance data sheet BCM4390 4390-ds103-r 5300 california avenue ? irvine, ca 92617 ? phone: 949-926-5000 ? fax: 949-926-5203 february 5, 2014 wiced? wi-fi ieee 802.11 b/g/n soc with embedded application processor general description key ieee 802.11x features the broadcom? BCM4390 is a single-chip device that provides the highest level of integration for applications targeting the internet of things and provides a complete embedded wireless system solution included in a system-on-a-chip (soc). the BCM4390 device supports all the rates specified in the ieee 802.11 b/g/n specifications. included on- chip are an arm cortex-based applications processor, single stream ieee 802.11n mac/ baseband/radio, a 2.4 ghz transmit power amplifier (pa), and a receive low-noise amplifier (lna). it also supports optional antenna diversity for improved rf performance in difficult environments. BCM4390 is an optimized soc targeting embedded applications in the industrial and medical sensor, home appliances and, generally, internet-of-things space. using advanced design techniques and process technology to reduce active and idle power, the BCM4390 is designed to address the needs of embedded devices that require minimal power consumption and compact size. it includes a power management unit which simplifies the system power topology and allows for direct operation from a battery for battery powered applications while maximizing battery life. features general features ? supports battery voltage range from 3.0v to 5.25v supplies with internal switching regulator. ? programmable dynamic power management ? 6k-bit otp for storing board parameters ? package options: 286 bump wlcsp (4.87 mm x 5.413 mm; 0.2 mm pitch) ? ieee 802.11n compliant ? single-stream spatial multiplexing up to 72 mbps data rate ? supports 20 mhz channels with optional sgi. ? full ieee 802.11 b/g legacy compatibility with enhanced performance ? tx and rx low-density parity check (ldpc) support for improved range and power efficiency ? on-chip power and low-noise amplifiers. ? internal fractional npll allows support for a wide range of reference clock frequencies. ? supports ieee 802.15.2 external coexistence interface to optimize bandwidth utilization with other co-located wireless technologies such as bluetooth, lte, gps, or wimax. ? integrated armcr4? processor with tightly coupled memory for complete wlan subsystem functionality, minimizing the need to wake up the applications processor for standard wlan functions (to further minimize power consumption while maintaining the ability to upgrade to future features in the field) ? software architecture supported by standard wiced sdk to allow easy migration from existing discrete mcu designs and to future devices ? security support: ? wpa? and wpa2? (personal) support for powerful encryption and authentication ? aes and tkip in hardware for faster data encryption and ieee 802.11i compatibility ? reference wlan subsystem provides cisco? compatible extensions (ccx, ccx 2.0, ccx 3.0, ccx 4.0, ccx 5.0) ? supports wi-fi protected setup and wi-fi easy-setup ? worldwide regulatory support: global products supported with worldwide homologated design application processor features ? arm cortex-m3 32-bit risc processor ? 448 kb ram for application code and data execution
broadcom?, the pulse logo, connecting everything?, and the connecting everything logo are among the trademarks of broadcom corporation and/or its affiliate s in the united states, certain other countries and/or the eu. any other trademarks or trade names mentio ned are the property of their respective owners. this data sheet (including, without limitation, the broa dcom component(s) identified herein) is not designed, intended, or certified for use in an y military, nuclear, medical, mass tr ansportation, aviation, navigations, pollution control, hazardous substances management, or other high-risk applicatio n. broadcom provides this data sheet ?as-is,? without warranty of any kind. broadcom disclaims all warranties, expressed and implied, including, without limitation, the implied warranties of merchantability, fitness for a partic ular purpose, and non-infringement. broadcom corporation 5300 california avenue irvine, ca 92617 ? 2014 by broadcom corporation all rights reserved printed in the u.s.a. figure 1: functional block diagram BCM4390 2.4 ghz wlan tx 2.4 ghz wlan vio vbat wlan system i/f application cpu host i/f 37.4 mhz xtal t/r switch wl_reg_on wl_jtag wl_gpio clk_req uart spi flash i 2 s apps_gpio
revision history BCM4390 advance data sheet broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 3 ? broadcom confidential revision history revision date change description 4390-ds103-r 02/05/14 updated: ? ?features? on page 1 4390-ds102-r 12/11/13 updated: ? figure 1 on page 1 ? ?general features? on page 2 ? ?power supply topology? on page 12 ? figure 3: ?typical power topology,? on page 13 ? ?external 32.768 khz low-power oscillator? on page 20 ? table 4: ?gpio port a alternate functions,? on page 23 ? figure 9: ?wlan phy block diagram,? on page 35 ? figure 10: ?radio functional block diagram,? on page 36 ? ?receiver path? on page 36 ? table 8: ?wlan mac architecture,? on page 30 ? table 9: ?wlcsp and fcfbga pin descriptions,? on page 48 ? table 14: ?recommended operating conditions and dc characteristics,? on page 57 ? table 16: ?wlan 2.4 ghz receiver performance specifications,? on page 60 ? table 19: ?core buck switching regulator (cbuck) specifications,? on page 65 ? table 20: ?ldo3p3 specifications,? on page 66 ? table 24: ?typical wlan power consumption,? on page 69 ? figure 14: ?wlan = off, apps cpu = off,? on page 72 ? figure 15: ?wlan = on, apps cpu = off,? on page 73 ? figure 16: ?wlan = off, apps cpu= on,? on page 73 ? figure 18: ?wlcsp keep-out areas for pcb layout ?bottom view, bumps facing up,? on page 76 4390-ds101-r 12/05/13 updated: ? significant changes throughout the document. 4390-ds100-r 05/15/13 initial release
table of contents BCM4390 advance data sheet broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 4 ? broadcom confidential table of contents about this document ............................................................................................................................... ......9 purpose and audience ........................................................................................................... ..................9 acronyms and abbreviations..................................................................................................... ..............9 document conventions ........................................................................................................... ................9 technical support ............................................................................................................................... ............9 section 1: overview ........................................................................................................ 10 overview ............................................................................................................................... ........................10 features ............................................................................................................................... .........................10 standards compliance ............................................................................................................................... ...11 section 2: power supplies and po wer management ........................................................ 12 BCM4390 pmu features ..............................................................................................................................1 2 power supply topology ............................................................................................................................... .12 power management ............................................................................................................................... ......14 pmu sequencing ............................................................................................................................... ...........14 power-off shutdown ............................................................................................................................... .....15 power-up/power-down/reset circuits .......................................................................................................16 section 3: frequency references ..................................................................................... 17 crystal interface and clock generation .......................................................................................................17 external frequency reference .....................................................................................................................18 external 32.768 khz low-power oscillator ..................................................................................................19 section 4: applications microproce ssor and memory unit .............................................. 21 reset ............................................................................................................................... ..............................21 section 5: applications microprocessor subsystem external interfaces ........................... 22 introduction ............................................................................................................................... ...................22 spi flash interface ............................................................................................................................... .........24 spi master/slave interface..................................................................................................... ................24 uart interfaces ............................................................................................................................... .............24 i 2 s interface ............................................................................................................................... ...................25 general purpose input and output .............................................................................................................26 i 2 c ............................................................................................................................... ...................................27 section 6: wlan global functions................................................................................... 28 wlan cpu and memory subsystem ............................................................................................................28 one-time programmable memory ..............................................................................................................28
table of contents BCM4390 advance data sheet broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 5 ? broadcom confidential uart interface ............................................................................................................................... ..............28 jtag interfaces ............................................................................................................................... ..............29 boot sequence ............................................................................................................................... ...............29 section 7: wireless lan mac and phy............................................................................. 30 ieee 802.11n mac ............................................................................................................................... ..........30 programmable state machine..................................................................................................... ...31 wired equivalent privacy....................................................................................................... .........32 transmit engine ................................................................................................................ ..............32 receive engine................................................................................................................. ...............32 interframe space ............................................................................................................... .............32 timing synchronization function ................................................................................................ ...33 network allocation vector ...................................................................................................... .......33 mac-phy interface .............................................................................................................. ...........33 ieee 802.11n phy ............................................................................................................................... ...........33 section 8: wlan radio subsystem .................................................................................. 36 receiver path ............................................................................................................................... .................36 transmit path ............................................................................................................................... ................37 calibration ............................................................................................................................... .....................37 section 9: pinout and signal descriptions ........................................................................ 38 ball maps ............................................................................................................................... .......................38 pin lists ............................................................................................................................... ..........................39 signal descriptions ............................................................................................................................... ........47 i/o states ............................................................................................................................... .......................52 section 10: dc characterist ics ......................................................................................... 55 absolute maximum ratings .........................................................................................................................55 environmental ratings ............................................................................................................................... ..56 electrostatic discharge specifications .........................................................................................................56 recommended operating conditions and dc characteristics ....................................................................56 section 11: wlan rf specifications................................................................................. 58 introduction ............................................................................................................................... ...................58 2.4 ghz band general rf specifications ......................................................................................................59 wlan 2.4 ghz receiver performance specifications ..................................................................................59 wlan 2.4 ghz transmitter performance specifications .............................................................................62 general spurious emissions specifications ..................................................................................................63
table of contents BCM4390 advance data sheet broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 6 ? broadcom confidential section 12: internal regu lator electrical specifications.................................................... 64 core buck switching regulator ....................................................................................................................64 3.3v ldo (ldo3p3) ............................................................................................................................... ........65 cldo ............................................................................................................................... ..............................66 lnldo ............................................................................................................................... ............................67 section 13: system power consumption.......................................................................... 68 wlan current consumption ........................................................................................................................68 jtag timing ............................................................................................................................... ...................69 section 14: power-up sequence and timing.................................................................... 70 sequencing of reset and regulator control signals ....................................................................................70 description of control signals................................................................................................. ...............70 control signal timing diagrams ................................................................................................. ............71 section 15: package information ..................................................................................... 73 package thermal characteristics .................................................................................................................73 junction temperature estimation and psi jt versus theta jc .....................................................................73 environmental characteristics .....................................................................................................................73 section 16: mechanical information ................................................................................ 74 section 17: ordering information .................................................................................... 76
list of figures BCM4390 advance data sheet broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 7 ? broadcom confidential list of figures figure 1: functional block diagram.............................................................................................. ......................2 figure 2: block diagram and io .................................................................................................. ......................10 figure 3: typical power topology................................................................................................ .....................13 figure 4: recommended oscillator configuration .................................................................................. .........17 figure 5: recommended circuit to use with an external reference clock......................................................18 figure 6: uart timing ........................................................................................................... ...........................25 figure 7: boot sequence ......................................................................................................... .........................29 figure 8: wlan mac architecture ................................................................................................. ..................30 figure 9: wlan phy block diagram ................................................................................................ .................35 figure 10: radio functional block diagram....................................................................................... ...............36 figure 11: 286-bump wlcsp (bottom view, bumps facing up) ......................................................................38 figure 12: port locations....................................................................................................... ...........................58 figure 13: wlan = on, apps cpu = on ............................................................................................. ..............71 figure 14: wlan = off, apps cpu = off........................................................................................... ..............71 figure 15: wlan = on, apps cpu = off ............................................................................................ ..............72 figure 16: wlan = off, apps cpu= on............................................................................................. ..............72 figure 17: 286-bump wlcsp package bump map ...................................................................................... .....74 figure 18: wlcsp keep-out areas for pcb layout?bottom view, bumps facing up ....................................75
list of tables BCM4390 advance data sheet broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 8 ? broadcom confidential list of tables table 1: power-up/power-down/reset control signals.............................................................................. ....16 table 2: crystal oscillator and external cloc k ? requirements and performance ...........................................18 table 3: external 32.768 khz sleep clock specifications......................................................................... .........20 table 4: gpio port a alternate functions ........................................................................................ ................23 table 5: example of common baud rates........................................................................................... .............24 table 6: uart timing specifications ............................................................................................. ...................25 table 7: bank b gpio test functions............................................................................................. ...................26 table 8: 286-bump wlcsp coordinates............................................................................................. ..............39 table 9: wlcsp and fcfbga pin descriptions ..................................................................................... ...........47 table 10: i/o states ............................................................................................................ ..............................52 table 11: absolute maximum ratings.............................................................................................. ................55 table 12: environmental ratings................................................................................................. .....................56 table 13: esd specifications.................................................................................................... .........................56 table 14: recommended operating conditions and dc characteristics .........................................................57 table 15: 2.4 ghz band general rf specifications................................................................................ ...........59 table 16: wlan 2.4 ghz receiver performance specifications ...................................................................... .59 table 17: wlan 2.4 ghz transmitter perf ormance specifications..................................................................6 2 table 18: general spurious emissions specifications............................................................................. ..........63 table 19: core buck switching regulator (cbuck) specifications .................................................................. .64 table 20: ldo3p3 specifications ................................................................................................. .....................65 table 21: cldo specifications ................................................................................................... .......................66 table 22: lnldo specifications .................................................................................................. ......................67 table 23: application processor current consumption ............................................................................. ......68 table 24: typical wlan power consumption ........................................................................................ ..........68 table 25: jtag timing characteristics........................................................................................... ...................69 table 26: package thermal char acteristics ....................................................................................... ...............73
about this document broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 9 ? BCM4390 advance data sheet broadcom confidential about this document purpose and audience this data sheet provides details on the functional, operational, and electrical characteristics for the broadcom? BCM4390. it is intended for hardware design, application, and oem engineers. acronyms and abbreviations in most cases, acronyms and abbreviations are defined on first use. for a comprehensive list of acronyms and other terms used in broadcom documents, go to http://www.broadcom.com/press/glossary.php . document conventions the following conventions may be used in this document: technical support broadcom provides customer access to a wide range of information, including technical documentation, schematic diagrams, product bill of materials, pcb layout information, and software updates through its customer support portal ( https://support.broadcom.com ). for a csp account, contact your sales or engineering support representative. in addition, broadcom provides other product support through its downloads & support site at ( http://www.broadcom.com/support/ ). wiced support is provided via the support portal at ( http://www.broadcom.com/products/wiced/ ). convention description bold user input and actions: for example, type exit , click ok, press alt+c monospace code: #include html:

command line commands and parameters: wl [-l] < > placeholders for required elements: enter your or wl [ ] indicates optional command-line parameters: wl [-l] indicates bit and byte ranges (inclusive): [0:3] or [7:0]
overview broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 10 ? BCM4390 advance data sheet broadcom confidential section 1: overview overview the broadcom? BCM4390 is a single-chip device that provides the highest level of integration for an embedded system-on-a-chip with integrated ieee 802.11 b/g/n mac/baseband/radio and a separate arm-cortex m3 applications processor. it provides a small form-factor solution with minimal external components to drive down cost for mass volumes and allows for an embedded system with flexibility in size, form, and function. comprehensive power management circuitry and software ensure the system can meet the needs of highly embedded systems that require minimal power consumption and reliable operation. figure shows the interconnect of all the major physical blocks in the BCM4390 and their associated external interfaces, which are described in greater detail in the following sections. figure 2: block diagram and io features the BCM4390 supports the following features: ? arm cortex-m3 clocked at 48 mhz ? 448 kb of sram available for the applications processor ? two high-speed 4-wire uart interfaces with operation up to 4 mbps ? two low-speed 2-wire uart interfaces ? one generic spi master/slave interface with operation up to 24 mhz ? one spi master interface for serial flash BCM4390 spi (flash) gpio_b[0:11] 2-wire uart4 2x4-wire uart1/2 i 2 s i 2 c spi master/slave jtag wake reset_n arm cortex-m3 48 mhz 448 kb ram wlan core 802.11n 1x1 2.4 ghz rf tx rf rx tx/rx switch control antenna diversity 3v3 gnd gpio_a[0:11] 2-wire uart3
standards compliance broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 11 ? BCM4390 advance data sheet broadcom confidential ?one i 2 c interface ?one i 2 s interface ? 24 x gpios (12 dedicated,12 with alternate functions) ? ieee 802.11 b/g/n 1x1 2.4 ghz radio ? single- and dual-antenna support standards compliance the BCM4390 supports the following standards: ? ieee 802.11n ? ieee 802.11b ? ieee 802.11g ? ieee 802.11d ? ieee 802.11h ? ieee 802.11i ?security: ?wep ?wpa? personal ?wpa2? personal ?wmm ? wmm-ps (u-apsd) ?wmm-sa ? aes (hardware accelerator) ? tkip (hardware accelerator) ? ckip (software support) ? proprietary protocols: ?ccxv2 ?ccxv3 ?ccxv4 ?ccxv5 ?wfaec the BCM4390 supports the following additional standards: ? ieee 802.11r?fast roaming (between aps) ? ieee 802.11w?secure management frames ? ieee 802.11 extensions: ? ieee 802.11e qos enhancements (as per the wmm? specification is already supported) ? ieee 802.11i mac enhancements ? ieee 802.11k radio resource measurement
power supplies and power management broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 12 ? BCM4390 advance data sheet broadcom confidential section 2: power supplies and power management BCM4390 pmu features ? vbat to 1.35vout (275 ma nominal, 600 ma maximum) core-buck (cbuck) switching regulator ? vbat to 3.3vout (200 ma nominal, 450 ma maximum) ldo3p3 ? 1.35v to 1.2vout (100 ma nominal, 150 ma maximum) lnldo ? 1.35v to 1.2out (175 ma nominal, 300 ma maximum) cldo with bypass mode for deep sleep ? additional internal ldos (not externally accessible) power supply topology one buck regulator, multiple ldo regulators, and a power management unit (pmu) are integrated into the BCM4390. all regulators are programmable via the pmu. these blocks simplify power supply design for embedded designs. a single vbat (3.0v to 5.25v dc max) and vio supply (1.8 v to 3.3v) can be used, with all additional voltages being provided by the regulators in the BCM4390. two control signals, apps_reg_on and wl_reg_on, are used to power-up the regulators and take the respective core out of reset. the cbuck cldo a nd lnldo power up when any of the reset signals are deasserted. all regulators are powered down only when both apps_reg_on and wl_reg_on are deasserted. the applications processor can drive wl_reg_on internally when the pin is externally tied to ground. the cldo and lnldo may be turned off/on based on the dynamic demands of the application. the BCM4390 allows for an extremely low power-consumpt ion mode by completely shutting down the cbuck, cldo, and lnldo regulators. when in this state, lpldo1 and lpldo2 (which are low-power linear regulators that are supplied by the system vio supply) provide the BCM4390 with all the voltages it requires, further reducing leakage currents.
broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 13 ? power supply topology BCM4390 advance data sheet broadcom confidential figure 3 shows the regulators and a typical power topology. figure 3: typical power topology BCM4390 internal lnldo (80 ma) internal lnldo (80 ma) internal lnldo (80 ma) internal vcoldo (80 ma) 1.2v 1.2v 1.2v 1.2v wl rf ? rx/lna (2.4 ghz) wl rf ? logen (2.4 ghz) wl rf ? tx (2.4 ghz) wl rf ? afe xtal ldo (30 ma) wl rf ? xtal wl rf ? rfpll pfd/mmd 1.2v lnldo (10 ma) 1.2v apps analog wlan/apps cpu/clb/top (always on ) wlan bbpll/dfll apps cpu digital wl digital wl phy wl otp wl/apps cpu srams 1.2?1.1v memlpldo (3 ma) vddio 0.9v wl rf ? vco wl otp 3.3v vddio_rf wl pa/pad ( 2.4 ghz) wl rf ? cp internal lnldo (25 ma) internal lnldo (8 ma) 2.5v 2.5v cldo peak 300 ma average 175 ma (bypass in deep-sleep) ldo3p3 peak 800?450 ma average 200 ma 3.3v 1.1v lpdo1 (3 ma) 1.35v core buck regulator cbuck peak 600 ma average 275 m a vbat vbat vddio apps_reg_on wl_reg_on areas with hatching are off-chip off-chip area off-chip area
power management broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 14 ? BCM4390 advance data sheet broadcom confidential power management the BCM4390 has been designed with the stringent power consumption requirements of embedded devices in mind. all areas of the chip design are optimized to minimize power consumption. silicon processes and cell libraries were chosen to reduce leakage current and supply voltages. additionally, the BCM4390 integrated ram is a high vt memory with dynamic clock control. the dominant supply current consumed by the ram is leakage current only. the BCM4390 also includes an advanced wlan power management unit (pmu) sequencer. the pmu sequencer provides significant powe r savings by putting the BCM4390 into various power management states appropriate to the current environment and activities that are being performed. the power management unit enables and disables internal regulators, switches, and other blocks based on a computation of the required resources and a table that describes the relationship between resources and the time needed to enable and disable them. power up sequences are fully programmable. configurable, free- running counters (running at 32.768 khz lpo clock) in the pmu sequencer are used to turn on/turn off individual regulators and power switches. clock speeds are dynamically changed (or gated altogether) for the current mode. slower clock speeds are used wherever possible. the BCM4390 wlan-specific power states are described as follows: ? active mode? all wlan blocks in the BCM4390 are powered up and fully functional with active carrier sensing and frame transmission and receiving. all required regulators are enabled and put in the most efficient mode based on the load current. clock speeds are dynamically adjusted by the pmu sequencer. ? doze mode?the radio, analog domains, and most of the linear regulators are powered down. the rest of the wlan portion of the BCM4390 remains powered up in an idle state. all main clocks (pll, crystal oscillator or tcxo) are shut down to reduce active power to the minimum. the 32.768 khz lpo clock is available only for the pmu sequencer. this condition is necessary to allow the pmu sequencer to wake up the chip and transition to active mode. in doze mode, the primary power consumed by the wlan core is due to leakage current. ? deep-sleep mode?most of the chip including both analog and digital domains and most of the regulators are powered off. logic states in the digital core are saved and preserved into a retention memory in the always-on domain before the digital core is powered off. upon a wake-up event triggered by the pmu timers or an external interrupt, logic states in the digital core are restored to their pre-deep-sleep settings to avoid lengthy hw reinitialization. ? power-down mode?the BCM4390 is effectively powered off by shutting down all internal regulators. the chip is brought out of this mode by external logic re-enabling the internal regulators. the BCM4390 application processor subsystem can be independently powered on or off at the system level in the power-down mode. in addition it is also possible to keep the application processor in active mode while the wlan blocks are in doze or deep-sleep. pmu sequencing the pmu sequencer is responsible for minimizing system power consumption. it enables and disables various system resources based on a computation of the required resources and a table that describes the relationship between resources and the time needed to enable and disable them.
power-off shutdown broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 15 ? BCM4390 advance data sheet broadcom confidential resource requests may come from several sources: clock requests from cores, the minimum resources defined in the resourcemin register, and the resources requested by any active resource request timers. the pmu sequencer maps clock requests into a set of resources required to produce the requested clocks. each resource is in one of four states: enabled, disabled, transition_on, and transition_off and has a timer that contains 0 when the resource is enabled or disabled and a non-zero value in the transition states. the timer is loaded with the time_on or time_off value of the reso urce when the pmu determines that the resource must be enabled or disabled. that timer decrements on each 32.768 khz pmu clock. when it reaches 0, the state changes from transition_off to disabled or transition_on to enabled. if the time_on value is 0, the resource can go immediately from disabled to enabled. similarly, a time_off value of 0 indicates that the resource can go immediately from enabled to disabled. the terms enable sequence and disable sequence refer to either the immediate transition or the timer load-decrement sequence. during each clock cycle, the pmu seque ncer performs the following actions: ? computes the required resource set based on requests and the resource dependency table. ? decrements all timers whose values are non zero. if a timer reaches 0, the pmu clears the resourcepending bit for the resource and inverts the resourcestate bit. ? compares the request with the current resource status and determines which resources must be enabled or disabled. ? initiates a disable sequence for each resource that is enabled, no longer being requested, and has no powered up dependents. ? initiates an enable sequence for each resource that is disabled, is being requested, and has all of its dependencies enabled. power-off shutdown the BCM4390 provides a low-power shutdown feature that allows the device to be turned off. when the BCM4390 is not needed in the system, vddio_rf and vddc are shut down while vddio remains powered. this allows the BCM4390 to be effectively off while keeping the i/o pins powered so that they do not draw extra current from any other devices connected to the i/o. during a low-power shut-down state, provided vddio remains applied to the BCM4390, all outputs are tristated, and most inputs signals are disabled. input voltages must remain within the limits defined for normal operation. this is done to prevent current paths or create loading on any digital signals in the system, and enables the BCM4390 to be fully integrated in an embedded device and take full advantage of the lowest power-savings modes. when the BCM4390 is powered on from this state, it is the same as a normal power-up and the device does not retain any information about its state from before it was powered down.
power-up/power-down/reset circuits broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 16 ? BCM4390 advance data sheet broadcom confidential power-up/power-down/reset circuits the BCM4390 has two signals (see table 1 ) that enable or disable the application cpu and wlan subsystems and the internal regulator blocks, allowing external system circuitry to control power consumption. for timing diagrams of these signals and the required power-up sequences, see section 14: ?power-up sequence and timing,? on page 70 . table 1: power-up/power-down/reset control signals signal description wl_reg_on this signal is used by the pmu (with apps_reg_on) to power up the wlan section. it is also or-gated with the apps_reg_on input to control the internal BCM4390 regulators. when this pin is high, the regulators are enabled and the wlan section is out of reset. when this pin is low, the wlan section is in reset. if apps_reg_on and wl_reg_on are both low, the regulators are disabled. this pin has an internal 200 k ? pull-down resistor that is enabled by default. it can be disabled through programming. apps_reg_on this signal is used by the pmu (with wl_reg_on) to decide whether or not to power down the internal BCM4390 regulators. if apps_reg_on and wl_reg_on are low, the regulators will be disabled. this pin has an internal 200 k ? pull-down resistor that is enabled by default. it can be disabled through programming.
frequency references broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 17 ? BCM4390 advance data sheet broadcom confidential section 3: frequency references an external crystal is used for generating all radio frequencies and normal operation clocking. as an alternative, an external frequency reference may be used. in addition, a low-power oscillator (lpo) is provided for lower power mode timing. crystal interface and clock generation the BCM4390 can use an external crystal to provide a frequency reference. the recommended configuration for the crystal oscillator including all external components is shown in figure 4 . consult the reference schematics for the latest configuration. figure 4: recommended oscillator configuration a fractional-n synthesizer in the BCM4390 generates the radio frequencies, clocks, and data/packet timing, enabling it to operate using a wide selection of frequency references. the recommended default frequency reference is a 37.4 mhz crystal. the signal characteristics for the crystal interface are listed in table 2 on page 18 . note: although the fractional-n synthesizer can support alternative reference frequencies, frequencies other than the default require support to be added in the driver, plus additional extensive system testing. contact broadcom for further details. 12?27 pf 12?27 pf wrf_xtal_out wrf_xtal_in c c x ohms * * resistor value determined by crystal drive level. see reference schematics for details. 37.4 mhz
external frequency reference broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 18 ? BCM4390 advance data sheet broadcom confidential external frequency reference as an alternative to a crystal, an external precision frequency reference can be used, provided that it meets the phase noise requirements listed in table 2 . if used, the external clock should be connected to the wrf_xtal_in pin through an external 1000 pf coupling capacitor, as shown in figure 5 . the internal clock buffer connected to this pin will be turned off when the BCM4390 goes into sleep mode. when the clock buffer turns on and off there will be a small impedance variation. power must be supplied to the wrf_xtal_buck_vdd1p5 pin. figure 5: recommended circuit to use with an external reference clock table 2: crystal oscillator and external clock ? requirements and performance parameter conditions/notes crystal a external frequency reference b c min typ max min typ max units frequency ieee 802.11 b/g/n operation between 19 mhz and 52 mhz d frequency tolerance over the lifetime of the equipment, including temperature e without trimming ?20 ? 20 ?20 ? 20 ppm crystal load capacitance ? ?12????pf esr ? ??60??? ? drive level external crystal must be able to tolerate this drive level. 200?????w input impedance (wrf_xtal_in) resistive ? ? ? 30k 100k ? ? capacitive ??7.5??7.5pf wrf_xtal_in input low level dc-coupled digital signal ???0?0.2v wrf_xtal_in input high level dc-coupled digital signal ???1.0?1.26v wrf_xtal_in input voltage (see figure 5 ) ac-coupled analog signal ? ? ? 400 ? 1200 mv p-p reference clock nc 1000 pf wrf_xtal_in wrf_xtal_out
external 32.768 khz low-power oscillator broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 19 ? BCM4390 advance data sheet broadcom confidential external 32.768 khz low-power oscillator the BCM4390 uses a secondary low frequency clock for low-power-mode timing. either the internal low- precision lpo or an external 32.768 khz precision oscillator is required. the internal lpo frequency range is approximately 33 khz 30% over process, voltage, and temperature, which is adequate for some applications. however, one trade-off caused by this wide lpo tolerance is a small current consumption increase during power save mode that is incurred by the need to wake up earlier to avoid missing beacons. whenever possible, the preferred approach is to use a precision external 32.768 khz clock that meets the requirements listed in figure 3 on page 20 . the external 32.768 khz crystal provides: ? a real-time clock for the apps core ? accurate timing for the wlan power-save modes duty cycle 37.4 mhz clock ? ? ? 40 50 60 % phase noise f (ieee 802.11b/g) 37.4 mhz clock at 10 khz offset??????129dbc/hz 37.4 mhz clock at 100 khz offset??????136dbc/hz phase noise f (ieee 802.11n, 2.4 ghz) 37.4 mhz clock at 10 khz offset??????134dbc/hz 37.4 mhz clock at 100 khz offset??????141dbc/hz a. (crystal) use wrf_xtal_in and wrf_xtal_out. b. see ?external frequency reference? on page 18 for alternative connection methods. c. for a clock reference other than 37.4 mhz, 20 log10(f/ 37.4) db should be added to the limits, where f = the reference clock frequency in mhz. d. the frequency step size is approximately 80 hz resolution. e. it is the responsibility of the equipment designer to select oscillator components that comply with these specifications. f. assumes that external clock has a flat phase noise response above 100 khz. table 2: crystal oscillator and external clock ? requirements and performance (cont.) parameter conditions/notes crystal a external frequency reference b c min typ max min typ max units
external 32.768 khz low-power oscillator broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 20 ? BCM4390 advance data sheet broadcom confidential table 3: external 32.768 khz sleep clock specifications parameter lpo clock units nominal input frequency 32.768 khz frequency accuracy 100 ppm duty cycle 30?70 % input signal amplitude 200?1800 mv, p-p signal type square-wave or sine-wave ? input impedance a a. when power is applied or switched off. >100k <5 ? pf clock jitter (during initial start-up) <10,000 ppm
applications microprocessor and memory unit broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 21 ? BCM4390 advance data sheet broadcom confidential section 4: applicatio ns microprocessor and memory unit the applications microprocessor core is based on the arm? cortex-m3? 32-bit risc processor with embedded ice-rt debug and jtag interface units. the applications processor boots from an internal rom-based bootloader. the rom bootloader copies a configurable boot application from serial-flash to ram, then passes execution to the boot application. the applications processor is responsible for running the entirety of the wiced software stack, including the optional rtos, wlan driver, various libraries to implement wlan, networking features, and the end-user application. the 48 mhz processor operates efficiently in both power and performance with tightly-coupled sram of 448 kb to provide space for code execution and system resource and variable storage. the application processor controls the peripheral i/o of the BCM4390, including a dedicated spi flash interface, spi master/slave interface, gpios, i 2 c, i 2 s, and four uarts. the application processor is also responsible for bootstrapping the wlan core, including downloading the wlan firmware from external serial flash storage. the BCM4390 does not have internal flash storage: all code is stored and loaded from external serial flash. in addition to the dedicated spi interface to serial flash, the BCM4390 provides a secondary master/slave spi interface to allow expansion with other devices. to reduce overall system power consumption, the application processor can be powered down independently of the wlan core. during powerdown, the state of the entire 448 kb of applications ram is retained. reset the BCM4390 has an integrated power-on reset circuit that resets all circuits to a known power-on state. the power-on reset (por) circuit is out of reset after apps_reg_on goes high. if apps_reg_on is low, then the por circuit is held in reset.
applications microprocessor subsystem external interfaces broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 22 ? BCM4390 advance data sheet broadcom confidential section 5: applications microprocessor subsystem external interfaces introduction the BCM4390 provides a large variety of io interfaces to enable flexible system design: ? a spi master for flash access ? a spi master/slave ? two high-speed 4-wire uarts ? two 2-wire uart available for use by the apps core (and wlan core for debugging) ?an i 2 c interface ?an i 2 s interface ? up to 24 gpios organized in two separate banks of 12. gpios in bank a have alternate functions (see table 4 on page 23 ), gpios in bank b are dedicated.
broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 23 ? introduction BCM4390 advance data sheet broadcom confidential table 4: gpio port a alternate functions name alternate functions uart1 uart2 uart3 spi i 2 c i 2 s gpio debug apps_i2s_do ? uart2_cts_n uart3_tx/rx ? ? i2s_do gpio_a8 ? apps_i2s_di ? uart2_rts_n uart3_tx/rx ? ? i2s_di gpio_a6 ? apps_i2s_clk ? uart2_rxd uart3_tx/rx ? ? i2s_clk gpio_a9 ? apps_i2s_ws ? uart2_txd uart3_tx/rx ? ? i2s_ws gpio_a7 ? apps_uart1_cts_n uart1_cts_n ? uart3_tx/rx spi_clk ? ? gpio_a1 ? apps_uart1_rts_n uart1_rts_n ? uart3_tx/rx spi_cs_n ? ? gpio_a0 ? apps_uart1_rxd uart1_rxd ? uart3_tx/rx spi_miso i2c_sda ? gpio_a5 ? apps_uart1_txd uart1_txd ? uart3_tx/rx spi_mosi i2c_scl ? gpio_a4 ? apps_wake ? ? uart3_tx/rx ? ? ? gpio_a10 ? apps_spi_irq ? ? uart3_tx/rx spi_irq ? ? gpio_a11 ? apps_jtag_tms ? ? uart3_tx/rx ? ? i2s_do gpio_a2 jtag_tms apps_jtag_tck ? ? uart3_tx/rx ? ? i2s_di gpio_a3 jtag_tck apps_jtag_tdi ? ? uart3_tx/rx ? ? i2s_clk gpio_a4 jtag_tdi apps_jtag_tdo ? ? uart3_tx/rx ? ? i2s_ws gpio_a5 jtag_tdo
spi flash interface broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 24 ? BCM4390 advance data sheet broadcom confidential spi flash interface the BCM4390 provides a dedicated spi interface that connects to an external serial flash with a maximum clock speed of 24 mhz. use of the spi flash interface is mandatory for self-hosted systems booting an application that runs on the application processor. spi master/slave interface in addition to the spi flash interface the BCM4390 supports a secondary spi interface with a clock frequency of up to 24 mhz to support external spi peripherals. this interface can be configured either as a master or a slave interface. the spi interface has various configuration options including support for active-low or active- high operation for the chip-select, active-low or active-high operation for the interrupt line and bit ordering on the miso/mosi lines to be either big endian or little endian. uart interfaces uart1 and uart2 have standard 4-wire interfaces (rx, tx, rts, and cts) with adjustable baud rates from 9600 bps to 4.0 mbps. uart1 has a 1040-byte receive fifo and a 1040-byte transmit fifo to support high data throughput. uart2 has a smaller fifo that is only 256-bytes. access to the fifos is available to the application processor through the ahb interface and supports either dma or cpu driven data transfer. the BCM4390 uart can perform xon/xoff flow control and includes hardware support for the serial line input protocol (slip). it can also perform wake-on activi ty. for example, activity on the rx or cts inputs can wake the chip from a sleep state. the BCM4390 uarts can operate correctly with other devices as long as the combined baud rate error of the two devices is within 2%. table 5: example of common baud rates desired rate actual rate error (%) 4000000 4000000 0.00 3692000 3692308 0.01 3000000 3000000 0.00 2000000 2000000 0.00 1500000 1500000 0.00 1444444 1454544 0.70 921600 923077 0.16 460800 461538 0.16 230400 230796 0.17 115200 115385 0.16
i 2 s interface broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 25 ? BCM4390 advance data sheet broadcom confidential the uart timing is shown by the combination of figure 6 and table 6 . figure 6: uart timing i 2 s interface the BCM4390 has one i 2 s digital audio port, which supports both master and slave modes. the i 2 s sck and i 2 s ws (clock and word select) become outputs in master mode and inputs in slave mode, while the i2s sdo is always output. 57600 57692 0.16 38400 38400 0.00 28800 28846 0.16 19200 19200 0.00 14400 14423 0.16 9600 9600 0.00 table 6: uart timing specifications ref no. characteristics min. typ. max. unit 1 delay time, uart_cts_n low to uart_txd valid ? ? 1.5 bit periods 2 setup time, uart_cts_n high before midpoint of stop bit ? ? 0.5 bit periods 3 delay time, midpoint of stop bit to uart_rts_n high ? ? 0.5 bit periods table 5: example of common baud rates (cont.) desired rate actual rate error (%) uart_cts_n uart_rxd uart_rts_n 1 2 midpoint of stop bit uart_txd midpoint of stop bit 3
general purpose input and output broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 26 ? BCM4390 advance data sheet broadcom confidential the channel word length is 16 bits and the data is justified so that the msb of the left-channel data is aligned with the msb of the i 2 s, per the i 2 s specification. the msb of each data word is transmitted one-bit clock cycle after the i 2 s ws transition, synchronous with the falling edge of the bit clock. left-channel data is transmitted when i 2 s ws is low: right-channel data is transmitted when i 2 s ws is high. data bits sent by the BCM4390 are synchronized with the falling edge of i2s_sclk and should be sampled by the receiver on the rising edge of i2s_sck. in master mode, the clock rate is: 48 khz x 32 bits per frame = 1.536 mhz. the master clock is generated from the input reference clock using an n/m clock divider. in the slave mode, any clock rate up to 3.072 mhz is supported. general purpose input and output the BCM4390 has 24 general purpose io (gpio) pins that can be configured as input or output. each io can be configured to have internal pull-up or pull-down resistors. at power-on reset all ios are configured as input with no pull. software can configure the ios appropriately. in power-down modes, the ios are configured as high-z with no pull. gpios are grouped into two banks of twelve gpios: ? bank a gpios have alternate functions (see table 4: ?gpio port a alternate functions,? on page 23 ). ? bank b gpios are dedicated gpios, except during test (see table 7 ). table 7: bank b gpio test functions gpio test function gpio_b0 ? gpio_b1 ? gpio_b2 wl_jtag_tck gpio_b3 wl_jtag_tms gpio_b4 wl_jtag_tdi gpio_b5 wl_jtag_tdo gpio_b6 wl_jtag_tdo gpio_b7 ? gpio_b8 ? gpio_b9 ? gpio_b10 ? gpio_b11 ?
i 2 c broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 27 ? BCM4390 advance data sheet broadcom confidential i 2 c tbd
wlan global functions broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 28 ? BCM4390 advance data sheet broadcom confidential section 6: wlan global functions wlan cpu and memory subsystem the BCM4390 wlan section includes an independent integrated arm cortex-r4? 32-bit processor with internal ram and rom. the arm cortex-r4 is a low-power processor that features low gate count, low interrupt latency, and low-cost debug capabilities. it runs all wlan firmware and provides support for the standards-compliant wlan implementation running independent of the applications processor. the cortex-r4 processor is not available to customers for general purpose applications processing. at 0.19 w/mhz, the cortex-r4 is the most power efficient general-purpose microprocessor available, outperforming 8- and 16-bit devices on mips/ w. it supports integrated sleep modes. one-time programmable memory various hardware configuration parameters may be stored in an internal 6 kbit one-time programmable (otp) memory, which is read by wiced bootstrap system software after a device reset. in addition, customer-specific parameters, including the system vendor id and the mac address can be stored, depending on the specific board design. the initial state of all bits in an unprogrammed otp device is 0. after any bit is programmed to a 1, it cannot be reprogrammed to 0. the entire otp array can be programmed in a single write cycle using a utility provided with the broadcom wlan manufacturing test tools. alternatively, multiple write cycles can be used to selectively program specific bytes, but only bits which are still in the 0 state can be altered during each programming cycle. prior to otp programming, all values should be verified using the appropriate editable nvram.txt file, which is provided with the reference board design package. uart interface one 2-wire uart interface can be enabled by software as an alternate function on gpio pins. provided primarily for debugging during wlan development, this uart enables the BCM4390 to operate as rs-232 data termination equipment (dte) for exchanging and managing data with other serial devices. it is compatible with the industry standard 16550 uart, and provides a fifo size of 64 8 in each direction.
jtag interfaces broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 29 ? BCM4390 advance data sheet broadcom confidential jtag interfaces the BCM4390 applications core and wlan core have independent support for the ieee 1149.1 jtag boundary scan standard for performing application firmware debugging and device package and pcb assembly testing during manufacturing. the applications core jtag port provides developers with single-step thread-aware and memory inspection debugging capability using the broadcom wiced development system. the wlan core jtag interface allows broadcom to assist customers by using proprietary debug and characterization test tools during board bring-up. therefore it is highly recommended to provide access to the jtag pins by means of test points or a header on all pcb designs. boot sequence figure 7 shows the boot sequence from power-up to firmware download. figure 7: boot sequence < 950 s after 8 ms the reference clock is assumed to be up. access to pll registers is possible. 8 ms < 4 ms < 104 ms vddio wl_reg_on vddc (from internal pmu) internal por device requests for reference clock chip active interrupt is asserted after the pll locks vbat* *notes: 1. vbat should not rise 10%?90% faster than 40 microseconds. 2. vbat should be up before or at the same time as vddio. vddio should not be present first or be held high before vbat is high .
wireless lan mac and phy broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 30 ? BCM4390 advance data sheet broadcom confidential section 7: wireless lan mac and phy ieee 802.11n mac the BCM4390 wlan mac is designed to support high-throughput operation with low-power consumption. several power saving modes have been implemented that allow the mac to consume very little power while maintaining network-wide timing synchronization. the architecture diagram of the mac is shown in figure 8 . the following sections provide an overview of the important modules in the mac. figure 8: wlan mac architecture embedded cpu interface host registers, dma engines tx-fifo 32 kb wep tkip, aes, wapi txe tx a-mpdu rxe pmq psm shared memory 6 kb psm ucode memory ext- ihr ifs backoff tsf nav ihr bus shm bus mac-phy interface rx-fifo 10 kb rx a-mpdu
ieee 802.11n mac broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 31 ? BCM4390 advance data sheet broadcom confidential the BCM4390 wlan media access controller (mac) supports features specified in the ieee 802.11 base standard, and amended by ieee 802.11n. the key mac features include: ? enhanced mac for supporting ieee 802.11n features ? transmission and reception of aggregated mpdus (a-mpdu) for high throughput (ht) ? support for power management schemes, including wmm power-save, power-save multi-poll (psmp) and multiphase psmp operation ? support for immediate ack and block-ack policies ? interframe space timing support, including rifs ? support for rts/cts and cts-to-self frame sequences for protecting frame exchanges ? back-off counters in hardware for supporting multiple priorities as specified in the wmm specification ? timing synchronization function (tsf), network allocation vector (nav) maintenance, and target beacon transmission time (tbtt) generation in hardware ? hardware offload for aes-ccmp, legacy wpa tkip, legacy wep ciphers, wapi, and support for key management ? programmable independent basic service set (ibss) or infrastructure basic service set functionality ? statistics counters for mib support programmable state machine the programmable state machine (psm) is a microcoded engine, which provides most of the low-level control to the hardware, to implement the ieee 802.11 specification. it is a microcontroller that is highly optimized for flow control operations, which are predominant in implementations of communication protocols. the instruction set and fundamental operations are simple and general, which allows algorithms to be optimized until very late in the design process. it also allows for changes to the algorithms to track evolving ieee 802.11 specifications. the psm fetches instructions from the microcode memory. it uses the shared memory to obtain operands for instructions, as a data store, and to exchange data between both the host and the mac data pipeline (via the shm bus). the psm also uses a scratch-pad memory (similar to a register bank) to store frequently accessed and temporary variables. the psm exercises fine-grained control over the hardware engines, by programming internal hardware registers (ihr). these ihrs are co-located with the ha rdware functions they control, and are accessed by the psm via the ihr bus. the psm fetches instructions from the microcode memory using an address determined by the program counter, instruction literal, or a program stack. for alu operations the operands are obtained from shared memory, scratch pad, ihrs, or instruction literals, and the results are written into the shared memory, scratch pad, or ihrs. there are two basic branch instructions: conditional branches and alu based branches. to better support the many decision points in the ieee 802.11 algorithms, branches can depend on either a readily available signals from the hardware modules (branch condition signals are available to the psm without polling the ihrs), or on the results of alu operations.
ieee 802.11n mac broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 32 ? BCM4390 advance data sheet broadcom confidential wired equivalent privacy the wired equivalent privacy (wep) engine encapsulates all the hardware accelerators to perform the encryption and decryption, and mic computation and verification. the accelerators implement the following cipher algorithms: legacy wep, wpa tkip, and wpa2 aes-ccmp. the psm determines, based on the frame type and association information, the appropriate cipher algorithm to be used. it supplies the keys to the hardware engines from an on-chip key table. the wep interfaces with the txe to encrypt and compute the mic on transmit frames, and the rxe to decrypt and verify the mic on receive frames. transmit engine the transmit engine (txe) constitutes the transmit data path of the mac. it coordinates the dma engines to store the transmit frames in the txfifo. it interfaces with wep module to encrypt frames, and transfers the frames across the mac-phy interface at the appropriate time determined by the channel access mechanisms. the data received from the dma engines are stored in transmit fifos. the mac supports multiple logical queues to support traffic streams that have different qos priority requirements. the psm uses the channel access information from the ifs module to schedule a queue from which the next frame is transmitted. once the frame is scheduled, the txe hardware transmits the frame based on a precise timing trigger received from the ifs module. the txe module also contains the hardware that allows the rapid assembly of mpdus into an a-mpdu for transmission. the hardware module aggregates the encrypted mpdus by adding appropriate headers and pad delimiters as needed. receive engine the receive engine (rxe) constitutes the receive data path of the mac. it interfaces with the dma engine to drain the received frames from the rxfifo. it transfers bytes across the mac-phy interface and interfaces with the wep module to decrypt frames. the decrypted data is stored in the rxfifo. the rxe module contains programmable filters that are programmed by the psm to accept or filter frames based on several criteria such as receiver address, bssid, and certain frame types. the rxe module also contains the hardware required to detect a-mpdus, parse the headers of the containers, and disaggregate them into component mpdus. interframe space the interframe space (ifs) module contains the timers required to determine interframe space timing including rifs timing. it also contains multiple backoff engines required to support prioritized access to the medium as specified by wmm. the interframe spacing timers are triggered by the cessation of channel activity on the medium, as indicated by the phy. these timers provide precise timing to the txe to begin frame transmission. the txe uses this information to send response frames or perform transmit frame-bursting (rifs or sifs separated, as within a txop).
ieee 802.11n phy broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 33 ? BCM4390 advance data sheet broadcom confidential the backoff engines (for each access category) monitor channel activity, in each slot duration, to determine whether to continue or pause the backoff counters. when the backoff counters reach 0, the txe gets notified, so that it may commence frame transmission. in the event of multiple backoff counters decrementing to 0 at the same time, the hardware resolves the co nflict based on policies provided by the psm. the ifs module also incorporates hardware that allows the mac to enter a low-power state when operating under the ieee power save mode. in this mode, the mac is in a suspended state with its clock turned off. a sleep timer, whose count value is initialized by the psm, runs on a slow clock and determines the duration over which the mac remains in this suspended state. once the timer expires the mac is restored to its functional state. the psm updates the tsf timer based on the sleep duration ensuring that the tsf is synchronized to the network. timing synchronization function the timing synchronization function (tsf) module maintains the tsf timer of the mac. it also maintains the target beacon transmission time (tbtt). the tsf timer hardware, under the control of the psm, is capable of adopting timestamps received from beacon and probe response frames in order to maintain synchronization with the network. the tsf module also generates trigger signals for events that are specified as offsets from the tsf timer, such as uplink and downlink transmission times used in psmp. network allocation vector the network allocation vector (nav) timer module is responsible for maintaining the nav information conveyed through the duration field of mac frames. this ensures that the mac complies with the protection mechanisms specified in the standard. the hardware, under the control of the psm, maintains the nav timer and updates the timer appropriately based on received frames. this timing information is provided to the ifs module, which uses it as a virtual carrier-sense indication. mac-phy interface the mac-phy interface consists of a data path interface to exchange rx/tx data from/to the phy. in addition, there is an programming interface, which can be controlled either by the host or the psm to configure and control the phy. ieee 802.11n phy the BCM4390 wlan digital phy is designed to comply with ieee 802.11 b/g/n single-stream specifications to provide wireless lan connectivity supporting data rates from 1 mbps to 72 mbps for low-power, high- performance embedded applications.
ieee 802.11n phy broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 34 ? BCM4390 advance data sheet broadcom confidential the phy has been designed to work in the presence of interference, radio nonlinearity, and various other impairments. it incorporates optimized implementations of the filters, fft and viterbi decoder algorithms. efficient algorithms have been designed to achieve maximum throughput and reliability, including algorithms for carrier sense/rejection, frequency/phase/timing acquisition and tracking, channel estimation and tracking. the phy receiver also contains a robust ieee 802.11b demodulator. the phy carrier sense has been tuned to provide high throughput for ieee 802.11g/11b hybrid networks. the key phy features include: ? programmable data rates in 20 mhz channels, as specified in ieee 802.11n ? supports optional short gi and green field modes in tx and rx ? tx and rx ldpc for improved range and power efficiency ? all scrambling, encoding, forward error correction, and modulation in the transmit direction and inverse operations in the receive direction. ? supports ieee 802.11h/k for worldwide operation ? advanced algorithms for low power, enhanced sensitivity, range, and reliability ? automatic gain control scheme for blocking and non blocking application scenario for cellular applications ? closed loop transmit power control ? digital rf chip calibration algorithms to handle cmos rf chip non-idealities ? on-the-fly channel frequency and transmit power selection ? supports per packet rx antenna diversity ? available per-packet channel quality and signal strength measurements ? designed to meet fcc and other worldwide regulatory requirements figure 9 on page 35 is a block diagram of the wlan phy.
broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 35 ? ieee 802.11n phy BCM4390 advance data sheet broadcom confidential figure 9: wlan phy block diagram filters and radio comp frequency and timing synch carrier sense, agc, and rx fsm radio control block common logic block filters and radio comp afe and radio buffers ofdm demodulate viterbi decoder tx fsm pa comp modulation and coding modulate/spread frame and scramble fft/ifft cck/dsss demodulate descramble and deframe mac interface
wlan radio subsystem broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 36 ? BCM4390 advance data sheet broadcom confidential section 8: wlan radio subsystem the BCM4390 includes an integrated single-band wlan rf transceiver that has been optimized for use in 2.4 ghz wlan systems. it has been designed to prov ide low-power, low-cost, and robust communications for applications operating in the globally available 2.4 gh z unlicensed ism band. the transmit and receive sections include all on-chip filtering, mixing, and gain control functions. a block diagram of the radio subsystem is shown in figure 10 . note that integrated on-chip baluns (not shown) convert the fully differential transmit and receive paths to single-ended signal pins. figure 10: radio functional block diagram receiver path the BCM4390 has a wide dynamic range, direct conversion receiver that employs high order on-chip channel filtering to ensure reliable operation in the noisy 2.4 ghz ism band. the 2.4 ghz receive path has a dedicated on-chip low-noise amplifier (lna). wl logen wl pll wlan bb clb voltage regulators lpo/ext lpo/rcal wl pa wl pad wl pga wl tx g-mixer wl dac wl txlpf wl rx g-mixer wl lna wl g-lna12 xo wl adc wl rxlpf wl grx wl gtx
transmit path broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 37 ? BCM4390 advance data sheet broadcom confidential transmit path baseband data is modulated and upconverted to the 2.4 ghz ism band, respectively. linear on-chip power amplifiers are included, which are capable of delivering high output powers while meeting ieee 802.11 b/g/n specifications without the need for external pas. when using the internal pas, closed-loop output power control is completely integrated. calibration the BCM4390 features dynamic and automatic on-chip calibration to continually compensate for temperature and process variations across components. these calibration routines are performed periodically in the course of normal radio operation. examples of some of th e automatic calibration algorithms are baseband filter calibration for optimum transmit and receive performance, and loft calibration for carrier leakage reduction. in addition, i/q calibration, r calibration, and vco calibration are performed on-chip. no per-board calibration is required in manufacturing test, which helps to minimize the test time and cost in large volume production.
pinout and signal descriptions broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 38 ? BCM4390 advance data sheet broadcom confidential section 9: pinout and signal descriptions ball maps figure 11 shows the wlcsp bump map. figure 11: 286-bump wlcsp (bottom view, bumps facing up)
pin lists broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 39 ? BCM4390 advance data sheet broadcom confidential pin lists table 8 contains the 286-bump wlcsp coordinates. table 8: 286 - bump wlcsp coordinates bump# net_name p a c k a g e b u m p s i d e v i e w (0,0 center of die) p a c k a g e to p s i d e v i e w (0,0 center of die) x y x y 1 sr_pvss_1 2275.005 2003.355 ?2275.005 2003.355 2 sr_pvss_2 1992.162 2003.355 ?1992.162 2003.355 3 wl_reg_on 1709.319 2003.355 ?1709.319 2003.355 4 sr_pvss_4 2133.584 1861.934 ?2133.584 1861.934 5 sr_pvss_5 1850.741 1861.934 ?1850.741 1861.934 6 sr_vlx_6 1567.898 1861.934 ?1567.898 1861.934 7 sr_vlx_7 1992.162 1720.512 ?1992.162 1720.512 8 sr_vlx_8 1709.319 1720.512 ?1709.319 1720.512 9 sr_vlx_9 1850.741 1579.091 ?1850.741 1579.091 10 sr_vlx_10 1567.898 1579.091 ?1567.898 1579.091 11 sr_vddbatp5v_11 2275.005 1437.669 ?2275.005 1437.669 12 sr_vddbatp5v_12 1992.162 1437.669 ?1992.162 1437.669 13 sr_vlx_13 1709.319 1437.669 ?1709.319 1437.669 14 sr_vddbatp5v_14 2133.584 1296.248 ?2133.584 1296.248 15 sr_vddbata5v 1850.741 1296.248 ?1850.741 1296.248 16 ldo_vdd1p5_16 2275.005 1154.826 ?2275.005 1154.826 17 vout_cldo_17 1992.162 1154.826 ?1992.162 1154.826 18 vout_cldo_18 1709.319 1154.826 ?1709.319 1154.826 19 ldo_vdd1p5_19 2133.584 1013.405 ?2133.584 1013.405 20 vout_cldo_20 1850.741 1013.405 ?1850.741 1013.405 21 pmu_avss 1567.898 1013.405 ?1567.898 1013.405 22 vout_3p3_22 2275.005 871.983 ?2275.005 871.983 23 ldo_vdd1p5_23 1992.162 871.983 ?1992.162 871.983 24 vout_lnldo_24 1709.319 871.983 ?1709.319 871.983 25 vout_3p3_25 2133.584 730.562 ?2133.584 730.562 26 ldo_vdd1p5_26 1850.741 730.562 ?1850.741 730.562 27 ldo_vddbat5v_27 2275.005 589.140 ?2275.005 589.140 28 vout_3p3_28 1992.162 589.140 ?1992.162 589.140 29 vout_3p3_sense_29 1709.319 589.140 ?1709.319 589.140 30 ldo_vddbat5v 2133.584 447.719 ?2133.584 447.719
pin lists broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 40 ? BCM4390 advance data sheet broadcom confidential 31 vssc_31 1850.741 447.719 ?1850.741 447.719 32 apps_reg_on_32 1567.898 447.719 ?1567.898 447.719 33 nc_33 2275.005 306.297 ?2275.005 306.297 34 ldo_vddbat5v_34 1992.162 306.297 ?1992.162 306.297 35 vssc_35 1709.319 306.297 ?1709.319 306.297 36 ldo_vddbat5v_36 2133.584 164.876 ?2133.584 164.876 37 pmu_vddio_37 1850.741 164.876 ?1850.741 164.876 38 pmu_vddio_38 1567.898 164.876 ?1567.898 164.876 39 lpo_in 2000.397 ?45.054 ?2000.397 ?45.054 40 nc_40 2252.010 ?55.251 ?2252.010 ?55.251 41 nc_41 2264.169 ?255.429 ?2264.169 ?255.429 42 apps_i2s_do 1548.201 ?773.253 ?1548.201 ?773.253 43 apps_i2s_di 1931.412 ?980.847 ?1931.412 ?980.847 44 apps_i2s_clk 1659.396 ?597.546 ?1659.396 ?597.546 45 apps_i2s_ws 1944.471 ?623.367 ?1944.471 ?623.367 46 apps_sflash_clk 2063.397 ?268.848 ?2063.397 ?268.848 47 apps_sflash_cs_n 1800.498 ?434.448 ?1800.498 ?434.448 48 apps_sflash_miso 1794.801 ?223.146 ?1794.801 ?223.146 49 apps_sflash_mosi 1784.397 ?839.853 ?1784.397 ?839.853 50 apps_uart_1_cts_n 2136.414 ?959.733 ?2136.414 ?959.733 51 apps_uart1_rts_n 1653.744 ?991.854 ?1653.744 ?991.854 52 apps_uart1_rxd 1583.904 ?1213.488 ?1583.904 ?1213.488 53 apps_uart1_txd 1393.104 ?1114.101 ?1393.104 ?1114.101 54 apps_jtag_en 632.001 ?1226.646 ?632.001 ?1226.646 55 nc_55 859.998 ?1166.652 ?859.998 ?1166.652 56 nc_56 2156.196 ?1334.853 ?2156.196 ?1334.853 57 apps_wake 1652.097 ?1650.546 ?1652.097 ?1650.546 58 apps_spi_irq 1925.202 ?1363.752 ?1925.202 ?1363.752 59 apps_jtag_tms 859.998 ?966.654 ?859.998 ?966.654 60 apps_jtag_tck 1688.097 ?1449.099 ?1688.097 ?1449.099 61 apps_jtag_tdi 470.001 ?1031.652 ?470.001 ?1031.652 62 apps_jtag_tdo 1139.997 ?1226.646 ?1139.997 ?1226.646 63 apps_vddo_63 1358.481 ?704.151 ?1358.481 ?704.151 64 apps_vddo_64 1489.998 ?211.653 ?1489.998 ?211.653 65 apps_vddo_65 1475.499 ?464.652 ?1475.499 ?464.652 table 8: 286 - bump wlcsp coordinates (cont.) bump# net_name p a c k a g e b u m p s i d e v i e w (0,0 center of die) p a c k a g e to p s i d e v i e w (0,0 center of die) x y x y
pin lists broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 41 ? BCM4390 advance data sheet broadcom confidential 66 nc_66 1265.574 ?519.930 ?1265.574 ?519.930 67 apps_vddc_67 933.699 ?1354.050 ?933.699 ?1354.050 68 apps_vddc_68 1482.501 ?1453.950 ?1482.501 ?1453.950 69 apps_vddc_69 294.996 ?1131.651 ?294.996 ?1131.651 70 apps_vddc_70 294.996 ?1331.649 ?294.996 ?1331.649 71 apps_vddc_71 294.996 ?931.653 ?294.996 ?931.653 72 apps_vddc_72 864.903 ?482.949 ?864.903 ?482.949 73 apps_vddc_73 1067.997 ?482.949 ?1067.997 ?482.949 74 apps_vddc_74 1139.997 ?1026.648 ?1139.997 ?1026.648 75 nc_75 1479.864 ?2546.550 ?1479.864 ?2546.550 76 vssc_76 1569.797 ?1888.101 ?1569.797 ?1888.101 77 vssc_77 1597.593 ?2333.169 ?1597.593 ?2333.169 78 nc_78 1756.686 ?2533.167 ?1756.686 ?2533.167 79 apps_avdd_79 1769.795 ?1888.101 ?1769.795 ?1888.101 80 apps_avdd_80 1797.591 ?2333.169 ?1797.591 ?2333.169 81 vssc_81 2045.451 ?1548.549 ?2045.451 ?1548.549 82 apps_avdd_82 2045.451 ?1760.319 ?2045.451 ?1760.319 83 vssc_83 2080.781 ?2546.550 ?2080.781 ?2546.550 84 apps_avdd_84 2118.860 ?1960.317 ?2118.860 ?1960.317 85 nc_85 2245.449 ?1760.319 ?2245.449 ?1760.319 86 nc_86 2245.449 ?1548.549 ?2245.449 ?1548.549 87 apps_avdd_87 2261.469 ?2444.675 ?2261.469 ?2444.675 88 vssc_88 2274.852 ?2086.889 ?2274.852 ?2086.889 89 apps_avss_89 99.975 ?1842.066 ?99.975 ?1842.066 90 apps_1p2_avdd_90 99.975 ?2042.064 ?99.975 ?2042.064 91 nc_91 99.975 ?2291.099 ?99.975 ?2291.099 92 vout_lndo_sense 281.861 ?2422.625 ?281.861 ?2422.625 93 apps_ac_gnd 461.505 ?2525.544 ?461.505 ?2525.544 94 apps_ldo_vss 661.503 ?2491.097 ?661.503 ?2491.097 95 apps_avss_95 873.183 ?2116.746 ?873.183 ?2116.746 96 apps_1p2_avdd_96 1005.281 ?2501.330 ?1005.281 ?2501.330 97 apps_avss_97 1174.454 ?1842.066 ?1174.454 ?1842.066 98 apps_1p2_avdd_98 1174.454 ?2042.064 ?1174.454 ?2042.064 99 apps_1p2_avdd_99 1208.352 ?2500.155 ?1208.352 ?2500.155 100 apps_avss_100 1352.595 ?2240.766 ?1352.595 ?2240.766 table 8: 286 - bump wlcsp coordinates (cont.) bump# net_name p a c k a g e b u m p s i d e v i e w (0,0 center of die) p a c k a g e to p s i d e v i e w (0,0 center of die) x y x y
pin lists broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 42 ? BCM4390 advance data sheet broadcom confidential 101 wrf_lna_gnd1p2_101 ?2275.490 ?2150.537 2275.490 ?2150.537 102 rf_ac_gnd ?2251.986 ?2411.789 2251.986 ?2411.789 103 wrf_rx_gnd1p2_103 ?2119.686 ?1753.146 2119.686 ?1753.146 104 wrf_logen_gnd1p2 ?1902.494 ?1572.417 1902.494 ?1572.417 105 wrf_pa_vbat_gnd3p3_105 ?1800.006 ?2098.656 1800.006 ?2098.656 106 rf_dc_gnd_106 ?1800.006 ?2561.652 1800.006 ?2561.652 107 wrf_pa_vbat_gnd3p3_107 ?1600.008 ?2570.652 1600.008 ?2570.652 108 wrf_padrv_vbat_gnd3p3_108 ?1400.010 ?1671.660 1400.010 ?1671.660 109 wrf_pa_vbat_gnd3p3_109 ?1400.010 ?2098.656 1400.010 ?2098.656 110 wrf_pa_vbat_gnd3p3_110 ?1400.010 ?2552.652 1400.010 ?2552.652 111 wrf_pa_vbat_gnd3p3_111 ?1125.249 ?1987.776 1125.249 ?1987.776 112 wrf_padrv_vbat_vdd3p3 ?1089.249 ?1666.260 1089.249 ?1666.260 113 wrf_pa_vbat_vdd3p3_113 ?1000.014 ?2552.652 1000.014 ?2552.652 114 wrf_pa_vbat_vdd3p3_114 ?800.016 ?2570.652 800.016 ?2570.652 115 wrf_rfout ?600.018 ?2552.652 600.018 ?2552.652 116 wrf_pa_vbat_gnd3p3_116 ?542.225 ?2017.656 542.225 ?2017.656 117 wrf_rx_gnd1p2_117 ?302.510 ?1761.939 302.510 ?1761.939 118 wrf_rfin ?200.022 ?2471.652 200.022 ?2471.652 119 wrf_lna_gnd1p2_119 ?200.022 ?2071.656 200.022 ?2071.656 120 wrf_rx_gnd1p2_120 ?165.822 ?1590.174 165.822 ?1590.174 121 nc_121 ?200.022 ?943.668 200.022 ?943.668 122 wrf_gpio_out ?279.173 ?759.168 279.173 ?759.168 123 wrf_logeng_gnd1p2 ?338.919 ?1125.594 338.919 ?1125.594 124 wrf_afe_gnd1p2 ?661.308 ?1125.594 661.308 ?1125.594 125 wrf_tx_gnd1p2 ?856.014 ?1271.664 856.014 ?1271.664 126 wrf_vco_gnd1p2 ?1032.414 ?471.672 1032.414 ?471.672 127 wrf_buck_vdd1p5_127 ?1066.853 ?1047.744 1066.853 ?1047.744 128 wrf_buck_vdd1p5_128 ?1066.853 ?847.746 1066.853 ?847.746 129 wrf_buck_gnd1p5 ?1166.852 ?647.748 1166.852 ?647.748 130 wrf_buck_vdd1p5_130 ?1266.851 ?1047.744 1266.851 ?1047.744 131 wrf_buck_vdd1p5_131 ?1266.851 ?847.746 1266.851 ?847.746 132 wrf_synth_vbat_vdd3p3 ?1503.344 ?1089.662 1503.344 ?1089.662 133 wrf_mmd_gnd1p2 ?1627.031 ?889.668 1627.031 ?889.668 134 wrf_mmd_vdd1p2 ?1854.006 ?1271.664 1854.006 ?1271.664 135 wrf_cp_gnd1p2 ?1922.892 ?980.154 1922.892 ?980.154 table 8: 286 - bump wlcsp coordinates (cont.) bump# net_name p a c k a g e b u m p s i d e v i e w (0,0 center of die) p a c k a g e to p s i d e v i e w (0,0 center of die) x y x y
pin lists broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 43 ? BCM4390 advance data sheet broadcom confidential 136 wrf_xtal_vdd1p5 ?1950.522 ?353.066 1950.522 ?353.066 137 wrf_xtal_gnd1p2 ?2000.004 ?554.598 2000.004 ?554.598 138 wrf_xtal_in ?2199.998 ?353.066 2199.998 ?353.066 139 wrf_pfd_vdd1p2 ?2200.002 ?1185.062 2200.002 ?1185.062 140 wrf_pfd_gnd1p2 ?2200.002 ?985.064 2200.002 ?985.064 141 wrf_xtal_vdd1p2 ?2200.002 ?753.062 2200.002 ?753.062 142 wrf_xtal_out ?2200.002 ?553.064 2200.002 ?553.064 143 bbpllavdd1p2 ?2205.429 ?52.326 2205.429 ?52.326 144 bbpllavss ?2005.431 ?57.348 2005.431 ?57.348 145 rf_sw_ctrl_0 ?1831.200 318.141 1831.200 318.141 146 rf_sw_ctrl_1 ?2072.022 449.946 2072.022 449.946 147 rf_sw_ctrl_2 ?1691.052 517.221 1691.052 517.221 148 rf_sw_ctrl_3 ?1895.118 544.410 1895.118 544.410 149 rf_sw_ctrl_4 ?1809.960 772.110 1809.960 772.110 150 rf_sw_ctrl_5 ?1617.639 713.790 1617.639 713.790 151 rf_sw_ctrl_6 ?2129.154 817.452 2129.154 817.452 152 rf_sw_ctrl_7 ?1573.278 922.392 1573.278 922.392 153 rf_sw_ctrl_8 ?1749.264 1019.259 1749.264 1019.259 154 rf_sw_ctrl_9 ?1944.888 972.936 1944.888 972.936 155 otp_vdd33 ?1400.001 808.353 1400.001 808.353 156 vddio_rf_156 ?1399.398 343.350 1399.398 343.350 157 vddio_rf_157 ?1400.001 543.348 1400.001 543.348 158 nc_158 ?2055.795 2207.556 2055.795 2207.556 159 nc_159 ?1943.295 2041.056 1943.295 2041.056 160 nc_160 ?1689.455 2041.056 1689.455 2041.056 161 vssc_161 ?2280.795 2207.556 2280.795 2207.556 162 nc_162 ?2168.295 2041.056 2168.295 2041.056 163 vssc_163 ?1830.795 2207.556 1830.795 2207.556 164 nc_164 ?1576.959 2207.556 1576.959 2207.556 165 nc_165 ?2168.295 2374.758 2168.295 2374.758 166 nc_166 ?1943.295 2374.758 1943.295 2374.758 167 nc_167 ?1689.455 2374.758 1689.455 2374.758 168 vssc_168 ?2280.795 2541.258 2280.795 2541.258 169 nc_169 ?1830.795 2541.258 1830.795 2541.258 170 nc_170 ?2055.795 2541.258 2055.795 2541.258 table 8: 286 - bump wlcsp coordinates (cont.) bump# net_name p a c k a g e b u m p s i d e v i e w (0,0 center of die) p a c k a g e to p s i d e v i e w (0,0 center of die) x y x y
pin lists broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 44 ? BCM4390 advance data sheet broadcom confidential 171 sdio_clk ?1269.996 1963.350 1269.996 1963.350 172 sdio_cmd ?1269.996 2168.352 1269.996 2168.352 173 sdio_data_0 ?1040.001 1963.350 1040.001 1963.350 174 sdio_data_1 ?1040.001 2168.352 1040.001 2168.352 175 sdio_data_2 ?830.004 1963.350 830.004 1963.350 176 sdio_data_3 ?735.000 2168.352 735.000 2168.352 177 vddio_sd_177 ?1040.001 1763.352 1040.001 1763.352 178 vddio_sd_178 ?830.004 1763.352 830.004 1763.352 179 nc_179 ?545.001 1963.350 545.001 1963.350 180 nc_180 ?240.000 1963.350 240.000 1963.350 181 nc_181 ?805.002 1568.349 805.002 1568.349 182 vssc_182 ?605.004 1553.346 605.004 1553.346 183 vssc_183 ?394.998 1763.352 394.998 1763.352 184 vssc_184 ?605.004 1763.352 605.004 1763.352 185 vssc_185 ?394.998 1553.346 394.998 1553.346 186 nc_186 ?15.000 2168.352 15.000 2168.352 187 nc_187 4.998 1768.347 ?4.998 1768.347 188 nc_188 ?5.001 1968.354 5.001 1968.354 189 gpio_b0 239.997 1968.354 ?239.997 1968.354 190 gpio_b1 239.997 1768.347 ?239.997 1768.347 191 gpio_b2 290.001 2168.352 ?290.001 2168.352 192 gpio_b3 284.997 1568.349 ?284.997 1568.349 193 gpio_b4 675.003 1908.351 ?675.003 1908.351 194 gpio_b5 485.004 1568.349 ?485.004 1568.349 195 gpio_b6 675.003 1708.353 ?675.003 1708.353 196 sdio_sel 689.997 1508.346 ?689.997 1508.346 197 sdio_padvddio 920.001 1568.349 ?920.001 1568.349 198 gpio_b9 820.002 1348.353 ?820.002 1348.353 199 gpio_b10 820.002 1073.349 ?820.002 1073.349 200 gpio_b7 1119.999 1073.349 ?1119.999 1073.349 201 gpio_b8 1119.999 1338.354 ?1119.999 1338.354 202 debug_en 1180.002 1738.350 ?1180.002 1738.350 203 gpio_b11 1180.002 1538.352 ?1180.002 1538.352 204 nc_204 1180.002 1973.349 ?1180.002 1973.349 205 jtag_sel 1119.999 2168.352 ?1119.999 2168.352 table 8: 286 - bump wlcsp coordinates (cont.) bump# net_name p a c k a g e b u m p s i d e v i e w (0,0 center of die) p a c k a g e to p s i d e v i e w (0,0 center of die) x y x y
pin lists broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 45 ? BCM4390 advance data sheet broadcom confidential 206 vssc_206 699.996 668.349 ?699.996 668.349 207 vssc_207 699.996 468.351 ?699.996 468.351 208 vssc_208 900.003 468.351 ?900.003 468.351 209 vssc_209 900.003 668.349 ?900.003 668.349 210 vddio_210 605.001 1148.346 ?605.001 1148.346 211 vddio_211 384.996 1368.351 ?384.996 1368.351 212 vddio_212 605.001 948.348 ?605.001 948.348 213 vddc_213 ?2120.001 1213.353 2120.001 1213.353 214 vddc_214 ?1920.003 1213.353 1920.003 1213.353 215 vddc_215 ?1689.999 ?71.649 1689.999 ?71.649 216 vddc_216 ?1490.001 ?71.649 1490.001 ?71.649 217 vddc_217 ?1490.001 128.349 1490.001 128.349 218 vddc_218 ?1249.998 128.349 1249.998 128.349 219 vddc_219 ?840.003 578.349 840.003 578.349 220 vddc_220 ?639.996 578.349 639.996 578.349 221 vddc_221 ?269.997 628.353 269.997 628.353 222 vddc_222 ?269.997 828.351 269.997 828.351 223 vddc_223 ?195.000 1568.349 195.000 1568.349 224 vddc_224 ?195.000 1768.347 195.000 1768.347 225 vddc_225 ?195.000 1268.352 195.000 1268.352 226 vddc_226 4.998 ?6.651 ?4.998 ?6.651 227 vddc_227 4.998 193.347 ?4.998 193.347 228 vddc_228 4.998 393.354 ?4.998 393.354 229 vddc_229 4.998 628.353 ?4.998 628.353 230 vddc_230 4.998 828.351 ?4.998 828.351 231 vddc_231 4.998 1028.349 ?4.998 1028.349 232 vddc_232 4.998 1568.349 ?4.998 1568.349 233 vddc_233 4.998 1268.352 ?4.998 1268.352 234 vddc_234 120.000 ?216.648 ?120.000 ?216.648 235 vddc_235 319.998 ?216.648 ?319.998 ?216.648 236 vddc_236 405.003 1148.346 ?405.003 1148.346 237 vddc_237 405.003 948.348 ?405.003 948.348 238 vddc_238 689.997 ?211.653 ?689.997 ?211.653 239 vddc_239 890.004 ?211.653 ?890.004 ?211.653 240 vddc_240 1090.002 ?11.646 ?1090.002 ?11.646 table 8: 286 - bump wlcsp coordinates (cont.) bump# net_name p a c k a g e b u m p s i d e v i e w (0,0 center of die) p a c k a g e to p s i d e v i e w (0,0 center of die) x y x y
pin lists broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 46 ? BCM4390 advance data sheet broadcom confidential 241 vddc_241 1396.119 ?24.588 ?1396.119 ?24.588 242 vssc_242 ?1374.999 1263.348 1374.999 1263.348 243 vssc_243 ?1269.996 1563.354 1269.996 1563.354 244 vssc_244 ?1175.001 1263.348 1175.001 1263.348 245 vssc_245 ?1269.996 1763.352 1269.996 1763.352 246 vssc_246 ?1249.998 ?71.649 1249.998 ?71.649 247 vssc_247 ?975.003 1263.348 975.003 1263.348 248 vssc_248 ?1050.000 ?71.649 1050.000 ?71.649 249 vssc_249 ?1040.001 1563.354 1040.001 1563.354 250 vssc_250 ?840.003 ?71.649 840.003 ?71.649 251 vssc_251 ?840.003 128.349 840.003 128.349 252 vssc_252 ?840.003 328.347 840.003 328.347 253 vssc_253 ?840.003 828.351 840.003 828.351 254 vssc_254 ?840.003 1028.349 840.003 1028.349 255 vssc_255 ?805.002 1368.351 805.002 1368.351 256 vssc_256 ?639.996 828.351 639.996 828.351 257 vssc_257 ?639.996 1028.349 639.996 1028.349 258 vssc_258 ?439.998 128.349 439.998 128.349 259 vssc_259 ?439.998 328.734 439.998 328.734 260 vssc_260 ?439.998 ?71.649 439.998 ?71.649 261 vssc_261 94.998 ?606.654 ?94.998 ?606.654 262 vssc_262 94.998 ?806.652 ?94.998 ?806.652 263 vssc_263 204.996 193.347 ?204.996 193.347 264 vssc_264 204.996 1028.349 ?204.996 1028.349 265 vssc_265 204.996 628.353 ?204.996 628.353 266 vssc_266 204.996 828.351 ?204.996 828.351 267 vssc_267 133.104 ?1457.550 ?133.104 ?1457.550 268 vssc_268 305.004 ?446.652 ?305.004 ?446.652 269 vssc_269 204.996 393.354 ?204.996 393.354 270 vssc_270 499.998 193.347 ?499.998 193.347 271 vssc_271 457.401 ?1457.550 ?457.401 ?1457.550 272 vssc_272 499.998 ?806.652 ?499.998 ?806.652 273 vssc_273 505.002 ?446.652 ?505.002 ?446.652 274 vssc_274 499.998 468.351 ?499.998 468.351 275 vssc_275 499.998 668.349 ?499.998 668.349 table 8: 286 - bump wlcsp coordinates (cont.) bump# net_name p a c k a g e b u m p s i d e v i e w (0,0 center of die) p a c k a g e to p s i d e v i e w (0,0 center of die) x y x y
signal descriptions broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 47 ? BCM4390 advance data sheet broadcom confidential signal descriptions the signal name, type, and description of each pin in the BCM4390 are listed in table 9 . the symbol listed in the type column indicates the pin direction (i/o = bidirectional, i = input, o = output) and the internal pull-up/ pull-down characteristics, if any (pu = weak internal pull- up resistor and pd = weak internal pull-down resistor). 276 vssc_276 499.998 ?6.651 ?499.998 ?6.651 277 vssc_277 699.996 ?806.652 ?699.996 ?806.652 278 vssc_278 699.996 ?606.654 ?699.996 ?606.654 279 vssc_279 699.996 ?6.651 ?699.996 ?6.651 280 vssc_280 660.603 ?1457.550 ?660.603 ?1457.550 281 vssc_281 900.003 68.346 ?900.003 68.346 282 vssc_282 1090.002 ?211.653 ?1090.002 ?211.653 283 vssc_283 1100.001 668.349 ?1100.001 668.349 284 vssc_284 1229.997 508.347 ?1229.997 508.347 285 vssc_285 1229.997 308.349 ?1229.997 308.349 286 vssc_286 1290.000 ?211.653 ?1290.000 ?211.653 table 9: wlcsp and fcfbga pin descriptions signal name wlcsp bump # type description apps_1p2_avdd 90, 96, 98, 99 pwr power supply. apps_ac_gnd 93 gnd connect to ground to reduce system rf noise. apps_avdd 79, 80, 82, 84, 87 pwr apps cpu domain power supply. connect to 1.2v apps_avss 89, 95, 97, 100 gnd ground. connect to vssc for esd mitigation. apps_wake 57 i/o application cpu subsystem. device wakes from sleep signal. apps_i2s_clk 44 i/o i 2 s clock. can be master (output) or slave (input) apps_i2s_di 43 i/o i 2 s data input. apps_i2s_do 42 i/o i 2 s data output. apps_i2s_ws 45 i/o i 2 s word select (ws). apps_jtag_en 54 i/o application cpu subsystem: jtag enable. table 8: 286 - bump wlcsp coordinates (cont.) bump# net_name p a c k a g e b u m p s i d e v i e w (0,0 center of die) p a c k a g e to p s i d e v i e w (0,0 center of die) x y x y
signal descriptions broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 48 ? BCM4390 advance data sheet broadcom confidential apps_jtag_tck 60 i/o application cpu subsystem: jtag interface. apps_jtag_tdi 61 i/o apps_jtag_tdo 62 i/o apps_jtag_tms 59 i/o apps_ldo_vss 94 gnd connect to vssc for esd. apps_reg_on 32 i used by the pmu to power up or power down the on-chip regulators that supply power to the application cpu subsystem. also, when deasserted, the application cpu will be held in reset. apps_sflash_clk 46 i/o spi serial flash interface spi clock output. apps_sflash_cs_n 47 i/o external serial flash interface chip-select (functionality cannot be remapped to another purpose). apps_spi_irq 58 i/o spi interface interrupt input. apps_sflash_miso 48 i serial flash spi miso input. apps_sflash_mosi 49 o serial flash spi mosi output. apps_uart1_cts_n 50 i uart1 clear-to-send. active-low, clear-to- send signal for the hci uart interface. apps_uart1_rts_n 51 o uart1 request-to-send. active-low request- to-send signal for the uart1 interface. apps_uart1_rxd 52 i uart1 serial input. serial data input for the uart1 interface. apps_uart1_txd 53 o uart1 serial output. serial data output for the uart1 interface. apps_vddc 67, 68, 69, 70, 71, 72, 73, 74 pwr 1.2v core supply for apps cpu. apps_vddo 63, 64, 65 pwr connect to 3.3v. bbpllavdd 143 pwr connect to 1.2v bbpllavss 144 gnd connect to vssc for esd. table 9: wlcsp and fcfbga pin descriptions (cont.) signal name wlcsp bump # type description
signal descriptions broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 49 ? BCM4390 advance data sheet broadcom confidential gpio_b0 189 i/o programmable bank b gpio pins. gpio_b1 190 gpio_b2 191 gpio_b3 192 gpio_b4 193 gpio_b5 194 gpio_b6 195 gpio_b7 200 gpio_b8 201 gpio_b9 198 gpio_b10 199 gpio_b10 230 debug_en 202 ? externally drives the 4390 jtag enable pins high/low under software control for debug security purposes. jtag_sel 205 i/o wlan jtag enable. this pin must be connected to ground if the jtag interface is not used. ldo_vdd1p5 16, 19, 23, 26 i lnldo input. ldo_vddbat5v 27, 30, 34, 36 i ldo vbat. lpo_in 39 i external sleep clock input (32.768 khz). nc 40, 41, 55, 56, 66, 75, 85, 86, 91, 121, 158, 160, 162, 164?166, 169, 170, 179?181, 186?188, 202, 204 ? no connect. otp_vdd33 155 pwr otp 3.3v supply. pmu_avss 21 gnd quiet ground. connect to vssc for esd. pmu_vddio 37, 38 pwr 1.8v?3.3v supply for pmu controls. must be directly connected to vddio on the pcb. rf_ac_gnd 102 gnd connect to ground to reduce system rf noise. rf_dc_gnd 106 gnd connect to ground to reduce system rf noise. table 9: wlcsp and fcfbga pin descriptions (cont.) signal name wlcsp bump # type description
signal descriptions broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 50 ? BCM4390 advance data sheet broadcom confidential rf_sw_ctrl_0 145 o programmable rf switch control lines. the control lines are programmable via the driver and nvram file. rf_sw_ctrl_1 146 rf_sw_ctrl_2 147 rf_sw_ctrl_3 148 rf_sw_ctrl_4 149 rf_sw_ctrl_5 150 rf_sw_ctrl_6 151 rf_sw_ctrl_7 152 rf_sw_ctrl_8 153 rf_sw_ctrl_9 154 sdio_clk 171 i sdio clock input. sdio_cmd 172 i/o sdio command line. sdio_data_0 173 i/o sdio data line 0. sdio_data_1 174 i/o sdio data line 1. sdio_data_2 175 i/o sdio data line 2. sdio_data_3 176 i/o sdio data line 3. sdio_padvddio 197 i/o connect to the same vdd supply rail as sdio interface. sdio_sel 196 i/o connect to ground. sr_pvss 1, 2, 4, 5 gnd power ground. sr_vddbata5v 15 i quiet vbat. sr_vddbatp5v 11, 12, 14 i power vbat. sr_vlx 6, 7, 8, 9, 10, 13 o cbuck switching regulator output. refer to table 19 on page 64 for recommendations of the inductor and capacitor for this supply. vddc 213?241 pwr 1.2v core supply for wlan. vddio 210?212 pwr 1.8v?3.3v supply for wlan. must be directly connected to pmu_vddio and apps_vddo on the pcb. vddio_rf 156, 157 pwr io supply for rf switch control pads (3.3v). vddio_sd 177, 178 pwr 1.8v?3.3v supply for sdio pads. vout_3p3 22, 25, 28 o ldo 3.3v output. vout_3p3_sense 29 o voltage sense pin for ldo 3.3v output. vout_cldo 17, 18, 20 o output of core ldo. vout_lnldo 24 o output of lnldo. vssc 31, 35, 76, 77, 78, 81, 83, 88, 159, 161, 163, 167, 168, 182?185 206 ?209, 242?286 gnd core ground. table 9: wlcsp and fcfbga pin descriptions (cont.) signal name wlcsp bump # type description
signal descriptions broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 51 ? BCM4390 advance data sheet broadcom confidential wl_reg_on 3 i used by the pmu to power up/power down the on-chip regulators that supply power to the wlan subsystem. this pin may be internally driven by the apps core even if the pin is externally connected to gnd. wl_vddc ? pwr 1.2v core supply for wlan. wrf_afe_gnd1p2 124 gnd afe ground. connect to vssc for esd. wrf_buck_gnd1p5 129 gnd internal capacitor-less ldo ground. connect to vssc for esd. wrf_buck_vdd1p5 127, 128, 130, 131 pwr internal capacitor-less ldo supply. wrf_cp_gnd1p2 135 gnd ground. connect to vssc for esd. wrf_gpio_out 122 i/o gpio wrf_lna_gnd1p2 101, 119 gnd internal lna ground. wrf_logen_gnd1p2 104 gnd logen ground. connect to vssc for esd. wrf_logeng_gnd1p2 123 gnd logen ground. connect to vssc for esd. wrf_mmd_gnd1p2 133 gnd ground. connect to vssc for esd wrf_mmd_vdd1p2 134 pwr 1.2v supply wrf_pa_vbat_gnd3p3 105, 107, 109, 110, 111,116 gnd connect to vssc for esd wrf_pa_vbat_vdd3p3 113, 114 pwr pa 3.3v vbat supply wrf_padrv_vbat_gnd3p3 108 gnd pad ground. connect to vssc for esd. wrf_padrv_vbat_vdd3p3 112 pwr pa driver vbat supply. wrf_pfd_gnd1p2 140 gnd ground. connect to vssc for esd. wrf_pfd_vdd1p2 139 pwr 1.2v supply. wrf_rfin 118 i 2.4 ghz wlan receiver input. wrf_rfout 115 o 2.4 ghz wlan pa output. wrf_rx_gnd1p2 103, 117, 120 gnd rx 2 ghz ground. connect to vssc for esd. wrf_synth_vbat_vdd3p3 132 pwr synth vdd 3.3v supply. wrf_tx_gnd1p2 125 gnd tx ground. connect to vssc for esd. wrf_vco_gnd1p2 126 gnd vco/logen ground. connect to vssc for esd. wrf_xtal_gnd1p2 137 gnd xtal ground. connect to vssc for esd. wrf_xtal_in 138 i crystal oscillator input. wrf_xtal_out 142 o crystal oscillator output. wrf_xtal_vdd1p2 141 i crystal ldo input (1.35v). wrf_xtal_vdd1p5 136 o crystal ldo output (1.2v). table 9: wlcsp and fcfbga pin descriptions (cont.) signal name wlcsp bump # type description
broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 52 ? i/o states BCM4390 advance data sheet broadcom confidential i/o states the following notations are used in table 10 : ? i: input signal ? o: output signal ? i/o: input/output signal ? pu = pulled up ? pd = pulled down ? nopull = neither pulled up nor pulled down table 10: i/o states name i/o keeper a active mode low power state/sleep (all power present) power-down b (apps_reg_on and wl_reg_on held low) out-of-reset; before sw download (apps_rst_n high; wl_reg_on high) (wl_reg_on high and apps_rst_n=0) and vddios are present power rail apps_wake i/o y input/output; pu, pd, nopull (programmable) input; pu, pd, nopull (programmable) high-z, nopull input, pd input, pd apps_vddo apps_reg_on i n input; pd (pull down can be disabled) input; pd (pull down can be disabled) input; pd (of 200k) input; pd (of 200k) input; pd (of 200k) ? apps_uart1_cts_n i y input; nopull input; nopull high-z, nopull input; pu input; pu apps_vddo apps_uart1_rts_n o y output; nopull output; nopull high-z, nopull input; pu input; pu apps_vddo apps_uart1_rxd i y input; pu input; nopull high-z, nopull input; pu input; pu apps_vddo apps_uart1_txd o y output; nopull output; nopull high-z, nopull input; pu input; pu apps_vddo sdio_cmd i/o n input/output; pu (sdio mode), input; pu (sdio mode) high-z, nopull input; pu (sdio mode) input; pu (sdio mode) wl_vddio sdio_data[0:3] i/o n input/output; pu (sdio mode) input; pu (sdio mode) high-z, nopull input; pu (sdio mode) input; pu (sdio mode) wl_vddio sdio_clk i n input; nopull input; nopull high-z, nopull input; nopull input; nopull wl_vddio gpio_b0 i/o y input/output; pu, pd, nopull (programmable [default: pd]) input/output; pu, pd, nopull (programmable [default: pd]) high-z, nopull input; pd input; pd wl_vddio
broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 53 ? i/o states BCM4390 advance data sheet broadcom confidential gpio_b1 i/o y input/output; pu, pd, nopull (programmable [default: nopull]) input/output; pu, pd, nopull (programmable [default: nopull]) high-z, nopull input; nopull input; nopull wl_vddio gpio_b10 i/o y input/output; pu, pd, nopull (programmable [default: nopull]) input/output; pu, pd, nopull (programmable [default: nopull]) high-z, nopull input; nopull input; nopull wl_vddio gpio_b11 i/o y input/output; pu, pd, nopull (programmable [default: pd]) input/output; pu, pd, nopull (programmable [default: pd]) high-z, nopull input; pd input; pd wl_vddio gpio_b2 i/o y input/output; pu, pd, nopull (programmable [default: nopull]) input/output; pu, pd, nopull (programmable [default: nopull]) high-z, nopull input; nopull input; nopull wl_vddio gpio_b3 i/o y input/output; pu, pd, nopull (programmable [default: pd]) input/output; pu, pd, nopull (programmable [default: pd]) high-z, nopull input; pd input; pd wl_vddio gpio_b4 i/o y input/output; pu, pd, nopull (programmable [default: nopull]) input/output; pu, pd, nopull (programmable [default: nopull]) high-z, nopull input; nopull input; nopull wl_vddio gpio_b5 i/o y input/output; pu, pd, nopull (programmable [default: pd]) input/output; pu, pd, nopull (programmable [default: pd]) high-z, nopull input; pd input; pd wl_vddio gpio_b6 i/o y input/output; pu, pd, nopull (programmable [default: nopull]) input/output; pu, pd, nopull (programmable [default: nopull]) high-z, nopull input; nopull input; nopull wl_vddio gpio_b7 i/o y input/output; pu, pd, nopull (programmable [default: nopull]) input/output; pu, pd, nopull (programmable [default: nopull]) high-z, nopull input; nopull input; nopull wl_vddio gpio_b8 i/o y input/output; pu, pd, nopull (programmable [default: pd]) input/output; pu, pd, nopull (programmable [default: pd]) high-z, nopull input; pd input; pd wl_vddio gpio_b9 i/o y input/output; pu, pd, nopull (programmable [default: pd]) input/output; pu, pd, nopull (programmable [default: pd]) high-z, nopull input; pd input; pd wl_vddio table 10: i/o states (cont.) name i/o keeper a active mode low power state/sleep (all power present) power-down b (apps_reg_on and wl_reg_on held low) out-of-reset; before sw download (apps_rst_n high; wl_reg_on high) (wl_reg_on high and apps_rst_n=0) and vddios are present power rail
broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 54 ? i/o states BCM4390 advance data sheet broadcom confidential wl_reg_on i n input; pd (pull-down can be disabled) input; pd (pull-down can be disabled) input; pd (of 200k) input; pd (of 200k) input; pd (of 200k) ? a. keeper column: n = pad has no keeper. y = pad has a keeper. keeper is always active except in power-down state. if there is n o keeper, and it is an input and there is nopull, then the pad should be driven to prevent leakage due to floating pad (sdio_clk, for example). b. in the power-down state (xx_reg_on=0): high-z; nopull => the pad is disabled because power is not supplied. table 10: i/o states (cont.) name i/o keeper a active mode low power state/sleep (all power present) power-down b (apps_reg_on and wl_reg_on held low) out-of-reset; before sw download (apps_rst_n high; wl_reg_on high) (wl_reg_on high and apps_rst_n=0) and vddios are present power rail
dc characteristics broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 55 ? BCM4390 advance data sheet broadcom confidential section 10: dc characteristics absolute maximum ratings note: values in this data sheet are design goals and are subject to change based on the results of device characterization. caution! the absolute maximum ratings in table 11 indicate levels where permanent damage to the device can occur, even if these limits are exceeded for only a brief duration. functional operation is not guaranteed under these conditions. operation at absolute maximum conditions for extended periods can adversely affect long-term reliability of the device. table 11: absolute maximum ratings rating symbol value unit dc supply for vbat and pa driver supply vbat ?0.5 to +6.0 v dc supply voltage for digital i/o vddio ?0.5 to 3.9 v dc supply voltage for rf switch i/os vddio_rf ?0.5 to 3.9 v dc input supply voltage for cldo and lnldo ? ?0.5 to 1.575 v dc supply voltage for rf analog vddrf ?0.5 to 1.32 v dc supply voltage for core vddc ?0.5 to 1.32 v wrf_tcxo_vdd ? ?0.5 to 3.63 v maximum undershoot voltage for i/o v undershoot ?0.5 v maximum junction temperature t j 125 c
environmental ratings broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 56 ? BCM4390 advance data sheet broadcom confidential environmental ratings the environmental ratings are shown in table 12 . electrostatic discharge specifications extreme caution must be exercised to prevent electrostatic discharge (esd) damage. proper use of wrist and heel grounding straps to discharge static electricity is required when handling these devices. always store unused material in its antistatic packaging. recommended operating conditions and dc characteristics table 12: environmental ratings characteristic value units conditions/comments ambient temperature (t a )?30 to +85c functional operation a a. functionality is guaranteed but specifications require derating at extreme temperatures; see the specification tables for details. storage temperature ?40 to +125 c ? relative humidity less than 60 % storage less than 85 % operation table 13: esd specifications pin type symbol condition esd rating unit esd, handling reference: nqy00083, section 3.4, group d9, table b esd_hand_hbm human body model contact discharge per jedec eid/jesd22-a114 tbd v machine model (mm) esd_hand_mm machine model contact tbd v cdm esd_hand_cdm charged device model contact discharge per jedec eia/jesd22-c101 tbd v caution! functional operation is not guaranteed outside of the limits shown in table 14 on page 57 and operation outside these limits for extended periods can adversely affect long-term reliability of the device.
recommended operating conditions and dc characteristics broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 57 ? BCM4390 advance data sheet broadcom confidential table 14: recommended operating conditions and dc characteristics parameter symbol value unit minimum typical maximum dc supply voltage for vbat vbat 3.0 a a. the BCM4390 is functional across this range of voltages. optimal rf performance specified in the data sheet, however, is guaranteed only for 3.13v < vbat < 4.8v. ? 5.25 b b. the maximum continuous voltage is 5.25v. voltages up to 6.0v for up to 10 seconds, cumulative duration over the lifetime of the device are allowed. voltages as high as 5.5v for up to 250 seconds, cumulative duration over the lifetime of the device are allowed. v dc supply voltage for core vdd 1.14 1.2 1.26 v dc supply voltage for rf blocks in chip vddrf 1.14 1.2 1.26 v dc supply voltage for tcxo input buffer wrf_tcxo_vdd 1.62 1.8 1.98 v dc supply voltage for digital i/o vddio, vddio_sd 1.71 ? 3.63 v dc supply voltage for rf switch i/os vddio_rf 3.13 3.3 3.46 v internal por threshold vth_por 0.4 ? 0.7 v other digital i/o pins for vddio = 1.8v: input high voltage vih 0.65 vddio ? ?v input low voltage vil ? ? 0.35 vddio v output high voltage @ 2 ma voh vddio ? 0.45 ? ?v output low voltage @ 2 ma vol ? ?0.45 v for vddio = 3.3v: input high voltage vih 2.00 ? ?v input low voltage vil ? ?0.80 v output high voltage @ 2 ma voh vddio ? 0.4 ? ?v output low voltage @ 2 ma vol ? ?0.40 v rf switch control output pins c c. programmable 2 ma to 16 ma drive strength. default is 10 ma. for vddio_rf = 3.3v: output high voltage @ 2 ma voh vddio ? 0.4 ? ?v output low voltage @ 2 ma vol ? ?0.40 v input capacitance c in ? ? 5 pf
wlan rf specifications broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 58 ? BCM4390 advance data sheet broadcom confidential section 11: wlan rf specifications introduction the BCM4390 includes an integrated single-band direct conversion radio that supports the 2.4 ghz band. this section describes the rf characteristics of the 2.4 ghz radio. unless otherwise stated, limit values apply for the conditions specified in table 12: ?environmental ratings,? on page 56 and table 14: ?recommended operating conditions and dc characteristics,? on page 57 . typical values apply for the following conditions: ? vbat = 3.6v ? ambient temperature +25c figure 12: port locations note: values in this section of the data sheet are desi gn goals and are subject to change based on the results of device characterization. note: all wlan specifications are specified at the chip port, unless otherwise specified. filter BCM4390 rf switch (0.5 db insertion loss) antenna port rf port wlan tx wlan chip port
2.4 ghz band general rf specifications broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 59 ? BCM4390 advance data sheet broadcom confidential 2.4 ghz band general rf specifications wlan 2.4 ghz receiver performance specifications table 15: 2.4 ghz band general rf specifications item condition minimum typical maximum unit tx/rx switch time including tx ramp down ? ? 5 s rx/tx switch time including tx ramp up ? ? 2 s power-up and power-down ramp time dsss/cck modulations ? ? < 2 s note: the specifications in table 16 are specified at the chip port, unless otherwise specified. table 16: wlan 2.4 ghz receiver performance specifications parameter condition/notes minimum typical maximum unit frequency range ? 2400 ? 2500 mhz rx sensitivity ieee 802.11b (8% per for 1024 octet psdu) a 1 mbps dsss ? ?98.4 ? dbm 2 mbps dsss ? ?96.5 ? dbm 5.5 mbps dsss ? ?93.7 ? dbm 11 mbps dsss ? ?91.4 ? dbm rx sensitivity ieee 802.11g (10% per for 1024 octet psdu) a 6 mbps ofdm ? ?95.5 ? dbm 9 mbps ofdm ? ?94.1 ? dbm 12 mbps ofdm ? ?93.2 ? dbm 18 mbps ofdm ? ?90.6 ? dbm 24 mbps ofdm ? ?87.3 ? dbm 36 mbps ofdm ? ?84 ? dbm 48 mbps ofdm ? ?79.3 ? dbm 54 mbps ofdm ? ?77.8 ? dbm
wlan 2.4 ghz receiver performance specifications broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 60 ? BCM4390 advance data sheet broadcom confidential rx sensitivity ieee 802.11n (10% per for 4096 octet psdu) a,b. defined for default parameters: gf, 800 ns gi, and non-stbc. 20 mhz channel spacing for all mcs rates mcs0 ? ?95 ? dbm mcs1 ? ?92.7 ? dbm mcs2 ? ?90.2 ? dbm mcs3 ? ?87.1 ? dbm mcs4 ? ?83.5 ? dbm mcs5 ? ?78.9 ? dbm mcs6 ? ?77.3 ? dbm mcs7 ? ?75.7 ? dbm blocking level for 1db rx sensitivity degradation (without external filtering) c 776?794 mhz cdma2000 ? ?24 ? dbm 824?849 mhz d cdmaone ? ?25 ? dbm 824?849 mhz gsm850 ? ?15 ? dbm 880?915 mhz e-gsm ? ?16 ? dbm 1710?1785 mhz gsm1800 ? ?18 ? dbm 1850?1910 mhz gsm1800 ? ?19 ? dbm 1850?1910 mhz cdmaone ? ?26 ? dbm 1850?1910 mhz wcdma ? ?26 ? dbm 1920?1980 mhz wcdma ? ?28.5 ? dbm 2500?2570 mhz band 7 ? ?45 ? dbm 2300?2400 mhz band 40 ? ?50 ? dbm 2570?2620 mhz band 38 ? ?45 ? dbm 2545?2575 mhz xgp band ? ?45 ? dbm in-band static cw jammer immunity (fc ? 8 mhz < fcw < + 8 mhz) rx per < 1%, 54 mbps ofdm, 1000 octet psdu for: (rxsens + 23 db < rxlevel < max input level) ?80 ? ? dbm input in-band ip3 a maximum lna gain ? ?15.5 ? dbm minimum lna gain ? ?1.5 ? dbm maximum receive level @ 2.4 ghz @ 1, 2 mbps (8% per, 1024 octets) ?3.5 ? ? dbm @ 5.5, 11 mbps (8% per, 1024 octets) ?9.5 ? ? dbm @ 6?54 mbps (10% per, 1024 octets) ?9.5 ? ? dbm @ mcs0?7 rates (10% per, 4095 octets) ?9.5 ? ? dbm lpf 3 db bandwidth ? 9 ? 12 mhz table 16: wlan 2.4 ghz receiver performance specifications (cont.) parameter condition/notes minimum typical maximum unit
wlan 2.4 ghz receiver performance specifications broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 61 ? BCM4390 advance data sheet broadcom confidential adjacent channel rejection- dsss (difference between interfering and desired signal at 8% per for 1024 octet psdu with desired signal level as specified in condition/notes) desired and interfering signal 30 mhz apart 1 mbps dsss ?74 dbm 35 ? ? db 2 mbps dsss ?74 dbm 35 ? ? db desired and interfering signal 25 mhz apart 5.5 mbps dsss ?70 dbm 35 ? ? db 11 mbps dsss ?70 dbm 35 ? ? db adjacent channel rejection- ofdm (difference between interfering and desired signal (25 mhz apart) at 10% per for 1024 octet psdu with desired signal level as specified in condition/notes) 6 mbps ofdm ?79 dbm 16 ? ? db 9 mbps ofdm ?78 dbm 15 ? ? db 12 mbps ofdm ?76 dbm 13 ? ? db 18 mbps ofdm ?74 dbm 11 ? ? db 24 mbps ofdm ?71 dbm 8 ? ? db 36 mbps ofdm ?67 dbm 4 ? ? db 48 mbps ofdm ?63 dbm 0 ? ? db 54 mbps ofdm ?62 dbm ?1 ? ? db adjacent channel rejection mcs0? 7 (difference between interfering and desired signal (25 mhz apart) at 10% per for 4096 octet psdu with desired signal level as specified in condition/notes) mcs0 ?79 dbm 16 ? ? db mcs1 ?76 dbm 13 ? ? db mcs2 ?74 dbm 11 ? ? db mcs3 ?71 dbm 8 ? ? db mcs4 ?67 dbm 4 ? ? db mcs5 ?63 dbm 0 ? ? db mcs6 ?62 dbm ?1 ? ? db mcs7 ?61 dbm ?2 ? ? db maximum receiver gain ? ? ? 95 ? db gain control step ? ? ? 3 ? db rssi accuracy e range ?98 dbm to ?30 dbm ?5 ? 5 db range above ?30 dbm ?8 ? 8 db return loss z o = 50 ? , across the dynamic range 10 11.5 13 db receiver cascaded noise figure at maximum gain ? 4 ? db a. derate by 1.5 db for ?30c to ?10c and 55c to 85c. b. sensitivity degradations for alternate settings in mcs modes. mm: 0.5 db drop, and sgi: 2 db drop. c. the cellular standard listed for each band indicates the type of modulation used to generate the interfering signal in that band for the purpose of this test. it is not intended to indicate any specific usage of each band in any specific country. d. the blocking levels are valid for channels 1 to 11. (for higher channels, the performance may be lower due to third harmonic signals (3 824 mhz) falling within band.) e. the minimum and maximum values shown have a 95% confidence level. table 16: wlan 2.4 ghz receiver performance specifications (cont.) parameter condition/notes minimum typical maximum unit
wlan 2.4 ghz transmitter performance specifications broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 62 ? BCM4390 advance data sheet broadcom confidential wlan 2.4 ghz transmitter performance specifications note: the specifications in table 17 are specified at the chip port output, unless otherwise specified. table 17: wlan 2.4 ghz transmitter performance specifications parameter condition/notes minimum typical maximum unit frequency range ? 2400 ? 2500 mhz harmonic level (at 18 dbm with 100% duty cycle) 4.8?5.0 ghz 2nd harmonic ? ?8 ? dbm/1 mhz 7.2?7.5 ghz 3rd harmonic ? ?18 ? dbm/1 mhz evm does not exceed tx power at rf port for highest power level setting at 25c and vbat = 3.6v with spectral mask and evm compliance a, b a. derate by 1.5 db for temperatures less than ?10c or more than 55c, or voltages less than 3.0v. derate by 3.0 db for voltages of less than 2.7v, or voltages of less than 3.0v at temperatures less than ?10c or greater than 55c. derate by 4.5 db for ?40c to ?30c. b. tx power for channel 1 and channel 11 is specified by non-volatile memory parameters. 802.11b (dsss/cck) ?9 db 19 20.5 ? dbm ofdm, bpsk ?8 db 19 20 ? dbm ofdm, qpsk ?13 db 19 20 ? dbm ofdm, 16-qam ?19 db 17.5 19 ? dbm ofdm, 64-qam (r = 3/4) ?25 db 16.5 18 ? dbm ofdm, 64-qam (r = 5/6) ?28 db 15.5 17 ? dbm phase noise 37.4 mhz crystal, integrated from 10 khz to 10 mhz ?0.45?degrees tx power control dynamic range ?10??db closed-loop tx power variation at highest power level setting across full temperature and voltage range. applies across 10 dbm to 20 dbm output power range. ??1.5db carrier suppression ? 15 ? ? dbc gain control step ? ? 0.25 ? db return loss at chip port tx z o = 50 ? ?6?db
general spurious emissions specifications broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 63 ? BCM4390 advance data sheet broadcom confidential general spurious emissions specifications table 18: general spurious emissions specifications parameter condition/notes min typ max unit frequency range ? 2400 ? 2500 mhz general spurious emissions tx emissions 30 mhz < f < 1 ghz rbw = 100 khz ? ?93 ? dbm 1 ghz < f < 12.75 ghz rbw = 1 mhz ? ?45.5 ? dbm 1.8 ghz < f < 1.9 ghz rbw = 1 mhz ? ?72 ? dbm 5.15 ghz < f < 5.3 ghz rbw = 1 mhz ? ?87 ? dbm rx/standby emissions 30 mhz < f < 1 ghz rbw = 100 khz ? ?107 ? dbm 1 ghz < f < 12.75 ghz rbw = 1 mhz ? ?65 a a. for frequencies other than 3.2 ghz, the emissions value is ?96 dbm. the value presented in table is the result of lo leakage at 3.2 ghz. ?dbm 1.8 ghz < f < 1.9 ghz rbw = 1 mhz ? ?87 ? dbm 5.15 ghz < f < 5.3 ghz rbw = 1 mhz ? ?100 ? dbm
internal regulator electrical specifications broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 64 ? BCM4390 advance data sheet broadcom confidential section 12: internal regulator electrical specifications functional operation is not guaranteed outside of the specification limits provided in this section. core buck switching regulator note: values in this data sheet are design goals and are subject to change based on the results of device characterization. table 19: core buck switching regulator (cbuck) specifications specification notes min typ max units input supply voltage (dc) dc voltage ra nge inclusive of disturbances. 3.0 3.6 5.25 a v pwm mode switching frequency ccm, load > 100 ma vbat = 3.6v 2.8 4 5.2 mhz pwm output current ? ? ? 600 ma output current limit ? ? 1400 ma output voltage range programmable, 30 mv steps default = 1.35v 1.2 1.35 1.5 v pwm output voltage dc accuracy includes load and line regulation. forced pwm mode ?4 ? 4 % pwm ripple voltage, static measure with 20 mhz bandwidth limit. static load. max ripple based on vbat=3.6v, vout=1.35v, fsw = 4 mhz, 2.2 h inductor l > 1.05 h, cap + board total-esr < 20 m ? , c out > 1.9 f, esl<200ph ?720mvpp pwm mode peak efficiency peak efficiency at 200 ma load 78 86 ? % pfm mode efficiency 10 ma load current 70 81 ? % start-up time from power down vio already on and steady. time from reg_on rising edge to cldo reaching 1.2v ??850 s external inductor 0806 size, 30%, 0.11 25% ohms ? 2.2 ? h external output capacitor ceramic, x5r, 0402, esr <30 m ? at 4 mhz, 20%, 6.3v 2.0 b 4.7 10 c f external input capacitor for sr_vddbatp5v pin, ceramic, x5r, 0603, esr < 30 m ? at 4 mhz, 20%, 6.3v, 4.7 f 0.67 b 4.7 ? f
3.3v ldo (ldo3p3) broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 65 ? BCM4390 advance data sheet broadcom confidential 3.3v ldo (ldo3p3) input supply voltage ramp-up time 0 to 4.3v 40 ? ? s a. the maximum continuous voltage is 5.25v. voltages up to 6.0v for up to 10 seconds, cumulative duration, over the lifetime of the device are allowed. voltages as high as 5.5v for up to 250 seconds, cumulative duration, over the lifetime of the device are allowed. b. minimum capacitor value refers to the residual capacitor value after taking into account the part-to-part tolerance, dc-bias, temperature, and aging. c. total capacitance includes those connected at the far end of the active load. table 20: ldo3p3 specifications specification notes min typ max units input supply voltage, v in min = v o + 0.2v = 3.5v dropout voltage requirement must be met under maximum load for performance specifications. 3.0 3.6 5.25 a a. the maximum continuous voltage is 5.25v. voltages up to 6.0v for up to 10 seconds, cumulative duration, over the lifetime of the device are allowed. voltages as high as 5.5v for up to 250 seconds, cumulative duration, over the lifetime of the device are allowed. v output current ? 0.001 ? 450 ma nominal output voltage, v o default = 3.3v ? 3.3 ? v dropout voltage at max load. ? ? 200 mv output voltage dc accuracy includes line/load regulation. ?5 ? +5 % quiescent current no load ? ? 100 a line regulation v in from (v o + 0.2v) to 4.8v, max load ? ? 3.5 mv/v load regulation load from 1 ma to 450 ma ? ? 0.3 mv/ma psrr v in v o + 0.2v, v o = 3.3v, c o = 4.7 f, max load, 100hz to 100khz 20??db ldo turn-on time chip already powered up. ? 160 250 s external output capacitor, c o ceramic, x5r, 0402, (esr: 5 m ? ?240 m ? ), 10%, 10v 1.0 b b. minimum capacitor value refers to the residual capacitor value after taking into account the part-to-part tolerance, dc-bias, temperature, and aging. 4.7 10 f external input capacitor for sr_vddbata5v pin (shared with bandgap) ceramic, x5r, 0402, (esr: 30m?200 m ? ), 10%, 10v. not needed if sharing vbat capacitor 4.7 f with sr_vddbatp5v. ?4.7? f table 19: core buck switching regulator (cbuck) specifications (cont.) specification notes min typ max units
cldo broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 66 ? BCM4390 advance data sheet broadcom confidential cldo table 21: cldo specifications specification notes min typ max units input supply voltage, v in min = 1.2 + 0.15v = 1.35v dropout voltage requirement must be met under maximum load. 1.3 1.35 1.5 v output current ? 0.2 ? 300 ma output voltage, v o programmable in 25 mv steps. default = 1.2.v 1.1 1.2 1.275 v dropout voltage at max load ? ? 150 mv output voltage dc accuracy includes line/load regulation ?4 ? +4 % quiescent current no load ? 24 ? a 300 ma load ? 2.1 ? ma line regulation v in from (v o + 0.15v) to 1.5v, maximum load ? ? 5 mv/v load regulation load from 1 ma to 300 ma ? 0.02 0.05 mv/ma leakage current power down ? ? 20 a bypass mode ? 1 3 a psrr @1 khz, v in 1.35v, c o = 4.7 f20?db start-up time of pmu vio up and steady. time from the reg_on rising edge to the cldo reaching 1.2v. ??700 s ldo turn-on time ldo turn-on time when rest of the chip is up ? 140 180 s external output capacitor, c o to tal esr: 5 m ? ?240 m ? 1.32 a a. minimum capacitor value refers to the residual capacitor value after taking into account the part-to- part tolerance, dc-bias, temperature, and aging. 4.7 ? f external input capacitor only use an external input capacitor at the vdd_ldo pin if it is not supplied from cbuck output. ?12.2 f
lnldo broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 67 ? BCM4390 advance data sheet broadcom confidential lnldo table 22: lnldo specifications specification notes min typ max units input supply voltage, v in min = 1.2v o + 0.15v = 1.35v dropout voltage requirement must be met under maximum load. 1.3 1.35 1.5 v output current ? 0.1 ? 150 ma output voltage, v o programmable in 25 mv steps. default = 1.2v 1.1 1.2 1.275 v dropout voltage at maximum load ? ? 150 mv output voltage dc accuracy includes line/load regulation ?4 ? +4 % quiescent current no load ? 44 ? a max load ? 970 990 a line regulation v in from (v o + 0.1v) to 1.5v, max load ? ? 5 mv/v load regulation load from 1 ma to 150 ma ? 0.02 0.05 mv/ma leakage current power-down ? ? 10 a output noise @30 khz, 60?150 ma load c o = 2.2 f @100 khz, 60?150 ma load c o = 2.2 f ? ? 60 35 nv/rt hz nv/rt hz psrr @ 1khz, input > 1.35v, c o = 2.2 f, v o = 1.2v 20 ? ? db ldo turn-on time ldo turn-on time when rest of chip is up ? 140 180 s external output capacitor, c o total esr (trace/capacitor): 5 m ? ?240 m ? 0.5 a a. minimum capacitor value refers to the residual capacitor value after taking into account the part-to- part tolerance, dc-bias, temperature, and aging. 2.2 4.7 f external input capacitor only use an external input capacitor at the vdd_ldo pin if it is not supplied from cbuck output. total esr (trace/capacitor): 30 m ? ?200 m ? ? 1 2.2 f
system power consumption broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 68 ? BCM4390 advance data sheet broadcom confidential section 13: system power consumption wlan current consumption the wlan current consumption measurements are shown in table 24 . note: values in this data sheet are design goals and are subject to change based on the results of device characterization. note: unless otherwise stated, these values apply for the conditions specified in table 14: ?recommended operating conditions and dc characteristics,? on page 57 . table 23: application processor current consumption mode bandwidth (mhz) band (ghz) vbat = 3.6v, vddio = 1.8v, t(a) = 25c notes vbat, ma vio, a sleep modes tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd tbd table 24: typical wlan power consumption a mode bandwidth (mhz) band (ghz) vbat = 3.6v, vddio = 1.8v, t(a) = 25c notes vbat, ma vio, a sleep modes off 0.005 3 note b sleep 0.1 200 note c ieee power save, dtim 1 1.2 60 note d ieee power save, dtim 3 0.4 60 note d
jtag timing broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 69 ? BCM4390 advance data sheet broadcom confidential jtag timing active modes transmit, cck 20 2.4 88 60 notes e, f transmit, mcs7 20 2.4 111 60 notes e, f transmit, cck (@20 dbm) 20 2.4 342 60 notes f, g transmit, mcs7 (@18.5 dbm) 20 2.4 295 60 notes f, g receive 20 2.4 61 60 notes f, h, i crs 20 2.4 56 60 note j a. vio is specified with all pins idle (not switching) and not driving any loads. b. wl_reg_on and apps_reg_on are low. c. idle, not associated or inter-beacon. d. beacon interval is 102.4 ms and beacon duration is 1 ms @ 1 mbps. average current is over three dtim intervals. e. duty cycle is 100%. f. measured using packet engine test mode. g. duty cycle is 100%. it includes internal pa contribution. h. duty cycle is 100%. carrier sense (cs) detect/packet receive. i. mcs7 and ht20. j. carrier sense (cca) when no carrier is present. table 25: jtag timing characteristics signal name period output maximum output minimum setup hold tck 125 ns ? ? ? ? tdi ? ? ? 20 ns 0 ns tms ? ? ? 20 ns 0 ns tdo ? 100 ns 0 ns ? ? jtag_trst 250 ns ? ? ? ? table 24: typical wlan power consumption a (cont.) mode bandwidth (mhz) band (ghz) vbat = 3.6v, vddio = 1.8v, t(a) = 25c notes vbat, ma vio, a
power-up sequence and timing broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 70 ? BCM4390 advance data sheet broadcom confidential section 14: power-up sequence and timing sequencing of reset and regulator control signals the BCM4390 has two signals that allow the host to control power consumption by enabling or disabling the apps cpu, wlan, and internal regulator blocks. these signals are described below. additionally, diagrams are provided to indicate proper sequencing of the signals for various operational states (see figure 13 and figure 14 on page 71 , and figure 15 and figure 16 on page 72 ). the timing values indicated are minimum required values; longer delays are also acceptable. description of control signals ? wl_reg_on : used by the pmu to power up the wlan section. it is also or-gated with the apps_reg_on input to control the internal BCM4390 regulators. when this pin is high, the regulators are enabled and the wlan section is out of reset. when this pin is low the wlan section is in reset. if both the apps_reg_on and wl_reg_on pins are low, the regulators are disabled. ? apps_reg_on : used by the pmu (or-gated with wl_reg_on) to power up the internal BCM4390 regulators. if both the apps_reg_on and wl_reg_on pins are low, the regulators are disabled. when this pin is low and wl_reg_on is high, the apps cpu section is in reset. note: for both the wl_reg_on and apps_reg_on pins, there should be at least a 10 ms time delay between consecutive toggles (where both signals have been driven low). this is to allow time for the cbuck regulator to discharge. if this delay is not followed, then there may be a vddio in-rush current on the order of 36 ma during the next pmu cold start. note: the BCM4390 has an internal power-on reset (por) circuit. the device will be held in reset for a maximum of 110 ms after vddc and vddio have both passed the por threshold. note: vbat should not rise 10%?90% faster than 40 microseconds. vbat should be up before or at the same time as vddio. vddio should not be present first or be held high before vbat is high.
sequencing of reset and regulator control signals broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 71 ? BCM4390 advance data sheet broadcom confidential control signal timing diagrams figure 13: wlan = on, apps cpu = on figure 14: wlan = off, apps cpu = off 32.678 khz sleep clock vbat* vddio wl_reg_on apps_reg_on 90% of vh ~ 2 sleep cycles *notes: 1. vbat should not rise 10%?90% faster than 40 microseconds. 2. vbat should be up before or at the same time as vddio. vddio should not be present first or be held high before vbat is high. vbat* vddio wl_reg_on apps_reg_on 32.678 khz sleep clock *notes: 1. vbat should not rise 10%?90% faster than 40 microseconds. 2. vbat should be up before or at the same time as vddio. vddio should not be present first or be held high before vbat is high .
sequencing of reset and regulator control signals broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 72 ? BCM4390 advance data sheet broadcom confidential figure 15: wlan = on, apps cpu = off figure 16: wlan = off, apps cpu= on vbat* vddio wl_reg_on apps_reg_on 90% of vh ~ 2 sleep cycles 32.678 khz sleep clock *notes: 1. vbat should not rise 10%?90% faster than 40 microseconds. 2. vbat should be up before or at the same time as vddio. vddio should not be present first or be held high before vbat is high . vbat* vddio wl _reg_on apps_reg_on 90% of vh ~ 2 sleep cycles 32.678 khz sleep clock *notes: 1. vbat should not rise 10%?90% faster than 40 microseconds. 2. vbat should be up before or at the same time as vddio. vddio should not be present first or be held high before vbat is high .
package information broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 73 ? BCM4390 advance data sheet broadcom confidential section 15: package information package thermal characteristics junction temperature estimation and psi jt versus theta jc package thermal characterization parameter psi?j t ( jt ) yields a better estimation of actual junction temperature (t j ) versus using the junction-to-case thermal resistance parameter theta?j c ( jc ). the reason for this is that jc assumes that all the power is dissipated through the top surface of the package case. in actual applications, some of the power is dissipated through the bottom and sides of the package. jt takes into account power dissipated through the top, bottom, and sides of the package. the equation for calculating the device junction temperature is: t j = t t + p x jt where: ?t j = junction temperature at steady-state condition (c) ?t t = package case top center temperature at steady-state condition (c) ? p = device power dissipation (watts) ? jt = package thermal characteristics; no airflow (c/w) environmental characteristics for environmental characteristics data, see table 12: ?environmental ratings,? on page 56 . table 26: package thermal characteristics a a. no heat sink, ta = 70c. this is an estimate, based on a 4-layer pcb that conforms to eia/jesd51?7 (101.6 mm 101.6 mm 1.6 mm) and p = 1.119w continuous dissipation. characteristic wlcsp ja (c/w) (value in still air) 33.45 jb (c/w) 3.45 jc (c/w) 1.00 jt (c/w) 3.45 jb (c/w) 10.64 maximum junction temperature t j (c) 125 maximum power dissipation (w) 1.119
mechanical information broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 74 ? BCM4390 advance data sheet broadcom confidential section 16: mechanical information figure 17: 286-bump wlcsp package bump map
mechanical information broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 75 ? BCM4390 advance data sheet broadcom confidential figure 18: wlcsp keep-out areas for pcb layout?bottom view, bumps facing up note: top-layer metal is not allowed in the keep-out areas.
ordering information broadcom wiced wi-fi ieee 802.11 soc w/embedded app processor february 5, 2014 ? 4390-ds103-r page 76 ? BCM4390 advance data sheet broadcom confidential section 17: ordering information part number package description ambient operating temperature BCM4390dkwbg 286-bump wlcsp (4.87 mm 5.413 mm, 0.2 mm pitch) single-band 2.4 ghz wlan ?30c to +85c
? phone: 949-926-5000 fax: 949-926-5203 e-mail: info@broadcom.com web: www.broadcom.com broadcom corporation 5300 california avenue irvine, ca 92617 ? 2014 by broadcom corporation. all rights reserved. 4390-ds103-r february 5, 2014 broadcom? corporation reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. information furnished by broadcom corporation is believed to be accurate and reliable. however, broadcom corporation does not assume any liability arising out of the application or use of this information, nor the application or use of any prod uct or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. BCM4390 advance data sheet

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