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_______________________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. max2851 5ghz, 5-channel mimo receiver 19-5121; rev 1; 3/10 typical operating circuit appears at end of data sheet. ordering information general description the max2851 is a single-chip, 5-channel rf receiver ic designed for 5ghz wireless hdmi? applications. the ic includes all circuitry required to implement the com - plete 5-channel mimo rf receiver function and crystal oscillator, providing a fully integrated receive path, vco, frequency synthesis, and baseband/control interface. it includes a fast-settling sigma-delta rf fractional synthe - sizer with 76hz frequency programming step size. the ic also integrates on-chip i/q amplitude and phase-error calibration circuits. the receiver includes both an in- channel rssi and also an rf rssi. on-chip monolithic filters are included for receiver i/q baseband signal channel selection, for supporting both 20mhz and 40mhz rf channels. the baseband filter - ing and rx signal paths are optimized to meet stringent whdi requirements. the downconverter local oscillator is coherent among all the receiver channels. the reverse-link control channel uses an on-chip 5ghz ofdm transmitter. it shares the rf synthesizer and lo generation circuit with the mimo receivers. dynamic on/off control of the external pa is implemented with programmable precision voltage. an analog mux routes external pa power-detect voltage to the rssi pin. the mimo receiver chip is housed in a small 68-pin tqfn leadless plastic package with exposed paddle. applications 5ghz wireless hdmi (whdi?) 5ghz fdd backhaul and wimax? 5ghz mimo receiver up to five spatial streams 5ghz beam steering receiver features s 5ghz, 5x mimo downlink receivers, single-uplink ieee 802.11a transmitter s 4900mhz to 5900mhz frequency range s coherent lo among receivers s 4.5db rx noise figure s 70db rx gain control range with 2db step size, digitally controlled s 60db dynamic range receiver rssi s rf wideband receiver rssi s programmable 20mhz/40mhz rx i/q lowpass channel filters s -5dbm transmit power (54mbps ofdm) s 31db tx gain control range with 0.5db step size, digitally controlled s tx/rx i/q error and lo leakage detection and adjustment s programmable 20mhz/40mhz tx i/q lowpass anti-aliasing filter s analog mux for pa power detect s pa on/off control s sigma-delta fractional-n pll with 76hz resolution s monolithic low-noise vco with -35dbc integrated phase noise s 4-wire spi k digital interface s i/q analog baseband interface s digital tx/rx mode control s on-chip digital temperature sensor readout s complete baseband interface s digital tx/rx mode control s +2.7v to +3.6v supply voltage s small 68-pin tqfn package (10mm x 10mm) hdmi is a trademark of hdmi licensing, llc. whdi is a trademark of whdi special interest group. wimax is a trademark of the wimax forum. spi is a trademark of motorola, inc. + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed paddle. evaluation kit available part temp range pin-package MAX2851ITK+ -25n c to +85nc 68 tqfn-ep*
2 ______________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc_ pins to gnd ................................................ -0.3v to +3.9v rf inputs max current: rxrf1+, rxrf1-, rxrf2+, rxrf2-, rxrf3+, rxrf3-, rxrf4+, rxrf4-, rxrf5+, rxrf5- to gnd ................................. -1ma to +1ma rf outputs: txrf+, txrf- to gnd ..................... -0.3v to +3.9v analog inputs: txbbi+, txbbi-, txbbq+, txbbq-, pa_det, xtal, xtal_cap to gnd .................................. -0.3v to +3.9v analog outputs: rxbbi1+, rxbbi1-, rxbbq1+, rxbbq1-, rxbbi2+, rxbbi2-, rxbbq2+, rxbbq2-, rxbbi3+, rxbbi3-, rxbbq3+, rxbbq3-, rxbbi4+, rxbbi4-, rxbbq4+, rxbbq4-, rxbbi5+, rxbbi5-, rxbbq5+, rxbbq5-, rssi, clkout2, byp_vco, cpout+, cpout-, pa_bias to gnd ................................................................... -0.3v to +3.9v digital inputs: enable, cs , sclk, din to gnd ........................................................ -0.3v to +3.9v digital outputs: dout, clkout to gnd ............ -0.3v to +3.9v short-circuit duration analog outputs ................................................................. 10s digital outputs ................................................................... 10s rf input power .............................................................. +10dbm rf output differential load vswr ........................................ 6:1 continuous power dissipation (t a = +85 nc) 68-pin tqfn (derate 29.4mw/ n c above +70 n c) ....... 2352mw operating temperature range .......................... -25n c to +85nc junction temperature ..................................................... +150nc storage temperature range ............................ -65n c to +160nc lead temperature (soldering, 10s) ................................ +300nc soldering temperature (reflow) ...................................... +260nc dc electrical characteristics (operating conditions unless otherwise specified: v cc = 2.7v to 3.6v, t a = -25 n c to +85n c, enable set according to operating mode, cs = high, sclk = din = low, transmitter in maximum gain. power matching and termination for the differential rf output pins using the typical operating circuit ; 100mv rms differential i and q signals applied to i and q baseband inputs of transmitters in transmit mode. typical values measured at v cc = 2.85v, t a = +25 n c, lo freq = 5.35ghz. channel bandwidth is set to 40mhz. pa control pins open circuit, v cc_pa_bias is disconnected.) (note 1) absolute maximum ratings caution! esd sensitive device parameter conditions min typ max units supply voltage 2.7 3.6 v supply current shutdown mode t a = +25 nc 10 fa clockout only mode with load = 10pf at clkout pin xtal oscillator, clkout2 is off 3.7 ma xtal oscillator, clkout2 is on 4.6 tcxo input, clkout2 is off 4.8 7.0 tcxo input, clkout2 is on 6.1 standby mode 60 transmit mode 183 212 receive mode one receiver is on 144 184 five receivers are on 367 458 receive calibration mode one receiver is on 248 five receivers are on 435 517 transmit calibration mode 256 rx i/q output common-mode voltage 0.88 1.1 1.34 v tx baseband input common- mode voltage operating range 0.5 1.1 v tx baseband input bias current source current 10 20 fa
_______________________________________________________________________________________ 3 max2851 5ghz, 5-channel mimo receiver dc electrical characteristics (continued) (operating conditions unless otherwise specified: v cc = 2.7v to 3.6v, t a = -25 n c to +85n c, enable set according to operating mode, cs = high, sclk = din = low, transmitter in maximum gain. power matching and termination for the differential rf output pins using the typical operating circuit ; 100mv rms differential i and q signals applied to i and q baseband inputs of transmitters in transmit mode. typical values measured at v cc = 2.85v, t a = +25 n c, lo freq = 5.35ghz. channel bandwidth is set to 40mhz. pa control pins open circuit, v cc_pa_bias is disconnected.) (note 1) ac electrical characteristicsrx mode (operating conditions unless otherwise specified: v cc = 2.7v to 3.6v, t a = -25 n c to +85n c, rf freq = 5.351ghz, lo freq = 5.35ghz. reference freq = 40mhz, enable = high, cs = high, sclk = din = low, with power matching at rxrf_+ and rxrf_- differential ports using the typical operating circuit . receiver i/q output at 100mv rms loaded with 10k i differential load resistance and 10pf load capacitance. rssi pin is loaded with 10k i load resistance to ground. typical values measured at v cc = 2.85v, t a = +25 nc, channel bandwidths of 40mhz.) (note 1) parameter conditions min typ max units logic inputs: enable, sclk, din, cs digital input-voltage high, v ih v cc - 0.4 v digital input-voltage low, v il (note 2) 0.3 v digital input-current high, i ih -1 +1 fa digital input-current low, i il -1 +1 fa logic outputs: dout, clkout digital output-voltage high, v oh sourcing 1ma v cc - 0.4 v digital output-voltage low, v ol sinking 1ma 0.4 v digital output voltage in shutdown mode sinking 1ma v ol v parameter conditions min typ max units receiver section: rf input to i/q baseband loaded output includes 50 i to 100i rf balun and matching rf input frequency range 4.9 5.9 ghz peak-to-peak gain variation over rf frequency range at one temperature 4.9ghz to 5.9ghz 1.8 4.2 db rf input return loss all lna settings -6 db total voltage gain maximum gain, main address 1 d[7:0] = 11111111 61.8 68 db minimum gain, main address 1 d[7:0] = 00000000 -2 +6.9 rf gain steps relative to maximum gain main address 1 d[7:5] = 110 -8 db main address 1 d[7:5] = 101 -16 main address 1 d[7:5] = 001 -32 main address 1 d[7:5] = 000 -40 baseband gain range from maximum baseband gain (main address 1 d[3:0] = 1111) to minimum baseband gain (main address 1 d[3:0] = 0000) 28 30 32 db baseband gain step 2 db rf gain change settling time gain settling to within q 0.5db of steady state, rxhp = 1 400 ns
4 ______________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver ac electrical characteristicsrx mode (continued) (operating conditions unless otherwise specified: v cc = 2.7v to 3.6v, t a = -25 n c to +85n c, rf freq = 5.351ghz, lo freq = 5.35ghz. reference freq = 40mhz, enable = high, cs = high, sclk = din = low, with power matching at rxrf_+ and rxrf_- differential ports using the typical operating circuit . receiver i/q output at 100mv rms loaded with 10k i differential load resistance and 10pf load capacitance. rssi pin is loaded with 10k i load resistance to ground. typical values measured at v cc = 2.85v, t a = +25 nc, channel bandwidths of 40mhz.) (note 1) parameter conditions min typ max units baseband gain change settling time gain settling to within q 0.5db of steady state, rxhp = 1 200 ns dsb noise figure balun input referred, integrated from 10khz to 9.5mhz at i/q base - band output for 20mhz rf bandwidth maximum rf gain (main address 1 d[7:5] = 111) 4.5 db maximum rf gain - 16db (main address 1 d[7:5] = 101) 15 balun input referred, integrated from 10khz to 19mhz at i/q base - band output for 40mhz rf bandwidth maximum rf gain (main address 1 d[7:5] = 111) 4.5 maximum rf gain - 16db (main address 1 d[7:5] = 101) 15 out-of-band input ip3 20mhz rf channel, two-tone jammers at +25mhz and +48mhz frequency offset with -39dbm/tone -65dbm wanted signal, rf gain = max (main address 1 d[7:0] = 11101001) -13 dbm -49dbm wanted signal, rf gain = max - 16db (main address 1 d[7:0] = 10101001) -5 -45dbm wanted signal, rf gain = max - 32db (main address 1 d[7:0] = 00111111) 11 40mhz rf channel, two-tone jammers at +50mhz and +96mhz frequency offset with -39dbm/tone -65dbm wanted signal, rf gain = max (main address 1 d[7:0] = 11101001) -13 -49dbm wanted signal, rf gain = max - 16db (main address 1 d[7:0] = 10101001) -5 -45dbm wanted signal, rf gain = max - 32db (main address 1 d[7:0] = 00101001) 11 1db gain desensitization by alternate channel blocker blocker at q 40mhz offset frequency for 20mhz rf channel -24 dbm blocker at q 80mhz offset frequency for 40mhz rf channel -24 input 1db gain compression max rf gain (main address 1 d[7:5] = 111) -34 dbm max rf gain - 8db (main address 1 d[7:5] = 110) -25 max rf gain - 16db (main address 1 d[7:5] = 101) -18 max rf gain - 32db (main address 1 d[7:5] = 001) -1
_______________________________________________________________________________________ 5 max2851 5ghz, 5-channel mimo receiver ac electrical characteristicsrx mode (continued) (operating conditions unless otherwise specified: v cc = 2.7v to 3.6v, t a = -25 n c to +85n c, rf freq = 5.351ghz, lo freq = 5.35ghz. reference freq = 40mhz, enable = high, cs = high, sclk = din = low, with power matching at rxrf_+ and rxrf_- differential ports using the typical operating circuit . receiver i/q output at 100mv rms loaded with 10k i differential load resistance and 10pf load capacitance. rssi pin is loaded with 10k i load resistance to ground. typical values measured at v cc = 2.85v, t a = +25 nc, channel bandwidths of 40mhz.) (note 1) parameter conditions min typ max units output 1db gain compression over passband frequency range, at any gain setting, 1db compression point 0.63 v p-p baseband -3db lowpass corner frequency main address 0 d1 = 0 9.5 mhz main address 0 d1 = 1 19 baseband filter stopband rejection rejection at 30mhz offset frequency for 20mhz channel 74 db rejection at 60mhz offset frequency for 40mhz channel 69 baseband -3db highpass corner frequency main address 5 d1 = 1 600 khz main address 5 d1 = 0, main address 4 d3 = 1 10 main address 5 d1 = 0, main address 4 d3 = 0 (note 3) 0.1 steady-state i/q output dc error with ac-coupling 50f s after enabling receive mode and togging rxhp from 1 to 0, averaged over many measurements if i/q noise voltage exceeds 1mv rms , at any given gain set - ting, no input signal, 1-sigma value 2 mv i/q gain imbalance 1mhz baseband output, 1-sigma value 0.1 db i/q phase imbalance 1mhz baseband output, 1-sigma value 0.2 deg sideband suppression 1mhz baseband output 40 db receiver spurious signal emissions lo frequency -75 dbm/ mhz 2o lo frequency -62 3o lo frequency -75 4o lo frequency -54 rf rssi output voltage -25dbm input power 1.6 v baseband rssi slope 18 26.5 37 mv/db baseband rssi maximum output voltage 2.3 v baseband rssi minimum output voltage 0.5 v rf loopback conversion gain tx vga gain at max (main address 9 d[9:4] = 111111), rx vga gain at max - 24db (main address 1 d[3:0] = 0101) -17.1 -10 -1.7 db
6 ______________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver ac electrical characteristicstx mode (operating conditions unless otherwise specified: v cc = 2.7v to 3.6v, t a = -25 n c to +85n c, rf freq = 5.351ghz, lo freq = 5.35ghz. reference freq = 40mhz, enable = high, cs = high, sclk = din = low, with power matching at txrf+ and txrf- differential ports using the typical operating circuit ; 100mv rms sine and cosine signal applied to i/q baseband inputs of transmitter (differential dc-coupled). typical values measured at v cc = 2.85v, t a = +25 n c, channel bandwidths of 40mhz.) (note 1) parameter conditions min typ max units transmit section: tx baseband i/q inputs to rf outputs includes matching and balun loss rf output frequency range 4.9 5.9 ghz peak-to-peak gain variation over rf band at one temperature 0.7 1.55 db maximum output power 20mhz ofdm signal conforming to spectral emission mask and -34db evm -3 dbm 40mhz ofdm signal confirming to spectral emission mask and -34db evm -3 output 1db gain compression relative to typical maximum output power at 9.5mhz input frequency 11 dbc input 1db gain compression at 19mhz input frequency, over input common-mode voltage between 0.5v and 1.1v 380 mv rms gain control range 24 31.5 34 db gain control step 0.5 db rf output return loss -3 db unwanted sideband over rf channel, rf frequency, baseband frequency, and gain settings (note 4) -40 dbc carrier leakage over rf channel, rf frequency, and gain settings (note 4) -29 -15 dbc tx i/q input impedance (r || c) minimum differential resistance 60 ki maximum differential capacitance 2 pf baseband filter stopband rejection at 30mhz frequency offset for 20mhz rf channel 86 db at 60mhz frequency offset for 40mhz rf channel 67 tx calibration ftone level at tx gain code (main address 9 d[9:4]) = 100010 and -15dbc carrier leakage (local address 27 d[2:0] = 110 and main address 1 d[3:0] = 0000) -24 dbv rms tx calibration rf gain step relative to maximum gain local address 27 d[1:0] = 01 -14 db local address 27 d[1:0] = 00 -28 tx calibration baseband gain step relative to maximum gain local address 27 d2 = 0 -5 db
_______________________________________________________________________________________ 7 max2851 5ghz, 5-channel mimo receiver ac electrical characteristicsfrequency synthesis (operating conditions unless otherwise specified: v cc = 2.7v to 3.6v, t a = -25 n c to +85 n c, freq = 5.35ghz. reference freq = 40mhz, enable = high, cs = high, sclk = din = low. typical values measured at v cc = 2.85v, t a = +25 n c, lo freq = 5.35ghz.) (note 1) ac electrical characteristicsmiscellaneous blocks (operating conditions unless otherwise specified: v cc = 2.7v to 3.6v, t a = -25 n c to +85n c. reference freq = 40mhz, enable = high, cs = high, sclk = din = low. typical values measured at v cc = 2.85v, t a = +25 n c.) (note 1) parameter conditions min typ max units frequency synthesizer rf channel center frequency 4.9 5.9 ghz channel center frequency programming step 76.294 hz closed-loop integrated phase noise loop bw = 200khz, integrate phase noise from 1khz to 10mhz -35 dbc charge-pump output current 0.8 ma spur level f offset = 0 to 19mhz -42 dbc f offset = 40mhz -66 reference frequency 40 mhz reference frequency input levels ac-coupled to xtal pin 800 mv p-p maximum crystal motional resistance 50 i crystal capacitance tuning range base-to-ground capacitance 30 pf crystal capacitance tuning step 140 ff clkout signal level 10pf load capacitance v cc - 0.8 v cc - 0.1 v p-p clkout2 signal level 4pf load capacitance 0.3 v p-p parameter conditions min typ max units pa power-detector mux output voltage drop v in = 2.0v, load resistance = 10k i to ground 15 32 mv pa on/off control v cc_pa_bias input voltage range 3.1 3.6 v v cc_pa_bias supply current with 10ma load at pa_bias 10.5 ma output high level 10ma load current, main address 11 d[7:5] = 011 2.8 v output low level 1ma load current, main address 11 d[7:5] = 011 25 mv turn-on time measured from cs rising edge 0.3 fs on-chip temperature sensor digital output code readout at dout pin through main address 3 d[4:0] t a = +25 nc 13 t a = +85 nc 22 t a = -25 nc 2
8 ______________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver ac electrical characteristicstiming (operating conditions unless otherwise specified: v cc = 2.7v to 3.6v, t a = -25 n c to +85n c, freq = 5.35ghz. reference freq = 40mhz, enable = high, cs = high, sclk = din = low. typical values measured at v cc = 2.85v, t a = +25 n c, lo freq = 5.35ghz.) (note 1) parameter symbol conditions min typ max units system timing shutdown time 2 fs maximum channel switching time loop bandwidth = 200khz, settling to within q 1khz from steady state 2 ms maximum channel switching time with preselected vco sub-band loop bandwidth = 200khz, settling to within q 1khz from steady state 56 fs rx/tx turnaround time measured from cs ris- ing edge rx to tx mode, tx gain settles to within 0.2db of steady state 2 fs tx to rx mode with rxhp = 1, rx gain settles to within 0.5db of steady state 2 tx turn-on time (from standby mode) measured from cs rising edge, tx gain settles to within 0.2db of steady state 2 fs tx turn-off time (to standby mode) from cs rising edge 0.1 fs rx turn-on time (from standby mode) measured from cs rising edge, rx gain settles to within 0.5db of steady state 2 fs rx turn-off time (to standby mode) from cs rising edge 0.1 fs
_______________________________________________________________________________________ 9 max2851 5ghz, 5-channel mimo receiver note 1: the max2851 is production tested at t a = +25 n c, minimum/maximum limits at t a = +25 n c are guaranteed by test unless otherwise specified. minimum/maximum limits at t a = -25 n c and +85 n c are guaranteed by design and characterization. there is no power-on register settings self-reset; recommended register settings must be loaded after v cc is applied. note 2: mini mum/maximum limit is guaranteed by design and characterization. note 3: it is currently not recommended and not tested. for test coverage support, contact manufacturer. note 4: for optimal rx and tx quadrature accuracy over temperature, the user can utilize the rx calibration and tx calibration circuit to assist quadrature calibration. ac electrical characteristicstiming (continued) (operating conditions unless otherwise specified: v cc = 2.7v to 3.6v, t a = -25 n c to +85n c, freq = 5.35ghz. reference freq = 40mhz, enable = high, cs = high, sclk = din = low. typical values measured at v cc = 2.85v, t a = +25 n c, lo freq = 5.35ghz.) (note 1) parameter symbol conditions min typ max units 4-wire serial interface timing (figure 1) sclk rising edge to cs falling edge wait time t cso 6 ns falling edge of cs to rising edge of first sclk time t css 6 ns din to sclk setup time t ds 6 ns din to sclk hold time t dh 6 ns sclk pulse-width high t ch 6 ns sclk pulse-width low t cl 6 ns last rising edge of sclk to rising edge of cs or clock to load enable setup time t csh 6 ns cs high pulse width t csw 50 ns time between rising edge of cs and the next rising edge of sclk t cs1 6 ns sclk frequency f clk 40 mhz rise time t r 2.5 ns fall time t f 2.5 ns
10 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver typical operating characteristics (v cc = 2.8v, t a = +25 n c, f lo = 5.35ghz, f ref = 40mhz, cs = high, sclk = din = low, rf bw = 20mhz, tx output at 50 unbalanced output of balun, using the max2851 evaluation kit, unless otherwise noted.) rx mode single-channel supply current max2851 toc01 v cc (v) i cc (ma) 3.5 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 140 142 144 146 148 150 152 138 2.6 3.6 t a = +25 c t a = +85 c t a = -40 c rx mode 5-channel supply current max2851 toc02 v cc (v) i cc (ma) 3.5 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 360 365 370 375 380 385 390 355 2.6 3.6 t a = +25 c t a = +85 c t a = -40 c rx3 maximum gain vs. frequency max2851 toc04 frequency (ghz) gain (db) 5.8 5.7 5.5 5.6 5.1 5.2 5.3 5.4 5.0 25 30 35 40 45 50 55 60 65 70 75 20 4.9 5.9 lna = max gain lna = max - 8db lna = max - 16db lna = max - 24db lna = max - 32db lna = max - 40db rx3 maximum gain vs. temperature and frequency max2851 toc05 gain (db) 65 66 67 68 69 70 71 72 73 74 64 frequency (ghz) 5.8 5.7 5.5 5.6 5.1 5.2 5.3 5.4 5.0 4.9 5.9 t a = -20 c t a = +25 c t a = +85 c rx2 maximum gain with fixed lna sub-band (main address 2 d[6:5]) max2851 toc06 gain (db) 57 59 61 63 65 67 69 71 73 75 55 frequency (ghz) 5.8 5.7 5.5 5.6 5.1 5.2 5.3 5.4 5.0 4.9 5.9 band 0 band 1 band 2 band 3 rx maximum gain vs. frequency max2851 toc07 gain (db) 65 66 67 68 69 70 71 64 frequency (ghz) 5.8 5.7 5.5 5.6 5.1 5.2 5.3 5.4 5.0 4.9 5.9 rx3 rx2 rx4 rx1 rx5 rx output v 1db vs. gain setting max2851 toc09 baseband vga gain code output v 1db (v rms ) 14 12 10 8 6 4 2 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 0 16 f bb = 1mhz f bb = 19mhz t a = +25 c t a = -20 c t a = -20 c t a = +25 c t a = +85 c t a = +85 c receiver rx gain vs. baseband vga gain baseband vga gain code gain (db) 14 12 8 10 4 6 2 0 10 20 30 40 50 60 70 80 -10 0 16 max2851 toc08 lna = max lna = max - 8db lna = max - 24db lna = max - 32db lna = max - 40db lna = max - 16db rx noise figure vs. vga gain settings (balun input referred) max2851 toc03 rx vga gain settings noise figure (db) 13 12 10 11 3 4 5 6 7 8 9 1 2 5 10 15 20 25 30 35 40 45 0 0 1 4 15 max - 40db max - 32db max - 24db max - 16db max - 8db max
______________________________________________________________________________________ 11 max2851 5ghz, 5-channel mimo receiver typical operating characteristics (continued) (v cc = 2.8v, t a = +25 n c, f lo = 5.35ghz, f ref = 40mhz, cs = high, sclk = din = low, rf bw = 20mhz, tx output at 50 unbalanced output of balun, using the max2851 evaluation kit, unless otherwise noted.) rx4 emission spectrum at lna input (lna max gain) max2851 toc13 output power (dbm) 2.65ghz/div -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -100 0hz 2.65ghz 4 lo 2 lo rf frequency rx input impedance at max lna gain max2851 toc14 rf frequency (ghz) imaginary part ( i ) real part ( i ) 5.8 5.7 5.0 5.1 5.2 5.4 5.5 5.3 5.6 -10 0 10 20 30 40 50 60 -20 -30 -10 -20 0 10 20 30 40 -40 4.9 5.9 rx5 rx5 rx1 rx2, 3, 4 rx2, 3, 4 rx1 rx3 input return loss max2851 toc15 frequency (ghz) s11 (db) 5.8 5.6 5.4 5.2 5.0 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 -20 4.8 6.0 t a = +85 c t a = +25 c t a = -40 c rx input return loss max2851 toc16 frequency (ghz) s11 (db) 5.8 5.6 5.4 5.2 5.0 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 -20 4.8 6.0 rx3 rx5 rx1, 2, 4 rx evm vs. input power (channel bandwidth = 20mhz) input power (dbm) rx evm (db) -10 -30 -50 -70 -35 -30 -25 -20 -15 -40 -90 10 max2851 toc10 lna = max lna = max = -8db lna = max = -16db lna = max = -24db lna = max = -32db lna = max = -40db rx evm vs. rx baseband output level max2851 toc11 rx baseband output level (dbv rms ) rx evm (%) -5 -10 -15 -20 -25 2 4 6 8 10 12 0 -30 0 vga gain = 0 vga gain = 2/4/6/8/10/12/14 vga gain = 3/5/7/9/11/13/15 rx evm vs. ofdm jammer power at 20mhz and 40mhz offset frequency with wanted signal at -66dbm max2851 toc12 input power (dbm) rx evm (%) 5 0 -5 -10 -15 -20 -25 -30 -35 2 4 6 8 10 12 14 0 -40 10 20mhz offset 40mhz offset rx rf rssi output max2851 toc17 rf input power (dbm) rf rssi output voltage (v) -5 -10 -15 -20 -25 -30 -35 -40 -45 0.5 1.0 1.5 2.0 2.5 0 -50 0 low gain, t a = -20c low gain, t a = +25c high gain, t a = +25c high gain, t a = +85c low gain, t a = +85c high gain, t a = -20c rx rf rssi attack time (+40db signal step) max2851 toc18 1.0v/div 1.0v/div 0v 0v 400ns/div d: 280ns @: 192ns d: 1.32v @: 1.84v gain control v rssi
12 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver typical operating characteristics (continued) (v cc = 2.8v, t a = +25 n c, f lo = 5.35ghz, f ref = 40mhz, cs = high, sclk = din = low, rf bw = 20mhz, tx output at 50 unbalanced output of balun, using the max2851 evaluation kit, unless otherwise noted.) rx rf rssi delay time (-40db signal step) max2851 toc19 1.0v/div 1.0v/div 0v 0v 400ns/div d: 216ns @: 128ns d: 1.30v @: 460mv gain control v rssi baseband rssi voltage vs. input power max2851 toc20 rf input power (dbm) baseband rssi output voltage (v) 0 -20 -40 -60 -80 0.5 1.0 1.5 2.0 2.5 3.0 0 -100 20 lna = max - 16db lna = max - 8db lna = max - 32db lna = max - 24db lna = max lna = max - 40db rx baseband rssi +40db step response max2851 toc21 2.7v 0.8v 0v 2.4v 1 s/div d: 460ns @: 440ns d: 1.50v @: 2.30v lna gain control rssi output rx baseband rssi -32db step response max2851 toc22 2.7v 0.6v 0v 2.0v 1 s/div d: 1.18 s @: 1.16 s d: 1.62v @: 480mv lna gain control rssi output max2851 toc23 baseband frequency (hz) response (db) -35 -135 10k 100m rx lpf 20mhz channel bandwidth response max2851 toc24 frequency (hz) response (db) -35 -135 10k 100m rx lpf 40mhz channel bandwidth response rx lpf 20mhz channel bandwidth group delay max2851 toc25 group delay (ns) 0 10k 100m 100 frequency (hz) rx lpf 40mhz channel bandwidth group delay max2851 toc26 group delay (ns) 0 10k 100m 100 frequency (hz) rx dc offset settling response (-30db rx vga gain step) max2851 toc27 50mv/div 0v rx baseband i/q output 200ns/div ch1 peak to peak: 81.9mv gain-control toggle
______________________________________________________________________________________ 13 max2851 5ghz, 5-channel mimo receiver typical operating characteristics (continued) (v cc = 2.8v, t a = +25 n c, f lo = 5.35ghz, f ref = 40mhz, cs = high, sclk = din = low, rf bw = 20mhz, tx output at 50 unbalanced output of balun, using the max2851 evaluation kit, unless otherwise noted.) rx dc offset settling response (+8db rx vga gain step) max2851 toc28 10mv/div 0v 200ns/div ch1 peak to peak: 8.60mv gain-control toggle rx baseband i/q output rx dc offset settling response (+16db rx vga gain step) max2851 toc29 10mv/div 0v 200ns/div ch1 peak to peak: 17.3mv gain-control toggle rx baseband i/q output rx dc offset settling response (+32db rx vga gain step) max2851 toc30 50mv/div 0v 200ns/div ch1 peak to peak: 69.0mv gain-control toggle rx baseband i/q output rx baseband dc offset settling response with rxhp = 1 (max - 40db to max lna gain step) max2851 toc31 10mv/div 0v 10s/div gain-control toggle rx baseband i/q output rx baseband dc offset settling response with rxhp = 0 (max to max - 40db lna gain step) max2851 toc32 50mv/div 0v 10s/div gain-control toggle rx baseband i/q output rx baseband dc offset settling response with rxhp = 1 (max - 40db to max lna gain step) max2851 toc33 10mv/div 0v 10s/div gain-control toggle rx baseband i/q output rx baseband dc offset settling response with rxhp = 0 (max - 40db to max lna gain step) max2851 toc34 50mv/div 0v 10s/div gain-control toggle rx baseband i/q output rx baseband vga settling response (-30db baseband vga gain step) max2851 toc35 0.1v/div 0v 100ns/div gain-control toggle rx baseband i/q output ch1 peak to peak: 652mv rx baseband vga settling response (+4db baseband vga gain step) max2851 toc36 0.1v/div 0v 100ns/div gain-control toggle rx baseband output ch1 peak to peak: 568mv
14 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver typical operating characteristics (continued) (v cc = 2.8v, t a = +25 n c, f lo = 5.35ghz, f ref = 40mhz, cs = high, sclk = din = low, rf bw = 20mhz, tx output at 50 unbalanced output of balun, using the max2851 evaluation kit, unless otherwise noted.) rx baseband vga settling response (+16db baseband vga gain step) max2851 toc37 0.1v/div 0v 100ns/div gain-control toggle rx baseband output ch1 peak to peak: 532mv rx baseband vga settling response (+30db baseband vga gain step) max2851 toc38 0.1v/div 0v 100ns/div gain-control toggle rx baseband output ch1 peak to peak: 800mv clipping negative rx lna settling response (max to max - 40db gain step) max2851 toc39 0.1v/div 0v 100ns/div gain-control toggle rx baseband output d: 130mv @: 132mv ch1 rms: 168mv rx lna settling response (max - 8db to max gain step) max2851 toc40 0.1v/div 0v 100ns/div gain-control toggle rx baseband output d: 130mv @: 132mv ch1 rms: 188mv rx lna settling response (max - 16db to max gain step) max2851 toc41 0.1v/div 0v 100ns/div rx baseband output d: 130mv @: 132mv gain-control toggle ch1 rms: 176mv rx lna settling response (max - 24db to max gain step) max2851 toc42 0.1v/div 0v 100ns/div rx baseband output d: 130mv @: 132mv ch1 rms: 174mv gain-control toggle rx lna settling response (max - 32db to max gain step) max2851 toc43 0.1v/div 0v 200ns/div rx baseband output d: 130mv @: 132mv ch1 rms: 155mv gain-control toggle rx lna settling response (max - 40db to max gain step) max2851 toc44 0.1v/div 0v 200ns/div rx baseband output d: 130mv @: 132mv ch1 rms: 154mv gain-control toggle histogram: rx i/q gain imbalance samples = 3413, avg = -0.015db, stdev = 0.042db max2851 toc45 -800.00m 800.00m 0 648 540 432 324 216 108 0
______________________________________________________________________________________ 15 max2851 5ghz, 5-channel mimo receiver typical operating characteristics (continued) (v cc = 2.8v, t a = +25 n c, f lo = 5.35ghz, f ref = 40mhz, cs = high, sclk = din = low, rf bw = 20mhz, tx output at 50 unbalanced output of balun, using the max2851 evaluation kit, unless otherwise noted.) rx channel isolation max2851 toc50 f lo (mhz) isolation (db) 10 20 30 40 50 60 70 80 0 4900 5000 5100 5200 5300 5400 5500 5600 5700 5800 5900 rx3 to rx4 rx4 to rx5 rx1 to rx2 rx2 to rx3 rx5 to rx4 histogram: rx i/q phase imbalance samples = 3413, avg = -0.15deg, stdev = 0.18deg max2851 toc46 180 150 120 90 60 30 0 -2.0000 0 2.0000 histogram: rx static dc offset samples = 3413, avg = -0.5mv, stdev = 2.14mv max2851 toc47 132 110 88 66 44 0 22 -15.000m 0 15.000m power-on dc offset cancellation with input signal max2851 toc48 2v/div 0.1v/div 0v 0v 1s/div rx enable engage 600khz highpass corner d: 2.14 s @: 2.12 s d: 112mv @: 104mv rx baseband output power-on dc offset cancellation without input signal max2851 toc49 50mv/div rxbbi_ 500mv/div rxbbq_ 400ns/div rx enable turn-on transient
16 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver typical operating characteristics (continued) (v cc = 2.8v, t a = +25 n c, f lo = 5.35ghz, f ref = 40mhz, cs = high, sclk = din = low, rf bw = 20mhz, tx output at 50 unbalanced output of balun, using the max2851 evaluation kit, unless otherwise noted.) tx output return loss vs. frequency max2851 toc53 frequency (ghz) return loss (db) -8 -7 -6 -5 -4 -3 -2 -1 0 -9 5.7 5.5 5.3 5.1 4.9 5.9 t a = -20 c t a = +85 c t a = +25 c tx output power vs. frequency at maximum gain max2851 toc54 frequency (mhz) output power (dbm) 5700 5500 5300 5100 -4 -3 -2 -1 0 1 -5 4900 5900 t a = +85 c t a = -20 c t a = +25 c tx max output power meeting -33dbc evm and 802.11a spectral mask frequency (mhz) output power (dbm) 5700 5500 5300 5100 -6 -4 -2 0 2 -8 4900 5900 max2851 toc58 t a = +85 c t a = -20 c t a = +25 c output return loss at t a = +25c vs. tx channels max2851 toc52s frequency (mhz) return loss (db) 5800 5700 5600 5500 5400 5300 5200 5100 5000 -20 -15 -10 -5 0 -25 4900 5900 tx4 tx2 tx1 tx3 tx output power vs. gain setting max2851 toc55 tx gain code output power (dbm) 60 50 10 20 30 40 -35 -30 -25 -20 -15 -10 -5 0 -40 0 70 t a = -20c t a = +25c t a = +85c tx gain step vs. gain setting max2851 toc56 tx gain code gain step (db) 60 50 40 30 20 10 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.8 0 70 t a = +85c t a = -20c t a = +25c tx evm vs. output power (100mv rms 54mbps wlan signal) max2851 toc57 output power (dbm) tx evm (db) -5 -10 -15 -20 -25 -30 -35 -36 -34 -32 -30 -28 -38 -40 0 t a = +25c t a = -20c t a = +85c max2851 toc59 rf frequency (mhz) -18 -28 -38 -48 -58 10db/div -68 -78 -88 -98 5300 5350 5400 tx2 output spectrum at -5dbm (20mhz channel bandwidth, 802.11a 54mbps) 0dbr -40dbr tx mode supply current max2851 toc51 v cc (v) i cc (ma) 3.5 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 174 176 178 180 182 184 172 2.6 3.6 t a = +85 c t a = +25 c t a = -40 c transmitter
______________________________________________________________________________________ 17 max2851 5ghz, 5-channel mimo receiver typical operating characteristics (continued) (v cc = 2.8v, t a = +25 n c, f lo = 5.35ghz, f ref = 40mhz, cs = high, sclk = din = low, rf bw = 20mhz, tx output at 50 unbalanced output of balun, using the max2851 evaluation kit, unless otherwise noted.) tx carrier leakage vs. gain setting max2859 toc61 tx gain code carrier leakage (dbc) 60 50 10 20 30 40 -60 -55 -50 -45 -40 -35 -30 -25 -65 0 70 t a = +85 c t a = -20 c t a = +25 c tx unwanted sideband vs. rf frequency rf frequency (mhz) unwanted sideband (dbc) -60 -55 -50 -45 -40 -35 -65 max2851 toc62 5800 5700 5600 5500 5400 5300 5200 5100 5000 4900 5900 t a = -20c t a = +25c t a = +85c tx unwanted sideband vs. gain setting max2851 toc63 tx gain code unwanted sideband (dbc) 60 50 40 30 20 10 -45 -40 -35 -30 -25 -50 0 70 t a = +85c t a = +25c t a = -20c tx carrier leakage vs. rf frequency max2851 toc60 rf frequency (mhz) carrier leakage (dbc) -60 -55 -50 -45 -40 -35 -65 5800 5700 5600 5500 5400 5300 5200 5100 5000 4900 5900 t a = -20c t a = +85c t a = +25c tx6 output emission spectrum at max gain and cold (100mv rms 802.11a 54mbps signal) max2851 toc64 output power (dbm/mhz) 2.65ghz/div rf frequency (ghz) -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -100 0hz 26.5 lo 2 lo 4 lo 3 lo histogram: carrier suppression samples = 3413, avg = -34.9dbc, stdev = 3.61db max2851 toc65 102 85 68 51 34 17 0 -50.000 -18.000 -34.000 histogram: sideband suppression samples = 3413, avg = -44.6dbc, stdev = 2.58db max2851 toc66 156 130 104 78 52 26 0 -62.000 -26.000 -44.000
18 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver typical operating characteristics (continued) (v cc = 2.8v, t a = +25 n c, f lo = 5.35ghz, f ref = 40mhz, cs = high, sclk = din = low, rf bw = 20mhz, tx output at 50 unbalanced output of balun, using the max2851 evaluation kit, unless otherwise noted.) clkout2 mode supply current max2851 toc68 v cc (v) i cc (ma) 3.5 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 4.5 5.0 5.5 6.0 6.5 7.0 4.0 2.6 3.6 t a = +85 c t a = +25 c t a = -40 c synthesizer lo frequency vs. differential tune voltage at t a = +25c max2851 toc69 differential tune voltage (v) lo frequency (ghz) 2.0 1.5 1.0 0.5 4.5 5.0 5.5 6.0 6.5 7.0 4.0 0 2.5 lo gain vs. differential tune voltage at t a = +25c max2851 toc70 differential tune voltage (v) lo gain (mhz/v) 2.0 1.5 1.0 0.5 100 200 300 400 500 600 0 0 2.5 lo phase noise at 5350mhz and room temperature max2851 toc71 offset frequency (hz) phase noise (dbc/hz) -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -150 1k 10m lo phase noise at 5900mhz and hot temperature max2851 toc72 offset frequency (hz) phase noise (dbc/hz) -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -150 1k 10m max2851 toc73 400s/div 25khz -25khz 0s 3.99ms channel switching frequency settling (4900mhz to 5900mhz, automatic vco sub-band selection) frequency (5khz/div) clkout mode supply current max2851 toc67 v cc (v) i cc (ma) 3.5 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 3.5 4.0 4.5 5.0 5.5 6.0 3.0 2.6 3.6 t a = +85 c t a = +25 c t a = -40 c
______________________________________________________________________________________ 19 max2851 5ghz, 5-channel mimo receiver typical operating characteristics (continued) (v cc = 2.8v, t a = +25 n c, f lo = 5.35ghz, f ref = 40mhz, cs = high, sclk = din = low, rf bw = 20mhz, tx output at 50 unbalanced output of balun, using the max2851 evaluation kit, unless otherwise noted.) max2851 toc74 400s/div 25khz -25khz 0s 3.99ms channel switching frequency settling (5900mhz to 4900mhz, automatic vco sub-band selection) frequency (5khz/div) max2851 toc75 10s/div 25khz -25khz 0s 99.22s channel switching frequency settling (4900mhz to 5900mhz, manual vco sub-band selection) frequency (5khz/div) max2851 toc76 10s/div 25khz -25khz 0s 99.22s channel switching frequency settling (5900mhz to 4900mhz, manual vco sub-band selection) frequency (5khz/div) max2851 toc77 5s/div 50khz -50khz 0s 49.84s tx-to-rx turnaround frequency settling at max tx power frequency error (10khz/div) max2851 toc78 5s/div 50khz -50khz 0s 49.84s rx-to-tx turnaround frequency settling at max tx power frequency error (10khz/div) crystal oscillator tuning range with kyocera 40mhz 2520 crystal max2851 toc79 crystal tuning code frequency deviation from 40mhz (ppm) 250 200 150 100 50 -80 -60 -40 -20 0 20 40 60 80 100 -100 0 300 t a = +85c t a = -20c t a = +25c crystal oscillator tuning step with kyocera 2520 40mhz crystal max2851 toc80 crystal tuning code crystal oscillator frequency tuning step (ppm) 250 200 150 100 50 0 0.5 1.0 1.5 2.0 2.5 -0.5 0 300 crystal oscillator tuning capacitance at base and emitter (include ev kit components) max2851 toc81 crystal tuning code capacitance at base and emitter (pf) 250 200 150 100 50 20 40 60 80 100 120 140 0 0 300 emitter-to-ground capacitance base-to-ground capacitance
20 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver pin configuration top view tqfn v cc_dig dout clkout2 clkout 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 rxbbi5- rxbbi5+ v cc_bb2 gnd rxrf5+ rxrf5- v cc_lna5 v cc_ucx rxbbq5+ rxbbq4+ rxbbi4- rxbbi4+ txbbq- txbbq+ txbbi- txbbi+ rxbbq5- rxbbi1+ rxbbi1- rxbbq1+ rxbbq1- v cc_lna1 rxrf1+ rxrf1- enable v cc_bb1 v cc_xtal xtal xtal_cap rssi rxbbi2+ rxbbi2- rxbb2q+ rxbb2q- gnd_vco cpout+ cpout- rxbbq3- v cc_vco byp_vco rxbbq3+ rxbbi3+ rxbbi3- din cs rxbbq4- sclk rxrf2+ rxrf2- v cc_lna2 gnd rxrf3- v cc_lna3 v cc_mxr1 pa_det v cc_mxr2 rxrf3+ rxrf4- v cc_lna4 rxrf4+ pa_bias *ep *exposed pad. txrf- v cc_pa_bias txrf+ max2851
______________________________________________________________________________________ 21 max2851 5ghz, 5-channel mimo receiver pin description pin name function 1, 22 gnd ground 2 v cc_lna2 receiver 2 lna supply voltage. bypass with a capacitor as close as possible to the pin. 3 rxrf2- receiver 2 lna differential input. input is dc-coupled and biased internally at 1.2v. 4 rxrf2+ 5 v cc_mxr1 receiver downconverter supply voltage 1. bypass with a capacitor as close as possible to the pin. 6 v cc_lna3 receiver 3 lna supply voltage. bypass with a capacitor as close as possible to the pin. 7 rxrf3- receiver 3 lna differential input. input is dc-coupled and biased internally at 1.2v. 8 rxrf3+ 9 v cc_mxr2 receiver downconverter supply voltage 2. bypass with a capacitor as close as possible to the pin. 10 pa_det external power-amplifier detector mux input 11 rxrf4- receiver 4 lna differential input. input is dc-coupled and biased internally at 1.2v. 12 rxrf4+ 13 v cc_lna4 receiver 4 lna supply voltage. bypass with a capacitor as close as possible to the pin. 14 pa_bias external power-amplifier voltage bias output 15 txrf+ transmitter differential output. these pins are in open-collector configuration. these pins should be biased at the supply voltage with differential impedance terminated at 300 i. 16 txrf- 17 v cc_pa_ bias external power-amplifier voltage bias and detector mux supply voltage. bypass with a capacitor as close as possible to the pin. 18 v cc_ucx transmitter upconverter supply voltage. bypass with a capacitor as close as possible to the pin. 19 v cc_lna5 receiver 5 lna supply voltage. bypass with a capacitor as close as possible to the pin. 20 rxrf5- receiver 5 lna differential input. input is dc-coupled and biased internally at 1.2v. 21 rxrf5+ 23 v cc_bb2 receiver baseband supply voltage 2. bypass with a capacitor as close as possible to the pin. 24 rxbbi5+ receiver 5 baseband i-channel differential output 25 rxbbi5- 26 rxbbq5+ receiver 5 baseband q-channel differential output 27 rxbbq5- 28 txbbi+ transmitter baseband i-channel differential input 29 txbbi- 30 txbbq+ transmitter baseband q-channel differential input 31 txbbq- 32 rxbbi4+ receiver 4 baseband i-channel differential output 33 rxbbi4- 34 rxbbq4+ receiver 4 baseband q-channel differential output 35 rxbbq4- 36 cs active-low chip-select logic input of 4-wire serial interface 37 sclk serial-clock logic input of 4-wire serial interface 38 din data logic input of 4-wire serial interface 39 rxbbi3+ receiver 3 baseband i-channel differential output 40 rxbbi3- 41 rxbbq3+ receiver 3 baseband q-channel differential output 42 rxbbq3-
22 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver pin description (continued) pin name function 43 v cc_vco vco supply voltage. bypass with a capacitor as close as possible to the pin. 44 byp_vco on-chip vco regulator output bypass. bypass with an external 1 f f capacitor to gnd_vco with minimum pcb trace. do not connect other circuitry to this pin. 45 gnd_vco vco ground 46 cpout+ differential charge-pump output. connect the frequency synthesizers loop filter between cpout+ and cpout- (see the typical operating circuit ). 47 cpout- 48 v cc_dig digital block supply voltage. bypass with a capacitor as close as possible to the pin. 49 dout data logic output of 4-wire serial interface 50 clkout2 reference clock buffer output 2 51 clkout reference clock buffer output 52 v cc_xtal crystal oscillator supply voltage. bypass with a capacitor as close as possible to the pin. 53 xtal crystal oscillator base input. ac-couple crystal unit to this pin. 54 xtal_cap crystal oscillator emitter node 55 rssi receiver signal strength indicator output 56 rxbbi2+ receiver 2 baseband i-channel differential output 57 rxbbi2- 58 rxbbq2+ receiver 2 baseband q-channel differential output 59 rxbbq2- 60 v cc_bb1 receiver baseband supply voltage 1. bypass with a capacitor as close as possible to the pin. 61 rxbbi1+ receiver 1 baseband i-channel differential output 62 rxbbi1- 63 rxbbq1+ receiver 1 baseband q-channel differential output 64 rxbbq1- 65 v cc_lna1 receiver 1 lna supply voltage. bypass with a capacitor as close as possible to the pin. 66 rxrf1+ receiver 1 lna differential input. input is dc-coupled and biased internally at 1.2v. 67 rxrf1- 68 enable enable logic input ep exposed paddle. connect to the ground plane with multiple vias for proper operation and heat dissipation. do not share with any other pin grounds and bypass capacitors ground.
______________________________________________________________________________________ 23 max2851 5ghz, 5-channel mimo receiver table 1. operating modes detailed description modes of operation the max2851 modes of operation are shutdown, clock - out, standby, receive, transmit, transmitter calibration, rf loopback, and baseband loopback. see table 1 for a summary of the modes of operation. the logic input pin enable (pin 68) and spi main address 0 d[4:2] control the various modes. shutdown mode the max2851 features a low-power shutdown mode. all circuit blocks are powered down, except the 4-wire serial bus and its internal programmable registers. clockout mode in clockout mode, only the crystal oscillator signal is active at the clkout pin. the rest of the transceiver is powered down. standby mode in standby mode, pll, vco, and lo generation are on. tx or rx modes can be quickly enabled from this mode. other blocks can be selectively enabled in this mode receive (rx) mode in receive mode, all rx circuit blocks are powered on and active. the antenna signal is applied; rf is down - converted, filtered, and buffered at the rxbb i and q outputs. transmit (tx) mode in transmit mode, all tx circuit blocks are powered on and active. the external pa can be powered on through the pa_bias pin after a programmable delay. transmit calibration mode in transmit calibration mode, all tx circuit blocks are powered on and active. the am detector and receiver i/q channel buffers are also on. output signals are routed to rxbb i and q outputs. the am detector multiplies the tx rf output signal with itself. the self-mixing product of the wanted sideband becomes dc voltage and is filtered on-chip. the mixing product between wanted sideband and the carrier leak - age forms ftone at the rx baseband output. the mixing product between the wanted sideband and the unwant - ed sideband forms 2ftone at the rx baseband output. as the tx rf output is self-mixed at the am detector, the am detector output responds differently to different gain settings and power levels. when the tx rf output power changes by 1db through tx gain control, the am detector output changes by 2db as both the wanted sideband and carrier leakage (or unwanted sideband) change by 1db. when tx rf output carrier leakage (or unwanted sideband) changes by 1db while the wanted sideband output power is constant, the am detector out - put changes by 1db only. note 1: pa_bias pin can be kept active in nontransmit mode(s) by spi programming. note 2: clkout signal is active independent of spi, and is only dependent on the enable pin. note 3: clkout2 signal can be enabled/disabled through spi in all operating modes except shutdown mode. mode mode control logic inputs circuit block states enable pin spi m ain address 0, d[4:2] rx path tx path (note 1) lo p ath clkout (notes 2, 3) calibration sections on shutdown 0 xxx off off off off none clockout 1 000 off off off on none standby 1 001 off off on on none rx 1 010 on off on on none tx 1 011 off on on on none tx calibration 1 100 off on on on am detector + rx5 i/q buffers rf loopback 1 101 on (except lna) on on on rf loopback baseband loopback 1 11x on (except rxrf) off on on tx baseband buffer
24 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver rf loopback mode in rf loopback mode, part of the rx and tx circuit blocks except the lna are powered on and active. the transmitter i/q input signal is upconverted to rf, and the output of the transmitter is fed to the receiver downcon - verter input. output signals are delivered to all receiver baseband i/q outputs. the i/q lowpass filters in the transmitter signal path are bypassed. baseband loopback mode in baseband loopback mode, part of the rx and tx baseband circuit blocks are powered and active. the transmitter i/q input signal is routed to the receiver low - pass filter input. output signals are delivered to receiver 5 baseband i/q outputs. power-on sequence set the enable pin to v cc for 2ms to start the crystal oscillator. program all spi addresses according to rec - ommended values. set spi main address 0 d[4:2] from 000 to 001 to engage standby mode. to lock the lo frequency, the user can set spi in order of main address 15, main address 16, and then main address 17 to trig - ger vco sub-band autoacquisition; the acquisition takes 2ms. after the lo frequency is locked, set spi main address 0 d[4:2] = 010 and 011 for rx and tx operating modes, respectively. before engaging to rx mode, set main address 5 d1 = 1 to allow fast dc-offset settling. after engaging to rx mode and the rx baseband dc offset settles, the user can set main address 5 d1 = 0 to complete rx dc-offset cancellation. programmable registers and 4-wire spi interface the max2851 includes 60 programmable 16-bit reg - isters. the most significant bit (msb) is the read/write selection bit (r/w in figure 1). the next 5 bits are register address (a[4:0] in figure 1). the 10 least significant bits (lsbs) are register data (d[9:0] in figure 1). register data is loaded through the 4-wire spi/microwire k- compatible serial interface. msb of data at the din pin is shifted in first and is framed by cs . when cs is low, the clock is active and input data is shifted at the rising edge of the clock at the sclk pin. at cs rising edge, the 10-bit data bits are latched into the register selected by the address bits. see figure 1. to support more than a 32-register address using a 5-bit-wide address word, the bit 0 of address 0 is used to select whether the 5-bit address word is applied to the main address or local address. there is no power-on spi register self-reset functionality in the max2851; the user must program all register values after power-up. during the read mode, register data selected by address bits is shifted out to the dout pin at the falling edges of the clock. microwire is a trademark of national semiconductor corp. figure 1. 4-wire spi serial-interface timing diagram sclk t cs o t cs s t ds t dh t ch t cl t cs w t cs h t cs 1 a4 r/w a0 d9 d0 don?t care a0 d9 d0 a4 r/w din (spi write) don?t care don?t care d9 dout (spi read ) din (spi read ) d0 don?t care t d cs
______________________________________________________________________________________ 25 max2851 5ghz, 5-channel mimo receiver table 2. register summary spi register definition all values in the register definition table are typical numbers. the max2851 spi does not have a power- on-default self-reset feature; the user must program all spi addresses for normal operation. prior to use of any untested settings, contact the factory. register read/write and address data main0_ d0 a[4:0] write (w)/ read (r) d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 main 0 0 00000 w/r reserved mode[2:0] rfbw m/l_sel default 0 0 0 0 1 0 0 0 1 0 main 1 0 00001 w/r reserved lna_gain[2:0] vga_gain[4:0] default 0 0 1 1 1 1 1 1 1 1 main 2 0 00010 w/r reserved lna_band[1:0] reserved default 0 1 1 0 1 0 0 0 0 0 main 3 0 00011 w reserved ts_en ts_ trig reserved reserved r ts_read[4:0] default 0 0 0 0 0 0 0 0 0 0 main 4 0 00100 reserved 1 1 0 0 0 1 1 1 0 0 main 5 0 00101 w/r reserved rssi_mux_sel[2:0] rssi_rx_sel[2:0] reserved rxhp reserved default 0 0 0 0 0 0 0 0 0 0 main 6 0 00110 w/r rx_gain_prog_sel[5:1] e_rx[5:1] reserved 1 1 1 1 1 1 1 1 1 1 main 7 0 00111 reserved 0 0 0 0 1 0 0 1 0 0 main 8 0 01000 w/r 0 0 0 0 0 0 0 0 0 0 main 9 0 01001 w/r tx_gain[5:0] reserved default 0 0 0 0 0 0 1 1 1 1 main 10 0 01010 reserved 0 0 0 0 0 0 0 0 0 0 main 11 0 01011 w/r reserved default 0 0 0 1 1 0 0 0 0 0 main 13 0 01101 reserved 0 0 0 0 0 0 0 0 0 0 main 14 0 01110 w/r e_clkout2 reserved dout_sel reserved default 1 1 0 1 1 0 0 0 0 0 main 15 0 01111 w/r vas_ trig_en reserved syn_config_n[6:0] default 1 0 0 1 0 0 0 0 1 0 main 16 0 10000 w/r syn_config_f[19:10] default 1 1 1 0 0 0 0 0 0 0 main 17 0 10001 w/r syn_config_f[9:0] default 0 0 0 0 0 0 0 0 0 0 main 18 0 10010 w/r reserved xtal_tune[7:0] default 0 0 1 0 0 0 0 0 0 0
26 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver table 2. register summary (continued) register read/write and address data main0_ d0 a[4:0] write (w)/ read (r) d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 main 19 0 10011 w/r reserved vas_ relock_ sel vas_ mode vas_spi[5:0] read reserved vas_adc[2:0] vco_band[5:0] default 0 0 0 1 0 1 1 1 1 1 main 20 0 10100 reserved 0 1 1 1 1 0 1 0 1 0 main 21 0 10101 read reserved die_id[2:0] reserved default 0 0 1 0 1 1 1 1 1 1 main 22 0 10110 reserved 0 1 1 0 1 1 1 0 0 0 main 23 0 10111 reserved 0 0 0 1 1 0 0 1 0 1 main 24 0 11000 reserved 1 0 0 1 0 0 1 1 1 1 main 25 0 11001 reserved 1 1 1 0 1 0 1 0 0 0 main 26 0 11010 reserved 0 0 0 0 0 1 0 1 0 1 main 27 0 11011 w/r die_id_ read reserved vas_vco_ read reserved default 0 1 1 0 0 0 0 0 0 0 main 28 0 11100 w/r reserved pa_bias_dly[3:0] default 0 0 0 1 1 0 0 0 1 1 main 29 0 11101 reserved 0 0 0 0 0 0 0 0 0 0 main 30 0 11110 reserved 0 0 0 0 0 0 0 0 0 0 main 31 0 11111 reserved 0 0 0 0 0 0 0 0 0 0 local 1 1 00001 reserved 0 0 0 0 0 0 0 0 0 0 local 2 1 00010 reserved 0 0 0 0 0 0 0 0 0 0 local 3 1 00011 reserved 0 0 0 0 0 0 0 0 0 0 local 4 1 00100 w/r rfdet_mux_sel[2:0] reserved reserved 1 1 1 0 0 0 0 0 0 0 local 5 1 00101 reserved 0 0 0 0 0 0 0 0 0 0 local 6 1 00110 reserved 0 0 0 0 0 0 0 0 0 0 local 7 1 00111 reserved 0 0 0 0 0 0 0 0 0 0 local 8 1 01000 reserved 0 1 1 0 1 0 1 0 1 0 local 9 1 01001 reserved 0 1 0 0 0 1 0 1 0 0 local 10 1 01010 reserved 1 1 0 1 0 1 0 1 0 0 local 11 1 01011 reserved 0 0 0 1 1 1 0 0 1 1 local 12 1 01100 reserved 0 0 0 0 0 0 0 0 0 0 local 13 1 01101 reserved 0 0 0 0 0 0 0 0 0 0 local 14 1 01110 reserved 0 0 0 0 0 0 0 0 0 0 local 15 1 01111 reserved 0 0 0 0 0 0 0 0 0 0 local 16 1 10000 reserved 0 0 0 0 0 0 0 0 0 0 local 17 1 10001 reserved 0 0 0 0 0 0 0 0 0 0
______________________________________________________________________________________ 27 max2851 5ghz, 5-channel mimo receiver table 2. register summary (continued) register read/write and address data main0_ d0 a[4:0] write (w)/ read (r) d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 local 18 1 10010 reserved 0 0 0 0 0 0 0 0 0 0 local 19 1 10011 reserved 0 0 0 0 0 0 0 0 0 0 local 20 1 10100 reserved 0 0 0 0 0 0 0 0 0 0 local 21 1 10101 reserved 0 0 0 0 0 0 0 0 0 0 local 22 1 10110 reserved 0 0 0 0 0 0 0 0 0 0 local 23 1 10111 reserved 0 0 0 0 0 0 0 0 0 0 local 24 1 11000 reserved 0 0 1 1 0 0 0 1 0 0 local 25 1 11001 reserved 0 1 0 0 1 0 1 0 1 1 local 26 1 11010 reserved 0 1 0 1 1 0 0 1 0 1 local 27 1 11011 w/r reserved tx_amd_ bb_gain tx_amd_ rf_gain default 0 0 0 0 0 0 0 0 0 0 local 28 1 11100 reserved 0 0 0 0 0 0 0 1 0 0 local 31 1 11111 reserved 0 0 0 0 0 0 0 0 0 0
28 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver table 3. main address 0 (a[4:0] = 00000) table 4. main address 1 (a[4:0] = 00001, main address 0 d0 = 0) bit name bit location (d0 = lsb) description reserved d[9:5] reserved bitsset to default. mode[2:0] d[4:2] ic operating mode select. 000 = clockout (default) 001 = standby 010 = rx 011 = tx 100 = tx calibration 101 = rf loopback 11x = baseband loopback rfbw d1 rf bandwidth. 0 = 20mhz 1 = 40mhz (default) m/l_sel d0 main or local address select. 0 = main registers (default) 1 = local registers bit name bit location (d0 = lsb) description reserved d[9:8] reserved bitsset to default. lna_gain[2:0] d[7:5] lna gain control. active when rx channel is selected by correspond - ing rx_gain_prog_sel[5:1] bits in main address 6 d[9:5]. 000 = max - 40db 001 = max - 32db 100 = max - 24db (not tested, contact factory for coverage) 101 = max - 16db 110 = max - 8db 111 = max gain (default) vga_gain[4:0] d[4:0] rx vga gain control. active when rx channel is selected by corre - sponding rx_gain_prog_sel[5:1] bits in main address 6 d[9:5]. 00000 = min gain 00001 = min + 2db 01110 = min + 28db 01111 = min + 30db 1xxxx = min + 30db (default)
______________________________________________________________________________________ 29 max2851 5ghz, 5-channel mimo receiver table 5. main address 2 (a[4:0] = 00010, main address 0 d0 = 0) table 6. main address 3 (a[4:0] = 00011, main address 0 d0 = 0) table 7. main address 5 (a[4:0] = 00101, main address 0 d0 = 0) bit name bit location (d0 = lsb) description reserved d[9:7], d[4:0] reserved bitsset to default. lna_band[1:0] d[6:5] lna frequency band switch. 00 = 4.9ghz~5.2ghz 01 = 5.2ghz~5.5ghz (default) 10 = 5.5ghz~5.8ghz 11 = 5.8ghz~5.9ghz bit name bit location (d0 = lsb) description reserved d[9:8], d5 reserved bitsset to default. ts_en d7 temperature sensor enable. 0 = disable (default) 1 = enable except shutdown or clockout mode ts_trig d6 temperature sensor reading trigger. 0 = not trigger (default) 1 = trigger temperature reading ts_read[4:0] (readback only) d[4:0] spi readback only. temperature sensor reading. bit name bit location (d0 = lsb) description reserved d9, d2, d0 reserved bitsset to default. rssi_mux_sel[2:0] d[8:6] rssi output select. 000 = baseband rssi (default) 001 = do not use 010 = do not use 011 = do not use 100 = rx rf detector 101 = do not use 110 = pa power-detector mux output 111 = do not use
30 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver table 7. main address 5 (a[4:0] = 00101, main address 0 d0 = 0) (continued) table 8. main address 6 (a[4:0] = 00110, main address 0 d0 = 0) table 9. main address 9 (a[4:0] = 01001, main address 0 d0 = 0) bit name bit location (d0 = lsb) description rssi_rx_sel[2:0] d[5:3] baseband rssi rx channel select. 000 = not select (default) 001 = rx1 010 = rx2 011 = rx3 100 = rx4 101 = rx5 110 = do not use 111 = do not use rxhp d1 rx vga highpass corner select after rx turn-on. rxhp starts at 1 dur - ing rx gain adjustment and set 0 after gain is adjusted. 0 = 10khz highpass corner after rx gain is adjusted (default) 1 = 600khz highpass corner during rx gain adjustment bit name bit location (d0 = lsb) description rx_gain_prog_sel [5:1] d[9:5] rx channel gain programming select. select which rx channels are to be changed; gain is then determined by programming main address 1 d[7:0]. d9 selects rx5, d8 selects rx4, etc. 0 = not selected 1 = selected 1111 = default e_rx[5:1] d[4:0] rx mimo channel select. enable rx channels independently. d4 selects rx5, d3 selects rx4, etc. 0 = not selected 1 = select in rx, rf loopback, or tx calibration mode 11111 = default bit name bit location (d0 = lsb) description tx_gain[5:0] d[9:4] tx vga gain control. tx channel is selected by main address 9 d[3:0]. 000000 = min gain (default) 111111 = min gain + 31.5db reserved d[3:0] reserved bitsset to default.
______________________________________________________________________________________ 31 max2851 5ghz, 5-channel mimo receiver table 10. main address 14 (a[4:0] = 01110, main address 0 d0 = 0 table 11. main address 15 (a[4:0] = 01111, main address 0 d0 = 0) table 12. main address 16 (a[4:0] = 10000, main address 0 d0 = 0) table 13. main address 17 (a[4:0] = 10001, main address 0 d0 = 0) table 14. main address 18 (a[4:0] = 10010, main address 0 d0 = 0) bit name bit location (d0 = lsb) description e_clkout2 d9 clkout2 enable. 0 = disable 1 = enable except during shutdown mode (default) reserved d[8:2], d1 reserved bitsset to default. dout_sel d1 dout pin output select. 0 = pll lock detect (default) 1 = spi readback bit name bit location (d0 = lsb) description vas_trig_en d9 enable vco sub-band acquisition triggerred by syn_config_f[9:0] (main address 17) programming. 0 = disable for small frequency adjustment (i.e., ~100khz). 1 = enable for channel switching (default) reserved d[8:7] reserved bitsset to default. syn_config_n[6:0] d[6:0] integer divide ratio. 1000010 = default bit name bit location (d0 = lsb) description syn_config_f[19:10] d[9:0] fractional divide ratio msbs. 1110000000 = default bit name bit location (d0 = lsb) description syn_config_f[9:0] d[9:0] fractional divide ratio lsbs. 0000000000 = default bit name bit location (d0 = lsb) description reserved d[9:8] reserved bitsset to default. xtal_tune[7:0] d[7:0] crystal oscillator frequency tuning. 00000000 = min frequency 10000000 = default 11111111 = max frequency
32 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver table 15. main address 19 (a[4:0] = 10011, main address 0 d0 = 0) table 16. main address 21 (a[4:0] = 10101, main address 0 d0 = 0) bit name bit location (d0 = lsb) description reserved d[9:8] reserved bitsset to default. vas_relock_sel d7 vas relock select. 0 = start at sub-band selected by vas_spi[5:0] (main address 19 d5:d0) (default) 1 = start at current sub-band vas_mode d6 vco sub-band select. 0 = by vas_spi[5:0] (main address 19 d[5:0]) 1 = by on-chip vco autoselect (vas) (default) vas_spi[5:0] d[5:0] vco autoselect sub-band input. select vco subband when vas_ mode (main address 19 d6) = 0. select initial vco sub-band for auto - acquisition when vas_mode = 1. 000000 = min frequency sub-band 011111 = default 111111 = max frequency sub-band vas_adc[2:0] (readback only) d[8:6] read vco autoselect tune voltage adc output. active when vas_ vco_read (main address 27 d5) = 1. 000 = lower than lock range and at risk of unlock 001 = lower than acquisition range and maintain lock 010 or 101 = within acquisition range and maintain lock 110 = higher than acquisition range and maintain lock 111 = higher than lock range and at risk of unlock vco_band[5:0] (readback only) d[5:0] read the current acquired vco sub-band by vco autoselect. active when vas_vco_read (main address 27 d5) = 1. bit name bit location (d0 = lsb) description reserved d[9:8], d[4:0] reserved bitsset to default. die_id[2:0] (readback only) d[7:5] read revision id at main address 21 d[7:5]. active when die_id_read (main address 27 d9) = 1. 000 = pass1 001 = pass2
______________________________________________________________________________________ 33 max2851 5ghz, 5-channel mimo receiver table 17. main address 27 (a[4:0] = 11011, main address 0 d0 = 0) table 18. main address 28 (a[4:0] = 11100, main address 0 d0 = 0) bit name bit location (d0 = lsb) description die_id_read d9 die id readback select. 0 = main address 21 d[9:0] reads its own values (default) 1 = main address 21 d[7:5] reads revision id reserved d[8:6], d[4:0] reserved bitsset to default. vas_vco_read d5 vas adc and vco sub-band readback select. 0 = main address 19 d[9:0] reads its own values (default) 1 = main address 19 d[8:6] reads vas_adc[2:0]; main address 19 d[5:0] reads vco_band[5:0] bit name bit location (d0 = lsb) description reserved d[9:4] reserved bitsset to default. pa_bias_dly[3:0] d[3:0] pa_bias turn-on delay. 0000 = 0 fs 0001 = 0 fs 0010 = 0.5 fs 0011 = 1.0 f s (default) 1111 = 7.0 fs only default is tested; contact factory for test coverage.
34 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver table 19. local address 4 (a[4:0] = 00100, main address 0 d0 = 1) table 20. local address 27 (a[4:0] = 11011, main address 0 d0 = 1) bit name bit location (d0 = lsb) description rfdet_mux_sel[2:0] d[9:7] rf rssi channel selection. 000 = rx1 001 = rx2 010 = rx3 011 = rx4 100 = rx5 101 = do not use 110 = do not use 111 = not selected (default) reserved d[6:0] reserved bitsset to default. bit name bit location (d0 = lsb) description reserved d[9:3] reserved bitsset to default. tx_amd_bb_gain d2 tx calibration am detector baseband gain. 0 = minimum gain (default) 1 = minimum gain + 5db tx_amd_rf_gain d[1:0] tx calibration am detector rf gain. 00 = minimum gain (default) 01 = minimum gain + 14db rise at output 1x = minimum gain + 28db rise at output
______________________________________________________________________________________ 35 max2851 5ghz, 5-channel mimo receiver typical operating circuit crystal oscillator/ buffer phase-locked loop 1nf v cc_ucx gnd_vco byp_vco v cc_vco 1nf 0.1f 1f cpout- cpout+ 33pf 2.2nf 380 i pll loop filter 380 i enable rxbbq1- rxbbq1+ rxbbq2- rxbbq2+ rxbbi2- rxbbi2+ rssi rxbbi1- rxbbi1+ rxrf1- rxrf1+ 6.6pf 39pf 1nf 40mhz xtal xtal_cap xtal 1nf 1:2 v cc_lna1 0.1f v cc_bb1 1.0f v cc_xtal 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 68 67 lna1 txrf q lna2 txrf q lna3 txrf q lna4 txrf q txrf q am detector amd 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 clkout gnd + 1nf v cc_mxr1 1nf v cc_lna3 1nf v cc_mxr2 47pf pa_det 1nf v cc_lna4 1nf v cc_pa_bias pa_bias rxrf2- rxrf2+ 22pf 1:2 1:2 1:2 1:2 1:2 rxrf2 input rxrf3- rxrf3+ 22pf rxrf3 input rxrf4 input rxrf4- rxrf4+ 22pf rxrf5 input rxrf5- rxrf5+ gnd 22pf rxrf1 input 22pf txrf+ txrf- 1nf 2.2nh 0.75pf txrf output vcc_ucx 1nf v cc_lna2 0.1 f v cc_bb2 rxbbi5+ rxbbi5- rxbbq5+ rxbbq5- txbbi+ txbbi- txbbq+ txbbq- rxbbi4+ rxbbi4- rxbbq3- rxbbq3+ rxbbi3- rxbbi3+ din sclk cs rxbbq4- clkout2 dout v cc_dig rxbbq4+ 1nf v cc_lna5 lpf1/q1 lpf1/q3 lna5 txrf q lpf1/q5 amd lpf1/q4 lpf1/q2 90? 0? serial interface dout 0? 90? rssi max rf rssi pa_det lna1-5 lpf1/q1-5 bb rssi max2851
36 _____________________________________________________________________________________ max2851 5ghz, 5-channel mimo receiver package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code document no. 68 tqfn-ep t6800+2 21-0142 chip information process: bicmos
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 37 ? 2010 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. max2851 5ghz, 5-channel mimo receiver revision history revision number revision date description pages changed 0 1/10 initial release 1 3/10 modified ec table to support single-pass room test flow 2, 3, 5, 6C9
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