communication semiconductors mx909a application note using the mx909a in a continuous carrier system ?2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 208300159.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 1. introduction the description of the receive mode of the mx909a given on the data sheet is based on the existence of an rf carrier detect signal that is used as a trigger to initiate the mx909a?s signal acquisition process at the start of a received frame. some systems, however, transmit a continuous carrier, which is intermittently modulated with a data stream. on these types of systems, no change in received rf carrier level will occur with the start of the frame reception. for this reason, continuous carrier systems cannot use rf 'carrier detect' as a signal acquisition trigger for the mx909a. 2. baseband data detection a continuous carrier system will transmit an unmodulated carrier between data packets. therefore, differentiating between an unmodulated and modulated carrier can provide an effective means of determining the advent of a data packet. similarly, the detection of the transition from modulated to unmodulated carrier can provide an indication of the end of a data packet. in a continuous carrier system, the radio receiver output signal will be any of ? wideband noise (no rf carrier - out of range) ? silent (unmodulated rf carrier) ? modulated baseband carrier when no rf carrier is being received, the envelope at the discriminator output will be very wide due to the high rf gain yielding only wideband noise. it is assumed this case has been considered and so it will not be discussed further. when an unmodulated rf carrier is being received, the envelope at the discriminator output becomes very narrow (dc with low noise). as the data transmission starts, the modulated baseband carrier will appear causing the envelope to widen to the peak-to-peak amplitude of the received signal. a signal acquisition trigger can be developed by observing the envelope of the receiver output signal to indicate when the signal undergoes a transition from ?silent? (unmodulated rf carrier before a data frame is received) to ?data modulated? (rf carrier is modulated with data). the change of the envelope from small to large amplitude indicates its transition from ?silent? to a ?modulated baseband carrier? signal and can be used as a signal acquisition trigger. 3. envelope and end of packet detectors the mx909a contains circuits that can be used, with some external components, to create such a baseband data detector. in particular, it contains both positive and negative peak detectors with some holding capacitors (doc1 and doc2). (note: the two capacitors represent high source impedance nodes so attached external circuits must be of very high input impedance). these two peak detectors operate with different time constants according to the configured operating mode of the mx909a. an external circuit is described to provide the following functions: 1. use high input impedance voltage follower buffers to condition doc1 and doc2 signal voltages. 2. develop a ?peak envelope threshold signal? by adding a fixed offset voltage to the actual ?valley? doc2 capacitor voltage. 3. with hysteresis, compare the actual ?peak? doc1 capacitor voltage with the ?peak envelope threshold signal? developed above. when the comparator trips then envelope detect goes high to indicate that the signal acquisition process should be triggered. where a signal acquisition trigger is important at the start of frame reception, an end of packet detector is similarly helpful to force an ongoing frame reception process to abort due to lack of a data envelope. it is also useful to clearly demark the end of a packet so reliable detection of a new packet can occur. end of packet detection must respond slowly enough to ride through short signal fades.
using the mx909a in a continuous carrier system page 2 of 5 mx909a application note ?2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 208300159.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. a schematic diagram for both envelope detect and end of packet circuits is shown in figure 1. alternate circuit sections may be substituted so long as they provide an equivalent function. note that the forward bias drop of the choice of silicon or germanium diodes directly sets the magnitude of the ?peak envelope threshold level.? also note that the logic described with a truth table requires its input to continuously remain at a ?1? state for 3 bit times, nominal, before the endofpacket output will go to ?1?. + - + - >=10mohms input impedance doc2 doc1 100k 1meg 33k si = 0.6v ge = 0.3v envelopedetect 100k 100k 100k + - + - mc909a doc2, 19 doc1, 18 rxampout, 23 + - + - >=10mohms input impedance endofpacket bit times 1 2 3 4 5 6 7 8 9 10 11 logic input endofpacket 12 13 14 input input stable for (bit times) 0 don't care 1 < 3 1 > 3 output 0 0 1 logic truth table figure 1: envelope and end of packet detector circuit during its normal training process, the mx909a dynamically changes the time constant of the doc1 and doc2 capacitor voltages. different time constants are required when these node voltages are used in the described training trigger circuit. accordingly, the doc1 and doc2 time constants must be altered between two values when this training trigger is used; namely, (1) training trigger values and (2) normal mx909a training values. during an idle signal phase (unmodulated carrier), the training trigger time constant values are used to detect the start of carrier modulation using the described circuit. when a training trigger event occurs then the mx909a must be reconfigured with normal training time constants and then issue a training task e.g. sfs (search for frame synch). note that some delay may need to be inserted between the training trigger event and the time at which the training task is issued.
using the mx909a in a continuous carrier system page 3 of 5 mx909a application note ?2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 208300159.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 3.1 sequence actions table 1 describes the sequence of actions to be used immediately after reception of a data packet is completed. step operating phase action purpose 1 end of data packet has just been received so the receiver output will become ?silent.? configure the mx909a time constants to support the external trigger circuit. write the mx909a control register settings to configure levres (b3, b2) to lossy peak detect mode. this will make the doc1 and doc2 dynamic response quick, as needed, even after automatic level training occurs. 2 end of data packet has just been received so the receiver output will become ?silent.? configure the mx909a time constants to support the external trigger circuit. write a null task with the aqlev bit set to 1. its execution causes the doc1 and doc2 capacitors? differential voltage to be clamped to effectively reset the training trigger circuit. it also configures the mx909a doc1 and doc2 voltage time constants to the best values for training trigger circuit operation. 3 wait for env signal to rise. wait for the training trigger signal to rise. this event indicates mx909a signal acquisition should be started. 4 initiate mx909a signal acquisition. write the mx909a control register settings to configure levres (b3, b2) to peak averaging mode. when a subsequent related task is written to the mx909a this will configure it with time constant values usually appropriate for normal mobitex system operation. 5 initiate mx909a signal acquisition. write a null task to the mx909a with aqlev and aqbc set this is the "subsequent related task" mentioned above. its execution is the first part of the normal mx909a training process described in the data sheet. 6 11-bit time delay start a timer that will indicate when 11bit times have elapsed from the moment the previous task was issued. error rate is higher immediately after an aqbc and aqlev sequence is triggered. these erroneous bits could trigger the frame sync detection circuits. it is suggested that a sfh or sfs task is set ~ 12 bits after setting the aqlev and aqbc sequence. 7 search for frame sync write a sfh or sfs task to the mx909a cause the modem to search the received signal for a 16-bit sequence that matches the frame synchronization pattern. irq and bfree will be set when the frame sync has been found. 8 receive data issue a rdb task to the mx909a causes the modem to read the next 240 bits as a mobitex data block. the 18 bytes are placed in the data buffer and an indication is issued for the micro to read the data from the data buffer. 9 receive data repeat rdb task n times. n is the number of data blocks contained in the packet. 10 loss of signal continue rdb task start a timer if at any time in the middle of a rdb task eop equals 1, this may be may be an indication of a temporary loss of signal. the controlling device could 'ride out' the eop signal for up to 17 bit times before aborting
using the mx909a in a continuous carrier system page 4 of 5 mx909a application note ?2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 208300159.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. step operating phase action purpose 11 end of packet last block received write a null task to mx909a with aqbc set when the irq and bfree are set from the reception of the nth block (last data block of packet), there is the possibility of a concatenated packet coming in. the signal levels and dc offset are expected to match that of the previous packet. only aqbc is issued to make sure that the mx909a acquires proper clock synchronization. 12 read data from buffer to collect last block's data from buffer 13 11-bit time delay (same as step 6) start a timer that will indicate when 11bit times have elapsed from the moment the previous task was issued. error rate is higher immediately after an aqbc and aqlev sequence is triggered. these erroneous bits could trigger the frame sync detection circuits. it is suggested that a sfh or sfs task is set ~ 12 bits after setting the aqlev and aqbc sequence. 14 abort write a reset task to command register if at any time in steps 4 through 10 eop equals 1 for longer than 17 bit times, the current task should be aborted and return to step 1 (see note 1) 15 end of data packet has just been received so the receiver output will become ?silent.? configure the mx909a time constants to support the external trigger circuit. (same as step 1) write the mx909a control register settings to configure levres (b3, b2) to lossy peak detect mode. this will make the doc1 and doc2 dynamic response quick, as needed, even after automatic level training occurs. table 1: description of sequence actions to be used immediately after reception of a data packet is completed notes 1. the correct use of the eop signal depends on what the controller / mx909a are doing at the time. at the end of a frame, use it to enact thorough reacquisition. during a frame, it may be used to indicate possible poor blocks or total loss of signal. if halfway through a frame, the controlling device could 'ride out' the eop signal for up to 17 bit times, which is (the maximum number of bits in error that can be corrected by the fec bits) - (eop delay).
using the mx909a in a continuous carrier system page 5 of 5 mx909a application note ?2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 208300159.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 3.2 signal acquisition the signal acquisition process is represented on the state flow diagram shown in figure 2. start acquisition abort acquisition complete no baseband carrier read data @ else @else @else @else last block received irq issue a null task aqbc = 1 env = 1 issue null task aqlev = 1 aqbc = 1 start timer 1 always levres = lossy peak issue null task aqlev = 1 e n v = 0 & e o p = 1 i s s u e a r e s et t a s k env = 0 & eop = 1 start timer 2 continue rdb task i r q = 1 & b f r e e = 1 i s s u e a r d b t a s k e n v = 0 & e o p = 1 i s s u e a r e s e t t a s k timer 1= 11 bit times leves = peak aver. issue sfh or sfs task aqlev = 0 aqbc = 0 fade-ride e o p = 0 & e n v = 1 & t i m e r 2 = < 1 7 b i t - t i m e s c o n t i n u e r d b t a s k env = 0 & eop = 1 timer 2 > 17 bit-times figure 2: signal acquisition process state flow diagram 4. conclusion this document describes the implementation of a simple envelope and end of packet detector external circuit using the voltages produced by the level acquisition and tracking circuits inherent in the mx909a. the circuit observes the doc1 and doc2 voltages with a high impedance circuit to determine when the envelope of the received signal exceeds a pre-determined threshold level. this is used to trigger the signal acquisition procedure. the reduction of the incoming signal amplitude below a certain level with respect to the doc voltages provides an indication of the end of packet (it may also be caused by a temporary loss of signal). the detection of an end of packet is also useful to abort an ongoing frame reception process due to the lack of signal. it may also help to clearly de-mark the end of a packet so reliable detection of a new packet can occur. the outputs of the envelope and end of packet detector circuit will almost certainly directly drive pins on a microcontroller where they will affect system state transitions. it is possible to integrate some or all of the preceding functions into the microcontroller. the logic and monostable functions can be easily implemented in software. it is also relatively simple to sample doc1, doc2, and rxampout using adc with multiplexed input, as available in most processors. the entire decision making process can then be implemented using fuzzy decision software saving considerable external hardware.
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