cystech electronics corp. spec. no. : c871q8 issued date : 2014.06.30 revised date : page no. : 1/9 MTEA0N10Q8 cystek product specification n-channel enhancement mode power mosfet MTEA0N10Q8 bv dss 100v i d 5.6a r dson @v gs =10v, i d =4a 76m (typ) r dson @v gs =5.5v, i d =3a 90m (typ) features ? single drive requirement ? fast switching characteristic ? repetitive avalanche rated ? pb-free lead plating and halogen-free package symbol outline MTEA0N10Q8 sop-8 pin 1 g gate d drain s source ordering information device package shipping sop-8 MTEA0N10Q8-0-t3-g (pb-free lead plating and halogen-free package) 2500 pcs / tape & reel environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pcs / tape & reel, 13? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c871q8 issued date : 2014.06.30 revised date : page no. : 2/9 MTEA0N10Q8 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 100 gate-source voltage v gs 20 v continuous drain current @v gs =10v, t c =25 c (note 1) 5.6 continuous drain current @v gs =10v,t c =100c (note 1) 4.0 continuous drain current @v gs =10v,t a =25 c (note 2) 4.0 continuous drain current @v gs =10v,t a =100c (note 2) i d 2.8 pulsed drain current i dm 30 avalanche current i as 2 a avalanche energy @ l=1mh, i d =5.6a, r g =25 (note 2) e as 15.6 repetitive avalanche energy @ l=0.05mh (note 3) e ar 0.6 mj t c =25 (note 1) 6 t c =100 (note 1) 3 t a =25 (note 2) 3 total power dissipation t a =100 (note 2) p d 1.5 w operating junction and storage temperature range tj, tstg -55~+175 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 25 thermal resistance, junction-to-ambient, max (note 2) r th,j-a 50 c/w note : 1 . the power dissipation p d is based on t j(max) =175 c, using junction-to-case thermal resistance, and is more useful in setting the upper di ssipation limit for cases where additional heatsinking is used. 2 . the value of r ja is measured with the device mounted on 1 in 2 fr-4 board with 2 oz. copper, in a still air environment with t a =25 c. the power dissipation pdsm is based on r ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user?s specific board design, and the maximum temperature of 175 c may be used if the pcb allows it. 3 . repetitive rating, pulse width limited by junction temperature t j(max) =175 c. ratings are based on low frequency and low duty cycles to keep initial t j =25 c. characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 100 - - v v gs =0v, i d =250 a v gs(th) 2.0 3.0 3.5 v v ds = v gs , i d =250 a g fs *1 - 7 - s v ds =5v, i d =4a i gss - - 100 na v gs = 20v - - 1 v ds =80v, v gs =0v i dss - - 25 a v ds =80v, v gs =0v, tj=125 c - 76 100 m v gs =10v, i d =4a r ds(on) *1 - 90 130 m v gs =5.5v, i d =3a
cystech electronics corp. spec. no. : c871q8 issued date : 2014.06.30 revised date : page no. : 3/9 MTEA0N10Q8 cystek product specification characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions dynamic ciss - 361 - coss - 54 - crss - 20 - pf v gs =0v, v ds =25v, f=1mhz qg *1, 2 - 12 - qgs *1, 2 - 1.7 - qgd *1, 2 - 3.8 - nc v ds =50v, v gs =10v, i d =5.6a t d(on) *1, 2 - 22 - tr *1, 2 - 21 - t d(off) *1, 2 - 64 - t f *1, 2 - 35 - ns v ds =50v, i d =1a, v gs =10v, r gs =6 source-drain diode i s *1 - - 4 i sm *3 - - 16 a v sd *1 - 0.8 1.2 v i s =4a, v gs =0v trr - 30 - ns qrr - 18 - nc i f =4a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recommended soldering footprint
cystech electronics corp. spec. no. : c871q8 issued date : 2014.06.30 revised date : page no. : 4/9 MTEA0N10Q8 cystek product specification typical characteristics typical output characteristics 0 5 10 15 20 25 30 024681 0 brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v v ds , drain-source voltage(v) i d , drain current (a) 10v 9v 8v 7v v gs =6v v gs =5v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =4.5v v gs =6v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 02468 i dr , reverse drain current(a) v sd , source-drain voltage(v) 10 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 40 80 120 160 200 240 280 320 360 400 024681 0 drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 2.8 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =4a r ds( on) @tj=25c : 72m typ. v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =4a
cystech electronics corp. spec. no. : c871q8 issued date : 2014.06.30 revised date : page no. : 5/9 MTEA0N10Q8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =5v gate charge characteristics 0 2 4 6 8 10 02468101214 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =5.6a v ds =80v v ds =50v v ds =20v maximum safe operating area 0.01 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) t c =25c, tj=175c v gs =10v, jc =25c/w single pulse dc 100ms r dson limited 1s 100 s 1ms 10ms maximum drain current vs case temperature 0 1 2 3 4 5 6 7 25 50 75 100 125 150 175 200 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =25c/w
cystech electronics corp. spec. no. : c871q8 issued date : 2014.06.30 revised date : page no. : 6/9 MTEA0N10Q8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 5 10 15 20 25 30 0246810 v gs , gate-source voltage(v) i d , drain current(a) v ds =10v single pulse maximum power dissipation 0 100 200 300 400 500 600 700 800 900 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width(s) peak transient power (w) t j(max) =175c t c =25c jc =25c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0. 2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =25 c/w
cystech electronics corp. spec. no. : c871q8 issued date : 2014.06.30 revised date : page no. : 7/9 MTEA0N10Q8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c871q8 issued date : 2014.06.30 revised date : page no. : 8/9 MTEA0N10Q8 cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds 183 c 60-150 seconds time maintained above: ? temperature (t l ) 217 c ? time (t l ) 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c871q8 issued date : 2014.06.30 revised date : page no. : 9/9 MTEA0N10Q8 cystek product specification sop-8 dimension *: typical inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.1850 0.2007 4.70 5.10 i 0.0031 0.0110 0.08 0.28 b 0.1457 0.1614 3.70 4.10 j 0.0157 0.0323 0.40 0.83 c 0.2283 0.2441 5.80 6.20 k 0.0074 0.0102 0.19 0.26 d 0.0500* 1.27* l 0.0145 0.0204 0.37 0.52 e 0.0130 0.0201 0.33 0.51 m 0.0118 0.0197 0.30 0.50 f 0.1472 0.1527 3.74 3.88 n 0.0031 0.0051 0.08 0.13 g 0.0472 0.0638 1.20 1.62 o 0.0000 0.0059 0.00 0.15 h 0.1889 0.2007 4.80 5.10 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . marking: 8-lead sop-8 plastic package cystek packa g e code: q8 top view a b front view f c d e g i part a h j k o m l n right side view part a date code ea0 device name n 10
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