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pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 1 ?2008 micron technology, inc. all rights reserved. 152-ball x32 mobile lpddr (only) pop (ti-omap) features mobile lpddr (only) 152-ball package-on-p ackage (pop) ti-omap? mt46hxxxmxxlxcg mt46hxxxmxxlxkz features ?v dd / v ddq = 1.70?1.95v ? bidirectional data strobe per byte of data (dqs) ? internal, pipelined double data rate (ddr) architecture; 2 data accesses per clock cycle ? differential clock inputs (ck and ck#) ? commands entered on each positive ck edge ? dqs edge-aligned with data for reads; center- aligned with data for writes ? 4 internal banks for concurrent operation ? data masks (dm) for masking write data?one mask per byte ? programmable burst lengths (bls): 2, 4, 8, or 16 1 ? concurrent auto precharge option is supported ? auto refresh and self refresh modes ? 1.8v lvcmos-compatible inputs ? on-chip temperature sensor to control self refresh rate ? partial-array self refresh (pasr) ? deep power-down (dpd) ? status register read (srr) supported 2 ? selectable output drive strength (ds) ? clock stop capability ? 64ms refresh notes: 1. bl 16: contact factory for availability. 2. contact factory for remapped srr output. options marking ?v dd / v ddq ? 1.8v/1.8v h ? configuration ? 128 meg x 32 (16 meg x 16 x 4 banks x 4) ? 64 meg x 32 (8 meg x 32 x 4 banks x 2) ? 32 meg x 32 (8 meg x 32 x 4 banks) ? 16 meg x 32 (4 meg x 32 x 4 banks) 128m32 64m32 32m32 16m32 ?device version ? single die, standard addressing ? 2-die stack, standard addressing ? 4-die stack, standard addressing lf l2 l4 ?plastic ?green? package ? 152-ball vfbga (14 x 14 x 1.0mm) ? 152-ball vfbga (14 x 14 x 1.2mm) cg kz ? timing ? cycle time ? 5ns @ cl = 3 ? 5.4ns @ cl = 3 ? 6ns @ cl = 3 -5 -54 -6 ? operating temperature range ? commercial (0c to +70c) ? industrial (?40c to +85c) none it notes: 1. quad die stack. each cs configured with two x16 die connected in parallel to make up a 32-bit- wide bus. table 1: configuration addressing architecture 128 meg x 32 1 64 meg x 32 32 meg x 32 16 meg x 32 configuration 16 meg x 16 x 4 banks x 4 die 8 meg x 32 x 4 banks x 2 die 8 meg x 32 x 4 banks 4 meg x 32 x 4 banks refresh count 8k 8k 8k 8k row addressing 16k (a[13:0]) 8k (a[12:0]) 8k (a[12:0]) 8k (a[12:0]) column addressing 1k (a[9:0]) 1k (a[9:0]) 1k (a[9:0]) 512 (a[8:0])
pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 2 ?2008 micron technology, inc. all rights reserved. 152-ball x32 mobile lpddr (only) pop (ti-omap) part numbering information ? 152-ball pop part numbering information ? 152-ball pop micron ? 152-ball packaged lpddr devices are available in several configurations. figure 1: marketing part number example micron technology product family 46 = lpddr-sdram operating voltage h = 1.8v/1.8v configuration 128 meg x 32 64 meg x 32 32 meg x 32 16 meg x 32 device version lf = single die, standard addressing l2 = 2-die stack, standard addressing l4 = quad die, standard addressing design revision :a = first generation :b = second generation operating temperature blank = commercial (0c to +70c) it = industrial (C40c to +85c) cycle time -5 = 5ns t ck cl = 3 -54 = 5.4ns t ck cl = 3 -6 = 6ns t ck cl = 3 package code cg = 152-ball (14 x 14 x 1.0mm) vfbga kz = 152-ball (14 x 14 x 1.2mm) vfbga mt 46 h 32m32 lf cg -6 it :a
pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 3 ?2008 micron technology, inc. all rights reserved. 152-ball x32 mobile lpddr (only) pop (ti-omap) device marking device marking due to the size of the package, the micron-standard part number is not printed on the top of the device. instead, an abbreviated de vice mark consisting of a 5-digit alphanu- meric code is used. the abbreviated device marks are cross-referenced to the micron part numbers at the fbga part marking decoder site: www.micron.com/decoder . to view the location of the abbreviated mark on the device, refer to customer service note csn-11, ?product mark/label,? at www.micron.com/csn . table 2: 152-ball production marketing part numbers part numbers lpddr product physical part marking mt46h16m32lfcg-5:b 512mb ddr, x32, 200 mhz d9ktk mt46h16m32lfcg-5 it:b 512mb ddr, x32, 200 mhz d9ktl mt46h16m32lfcg-54:b 512mb ddr, x32, 185 mhz d9ktm mt46h16m32lfcg-54 it:b 512mb ddr, x32, 185 mhz d9ktn mt46h16m32lfcg-6:b 512mb ddr, x32, 166 mhz d9kgx mt46h16m32lfcg-6 it:b 512mb ddr, x32, 166 mhz d9kgz mt46h32m32lfcg-5:a 1gb ddr, x32, 200 mhz d9ktp mt46h32m32lfcg-5 it:a 1gb ddr, x32, 200 mhz d9kld mt46h32m32lfcg-54:a 1gb ddr, x32, 185 mhz d9ktq mt46h32m32lfcg-54 it:a 1gb ddr, x32, 185 mhz d9ktr mt46h32m32lfcg-6:a 1gb ddr, x32, 166 mhz d9khl mt46h32m32lfcg-6 it:a 1gb ddr, x32, 166 mhz d9jzj mt46h64m32l2cg-5:a 2 x 1gb ddr, x32, 200 mhz d9kts mt46h64m32l2cg-5 it:a 2 x 1gb ddr, x32, 200 mhz d9klf mt46h64m32l2cg-54:a 2 x 1gb ddr, x32, 185 mhz d9ktv mt46h64m32l2cg-54 it:a 2 x 1gb ddr, x32, 185 mhz d9ktw mt46h64m32l2cg-6:a 2 x 1gb ddr, x32, 166 mhz d9kjv mt46h64m32l2cg-6 it:a 2 x 1gb ddr, x32, 166 mhz d9kfj mt46h128m32l4kz-6 it es:a 4 1gb ddr, x32, 166 mhz z9kzl
pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 4 ?2008 micron technology, inc. all rights reserved. 152-ball x32 mobile lpddr (only) pop (ti-omap) general description general description micron 152-ball packaged mobile low-power ddr sdram (lpddr) devices contain either 1gb lpddr or 512mb lpddr die. the 1gb lpddr die is a high-speed cmos, dynamic random-access memory containing 1,073,741,824 bits. it is internally configured as a quad-bank dram. each of the x32?s 268,435,456-bit banks is organized as 8192 rows by 1024 columns by 32 bits. the 512mb lpddr die is a high-speed cmos, dynamic random-access memory containing 536,870,912 bits. it is internally configured as a quad-bank dram. each of the x32?s 134,217,728-bit banks is organized as 8192 rows by 512 columns by 32 bits. figure 2: functional block diagram ras# cas# row- address mux ck cs# we# ck# control logic column- address counter/ latch standard mode register extended mode register command decode address, ba0, ba1 cke address register i/o gating dm mask logic bank 0 memory array bank 0 row- address latch and decoder bank control logic bank 1 bank 2 bank 3 refresh counter 32 2 2 32 32 4 input registers 4 4 4 4 rcvrs 4 64 64 8 64 ck out data dqs mask data ck ck in drvrs mux dqs generator 32 32 32 32 32 64 dq0C dq31 dqs0, dqs1, dqs2, dqs3 4 read latch write fifo and drivers 1 col 0 col 0 sense amplifiers dm0, dm1, dm2, dm3 ck column decoder
pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 5 ?2008 micron technology, inc. all rights reserved. 152-ball x32 mobile lpddr (only) pop (ti-omap) ball assignments and descriptions ball assignments and descriptions figure 3: 152-ball vfbga ball assignments notes: 1. although not bonded to the die, these pi ns may be connected on the package substrate. 1 nc nc v ssq dq3 dq0 v ssq dq4 dm0 v dd nc nc nc nc nc nc nc nc nc nc dnu nc 1 2 nc nc dqs0 dq5 dq1 v ddq dq2 v ss nc nc nc v ss nc 1 nc v ss nc 1 nc nc nc nc nc 2 3 v ddq dq6 nc nc 3 4 dm1 dq7 nc nc 4 5 dq13 v ddq nc nc 5 6 dq15 dq9 v ss nc 1 6 7 v ssq dq14 nc 1 v ss 7 8 dq10 dqs1 nc nc 8 9 dq12 dq11 nc nc 9 10 dq16 dq8 nc nc 10 11 dq19 dq17 v ss v dd 11 12 ck dq18 rfu tq 12 13 v ss ck# cke1 v ss 13 14 dm2 v ssq v dd v ddq 14 15 v ddq dqs2 cke0 a13 15 16 dq21 v dd a10 v ssq 16 17 dq20 dq23 v ss v dd 17 18 dm3 dq22 we# ba0 18 19 dqs3 dq28 v ssq v ddq 19 20 nc nc dq24 dq25 dq27 v ssq a0 v ss a2 a1 v ddq a7 a8 v ss a5 cs1# cas# ba1 v ssq nc nc 20 21 nc nc dq26 dq29 dq31 v ddq dq30 v dd a3 a9 v ssq a6 a11 v dd a12 cs0# a4 ras# v ddq dnu nc 21 a b c d e f g h j k l m n p r t u v w y aa a b c d e f g h j k l m n p r t u v w y aa top view C ball down lpddr supply ground
pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 6 ?2008 micron technology, inc. all rights reserved. 152-ball x32 mobile lpddr (only) pop (ti-omap) ball assignments and descriptions notes: 1. balls marked rfu may or may not be connect ed internally. these balls should not be used. contact factory for details. table 3: ball assignments symbol type description a[13:0] input address inputs: specify the row or column addre ss. also used to load the mode registers. the maximum address is determined by density and co nfiguration. consult the lpddr product data sheet for the maximum address for a given density and configuration. unused address pins become rfu. 1 ba0, ba1 input bank address inputs: specify one of the 4 banks. cas# input column select: specifies the command to execute. ck, ck# ck is the system clock. ck and ck# are differential clock inputs. all addres s and control signals are sampled and referenced on the crossing of the ri sing edge of ck with the falling edge of ck#. cke0, cke1 input clock enable. cke0 is used for a single lpddr product. cke1 is used for dual lpddr products, and is considered rfu for single products. cs0#, cs1# input chip select: cs0# is used for a single lpddr product. cs1# is used for dual lpddr products, and is considered rfu for single products. dm[3:0] input data mask: determines which bytes are written during write operations. ras# input row select: specifies the command to execute. we# input write enable: specifies the command to execute. dq[31:0] input/ output data bus: data inputs/outputs. dqs[3:0] input/ output data strobe: coordinates read/write tr ansfers of data; one dqs per dq byte. tq output temperature sensor output: tq high when lpddr t j exceeds 85c. v dd supply v dd : lpddr power supply. v ddq supply v ddq : lpddr i/o power supply. v ssq supply v ssq : lpddr i/o ground. rfu 1 ? reserved for future use. table 4: non-device-specific ball assignments symbol type description v ss supply v ss : shared ground. dnu ? do not use: must be grounded or left floating. nc ? no connect: not internally connected.
pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 7 ?2008 micron technology, inc. all rights reserved. 152-ball x32 mobile lpddr (only) pop (ti-omap) electrical specifications electrical specifications stresses greater than those listed under ?absolute maximum ratings? may cause perma- nent damage to the device. this is a stress rating only, and functional operation of the device at these or any other conditions abov e those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. notes: 1. v dd and v ddq must be within 300mv of each other at all times. v ddq must not exceed v dd . table 5: absolute maximum ratings note 1 applies to all parameters in this table. parameters/conditions symbol min max unit v dd , v ddq s upply voltage re lative to v ss v dd , v ddq ?1.0 2.4 v voltage on any pin relative to v ss v in ?0.5 2.4 or (v ddq + 0.3v), whichever is less v storage temperature range ?55 +150 c table 6: recommended operating conditions parameters symbol min typ max unit supply voltage v dd 1.70 1.80 1.95 v i/o supply voltage v ddq 1.70 1.80 1.95 v operating temperature range commercial 0 ? +70 c industrial -40 ? +85 c
pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 8 ?2008 micron technology, inc. all rights reserved. 152-ball x32 mobile lpddr (only) pop (ti-omap) device diagrams device diagrams figure 4: 152-ball vfbga functional block diagram (non-quad die) cs# ck ck# cke ras# cas# we# address, ba0, ba1 v dd v ddq dm dq dqs tq v ss v ssq lpddr
pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 9 ?2008 micron technology, inc. all rights reserved. 152-ball x32 mobile lpddr (only) pop (ti-omap) device diagrams figure 5: 152-ball vfbga functional block diagram, quad die cs0# ck ck# cke0 ras# cas# we# address, ba0, ba1 v dd v ddq dm dq dqs tq v ss v ssq two x16 lpddr in parallel cs1# ck ck# cke1 ras# cas# we# address, ba0, ba1 v dd v ddq dm dq dqs tq v ss v ssq two x16 lpddr in parallel
pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 10 ?2008 micron technology, inc. all rights reserved. 152-ball x32 mobile lpddr (only) pop (ti-omap) package dimensions package dimensions figure 6: 152-ball vfbga package, 1.0mm (package code: cg) notes: 1. all dimensions are in millimeters. ball a1 id 0.6 0.1 seating plane 0.1 a a 1.0 max ball a1 id 0.65 typ 13 ctr 14 0.1 solder ball material: sac105. dimensions apply to solder balls post- reflow on ?0.35 smd ball pads. 152x ?0.46 0.35 min 13 ctr 14 0.1 0.65 typ 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 a b c d e f g h j k l m n p r t u v w y aa
8000 s. federal way, p.o. box 6, boise, id 83707-0006, tel: 208-368-3900 www.micron.com/productsupport customer comment line: 800-932-4992 micron and the micron logo are trademarks of micron technology, inc. all other trademarks are the property of their respective owners. 152-ball x32 mobile lpddr (only) pop (ti-omap) package dimensions pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 11 ?2008 micron technology, inc. all rights reserved. figure 7: 152-ball vfbga package, 1.2mm (package code: kz) notes: 1. all dimensions are in millimeters. ball a1 id 0.78 0.1 seating plane 0.1 a a 1.2 max ball a1 id 0.65 typ 0.65 typ 13 ctr solder ball material: sac105. dimensions apply to solder balls post- reflow on ?0.35 smd ball pads. 152x ?0.46 14 0.1 0.35 min 13 ctr 14 0.1 21 2019181716151413121110987654321 a b c d e f g h j k l m n p r t u v w y aa
pdf: 09005aef833913f1/source: 09005aef833913d6 micron technology, inc., reserves the right to change products or specifications without notice. ddr_mobile_sdram_only_152b_omap_pop.fm - rev. e 06/09 en 12 ?2008 micron technology, inc. all rights reserved. 152-ball x32 mobile lpddr (only) pop (ti-omap) revision history revision history rev. e, production. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6/09 ? table 3, ?ball assignments,? on page 6: deleted ball numbers. ? table 4, ?non-device-specific ball assignments,? on page 6: deleted ball numbers. ? table 5, ?absolute maximum ratings,? on page 7: added note. ? table 6, ?recommended operating conditions,? on page 7: updated symbol for i/o supply voltage. rev. d, preliminary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1/09 ? added 4gb option and updated these items to reflect the addition: ? ?mt46hxxxmxxlxkz? on page 1 ? ?options? on page 1 ? table 1, ?configuration addressing,? on page 1, including note 1 ? table 2, ?152-ball production marketing part numbers,? on page 3, part number ? figure 1: ?marketing part number example,? on page 2 ? figure 3: ?152-ball vfbga ball assignments,? on page 5 ? table 4, ?non-device-specific ball assignments,? on page 6 ? added figure 5: ?152-ball vfbga functional block diagram, quad die,? on page 9 ? added figure 7: ?152-ball vfbga package, 1.2mm (package code: kz),? on page 11. ? removed references to reduced-page-size devices. ? figure 4: ?152-ball vfbga functional block diagram (non-quad die),? on page 8: added parenthetic comment to title. ? figure 6: ?152-ball vfbga package, 1.0mm (package code: cg),? on page 10 and figure 7: ?152-ball vfbga package, 1.2mm (package code: kz),? on page 11: added package codes to figure titles. rev. c, preliminary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11/08 ? updated template and standards. ? added table 2, ?152-ball production marketing part numbers,? on page 3. rev. b, preliminary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5/08 ? added reduced page-size options (la and lg) to table 1, ?configuration addressing,? on page 1; figure 1: ?marketing part numb er example,? on page 2; ?general descrip- tion? on page 4. rev. a, preliminary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4/08 ?initial release.

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