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  (c) copyright au optroncis, inc. g121sn01 v.0 ver.0 1/28 2004 all right reserved. no reproduction and redistribution allowed. au optronics corporation product functional specifications 12.1 svga color tft-lcd module model name: g0121sn01 v.0 approved by prepared by martin sun cynthia lin gd- mdbu marketing division / au optronics croporation customer checked & approved by spec. no.: mdgd012-sn01-0 version: 0 total pages: 28 date: 2004- october-27
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 2/28 2004 all right reserved. no reproduction and redistribution allowed. version: 0 total pages: 28 date: 2004/10/27 product functional specification 12.1 inch svga color tft lcd module model name: g121sn01 v.0 ( u ) preliminary specification ( ) final specification note: this specification is subject to change without notice.
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 3/28 2004 all right reserved. no reproduction and redistribution allowed. i. contents 1.0 handling precautions .. 5 2.0 general description .6 2.1 display characteristics 2.2 functional block diagram 3.0 absolute maximum ratings ...8 4.0 optical characteristics 9 5.0 signal interface 12 5.1 connectors 5.2 signal pin 5.3 signal description 5.4 signal electrical characteristics 5.5 signal for lamp connector 6.0 pixel format image 16 7.0 parameter guide line ccfl inverter . ...17 8.0 interface timing.. 18 8.1 timing characteristics 8.2 timing definition 8.3 timing chart 9.0 power consumption ..22 10.0 power on/off sequence .23 11.0 reliability / safety requirement .. 24 11.1 reliability test conditions 11.2 safety 11.3 green 12.0 packing dimension . 25 13.0 mechanical characteristics ..26 13.1 lcm outline dimension (front view) 13.2 lcm outline dimension (rear view) 13.3 screw note
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 4/28 2004 all right reserved. no reproduction and redistribution allowed. ii. record of revision version and date page old description new description remark 0. 2004/10/27 all first draft all
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 5/28 2004 all right reserved. no reproduction and redistribution allowed. 1.0 handing precautions 1) since front polarizer is easily damaged, pay attention not to scratch it. 2) be sure to turn off power supply when inserting or disconnection from input connector. 3) wipe off water drop immediately. long contact with water may cause discoloration or spots. 4) when the panel surface is soiled, wipe it with absorbent cotton or other soft cloth. 5) since the panel is made of glass, it may break or crack if dropped or bumped on hard surface. 6) since cmos lsi is used in this module, take care of static electricity and insure human earth when handling. 7) do not open nor modify the module assembly. 8) do not press the reflector sheet at the back of the module to any directions. 9) in case if a module has to be put back into the packing container slot after once it was taken out from the container, do not press the center of the ccfl reflector edge. instead, press at the far ends of the cfl reflector edge softly. otherwise the tft module may be damaged. 10) at the insertion or removal of the signal interface connector, be sure not to rotate nor tilt the interface connector of the tft module. 11) after installation of the tft module into an enclosure, do not twist nor bend the tft module even momentary. at designing the enclosure, it should be taken into consideration that no bending/twisting forces are applied to the tft module from outside. otherwise the tft module may be damaged. 12) cold cathode fluorescent lamp in lcd contains a small amount of mercury. please follow local ordinances or regulations for disposal. 13) small amount of materials having no flammability grade is used in the lcd module should be supplied by power complied with requirements of limited power source, or be applied exemption. 14) the lcd module is designed so that the ccfl in it is supplied by limited current circuit. do not connect the cfl in hazardous voltage circuit.
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 6/28 2004 all right reserved. no reproduction and redistribution allowed. 2.0 general description this specification applies to the 12.1 inch color tft lcd module g121sn01 v.0. this module is designed for display units of industrial applications. the screen format is intended to support the svga (800(h) x 600(v)) screen and 262k colors (rgb 6-bits data driver). all input signals are lvds interface compatible. the module does not contain an inverter card for backlight. 2.1 display characteristics the following items are characteristics summary on the table under 25 condition items unit specifications screen diagonal [mm] 310 ( 12.1 ) active area [mm] 246.0(h) x 184.5(v) pixel h x v 800(x3) x 600 pixel pitch [mm] 0.3075(h) x 0.3075(v) pixel arrangement r.g.b. vertical stripe display mode normally white typical white luminance (icfl=6 ma) [cd/m 2 ] 400 typ. (center) contrast ratio 500 1 typ. optical rise time/fall time [msec] 10/25 typ. nominal input voltage vdd [volt] +3.3 typ. typical power consumption (vdd line + vcfl line) [watt] 7.8 typ weight [grams] 660 10 physical size [mm] 279.0(w) x 209.0(h) x 11(d) electrical interface lvds support color native 262k colors (rgb 6-bit driver) temperature range operating storage(shipping) [ ] [ ] -10 to +65 -30 to +70
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 7/28 2004 all right reserved. no reproduction and redistribution allowed. 2.2 functional block diagram the following diagram shows the functional block of the 12.1 inch color tft lcd module power block dc/dc 2 0 p i n c o n n e c t o r tcon auo(002e3) l v d s +3.3v power r s d s avdd (12v) gamma tft-lcd panel (800 3 600) source driver(8pcs) g a t e d r i v e r ( 2 p c s ) g1 . . . . . . . . g600 s1 s2400 vgh(27v) vgl(-6v) c o n t r o l s i g n a l r s d s vgma1~14 power block dc/dc 2 0 p i n c o n n e c t o r tcon auo(002e3) l v d s +3.3v power r s d s avdd (12v) gamma tft-lcd panel (800 3 600) source driver(8pcs) g a t e d r i v e r ( 2 p c s ) g1 . . . . . . . . g600 s1 s2400 vgh(27v) vgl(-6v) c o n t r o l s i g n a l r s d s vgma1~14
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 8/28 2004 all right reserved. no reproduction and redistribution allowed. 3.0 absolute maximum ratings absolute maximum ratings of the module is as follows item symbol min max unit conditions logic/lcd drive voltage vdd -0.3 +4.0 [volt] input voltage of signal vin -0.3 vdd+0.3 [volt] ccfl current icfl 4 7 [ma] rms 690 25 c ccfl lgnition voltage vs - 890 vrms 0 c operating temperature top -10 +65 [ ] note1 operating humidity hop 8 95 [%rh] note1 storage temperature tst -30 +70 [ ] note1 storage humidity hst 5 95 [%rh] note1 note1 maximum wet-bulb should be 39 and no condensation. tbd
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 9/28 2004 all right reserved. no reproduction and redistribution allowed. 4.0 optical characteristics the optical characteristics are measured under stable conditions as follows under 25 condition item unit conditions min. typ. max. horizontal (right) k = 10 (left) 70 70 viewing angle k contrast ratio [degree] [degree] [degree] [degree] vertical (upper) k = 10 (lower) 50 60 white uniformity 13 points 1.6 contrast ratio = 0 400 500 rising 10 20 response time (room temp) [msec] [msec] falling 25 30 red x tbd tbd tbd red y tbd tbd tbd green x tbd tbd tbd green y tbd tbd tbd blue x tbd tbd tbd blue y tbd tbd tbd white x 0.283 0.313 0.343 color chromaticity coordinates(cie) white y 0.299 0.329 0.359 white luminance (icfl 6ma) [cd/m 2 ] = 0 320 400
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 10/28 2004 all right reserved. no reproduction and redistribution allowed. note 1: definition of white uniformity: white uniformity is calculated with the following formula. luminance are measured at the following nine points (1~13). note 2: measurement method the lcd module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change during measuring. in order to stabilize the luminance, the measurement should be executed after lighting backlight for 30 minutes in a stable, windless and dark room. w = maximum brightness of thirteen points minimum brightness of thirteen points photodetector (bm-5a, bm-7 or equivalent) 50 cm tft-lcd module center of the screen lcd panel field=2
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 11/28 2004 all right reserved. no reproduction and redistribution allowed. note 3: definition of response time the output signals of bm-7 or equivalent are measured when the input signals are changed from black to white (falling time) and from white to black (rising time), respectively. the response time interval between the 10% and 90% of amplitudes. refer to figure as below. note 4: definition of contrast ration contrast ratio is calculated with the following formula. note 5: definition of viewing angle viewing angle is the measurement of contrast ratio R 10, at the screen center, over a 180 horizontal and 180 vertical range (off-normal viewing angles). the 180 viewing angle range is broken down as follows; 90 ( ) horizontal left and right and 90 ( ) vertical, high (up) and low (down). the measurement direction is typically perpendicular to the display surface with the screen rotated about its center to develop the desired measurement viewing angle. s i g n a l ( r e l a t i v e v a l u e ) "black" tr tf "white" "white" 0% 10 % 90 % 100 % contrast ratio (cr)= brightness on the white state brightness on the black state
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 12/28 2004 all right reserved. no reproduction and redistribution allowed. 5.0 signal interface 5.1 connectors physical interface is described as for the connector on module. these connectors are capable of accommodating the following signals and will be following components. connector name / designation for signal connector manufacturer jae type / part number fi-se20m or compatible mating connector / part number tbd connector name / designation for lamp connector manufacturer jst type / part number jst bhr-03vs-1 or compatible mating connector / part number jst sm03(4.0)b-bhs-1-tb 5.2 signal pin pin no. signal name pin no. signal name 1 vdd 2 vdd 3 gnd 4 gnd 5 rxin0- 6 rxin0+ 7 gnd 8 rxin1- 9 rxin1+ 10 gnd 11 rxin2- 12 rxin2+ 13 gnd 14 ckin- 15 ckin+ 16 gnd 17 nc 18 nc 19 nc 20 nc
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 13/28 2004 all right reserved. no reproduction and redistribution allowed. 5.3 signal description the module using a lvds receiver. lvds is a differential signal technology for lcd interface and high speed data transfer device. transmitter shall be sn75lvds84 (negative edge sampling) or compatible. note input signals shall be low or hi-z state when vdd is off. signal name description rxin0-, rxin0+ lvds differential data input (red0-red5, green0) rxin1-, rxin1+ lvds differential data input (green1-green5, blue0-blue1) rxin2-, rxin2+ lvds differential data input (blue2-blue5, hsync, vsync, de) ckin-, ckin+ lvds differential clock input vdd +3.3v power supply gnd ground nc no connection
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 14/28 2004 all right reserved. no reproduction and redistribution allowed. signal name description +red5 +red4 +red3 +red2 +red1 +red0 red data 5 (msb) red data 4 red data 3 red data 2 red data 1 red data 0 (lsb) red-pixel data red-pixel data each red pixel s brightness data consists of these 6 bits pixel data. +green5 +green4 +green3 +green2 +green1 +green0 green data 5 (msb) green data 4 green data 3 green data 2 green data 1 green data 0 (lsb) green-pixel data green-pixel data each green pixel s brightness data consists of these 6 bits pixel data. +blue5 +blue4 +blue3 +blue2 +blue1 +blue0 blue data 5 (msb) blue data 4 blue data 3 blue data 2 blue data 1 blue data 0 (lsb) blue-pixel data blue-pixel data each blue pixel s brightness data consists of these 6 bits pixel data. clk data clock the typical frequency is 40mhz. the signal is used to strobe the pixel data and de signals. all pixel data shall be valid at the falling edge when the de signal is high. de display timing this signal is strobed at the falling edge of clk. when the signal is high, the pixel data shall be valid to be displayed. vsync vertical sync the signal is synchronized to clk. hsync horizontal sync the signal is synchronized to clk. note output signals from any system shall be low or hi-z state when vdd is off.
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 15/28 2004 all right reserved. no reproduction and redistribution allowed. 5.4 signal electrical characteristics input signals shall be low or hi-z state when vdd is off. it is recommended to refer the specifications of sn75lvds86(texas instruments) in detail. signal electrical characteristics are as follows item symbol min. typ. max. unit the differential level vid 0.25 0.35 0.45 v the common mode input voltage vic 1.125 1.25 1.375 v the input setup time tsu -0.6 - 0.6 ns the input hold time thd 11.74 - 50 ns high-level input voltage v iap 2.0 v low-level input voltage v iam 0.8 v clock frequency clk 20 85 mhz
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 16/28 2004 all right reserved. no reproduction and redistribution allowed. 5.5 signal for lamp connector note: cn2 connector (backlight): jst bhr-03vs-1 mating connector: jst sm03(4.0)b-bhs-1-tb pin no. symbol function remark 1 h ccfl power supply (h.v.) cable color: pink 2 nc no connection 3 l ccfl power supply (gnd) cable color: white 6.0 pixel format image following figure shows the relationship of the input signals and lcd pixel format r g b r g b r g b r g b r g b r g b r g b r g b 1 2 799 800 1st line 600th line
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 17/28 2004 all right reserved. no reproduction and redistribution allowed. 7.0 parameter guide line for ccfl inverter parameter min typ max units condition white luminance 320 400 - cd/m 2 at 6ma icfl ccfl current (icfl) tbd 6 tbd marms note1 ccfl frequency (fcfl) 40 55 80 khz note4 690 note1 ccfl ignition voltage (vs) - - 890 vrms note3 cfl voltage (reference) (vcfl) tbd 530 tbd vrms note1 ccfl power consumption (pcfl) tbd 3.2 tbd w note2 lamp life time - 50,000 - hr note1, 5 note1 t=25 note2 inverter should be designed with the characteristic of lamp. when you are designing the inverter, the output voltage of the inverter should comply with the following conditions. (1) the area under the positive and negative cycles of the waveform of the lamp current and lamp voltage should be area symmetric (the symmetric ratio should be larger than 90%). (2) there should not be any spikes in the waveform. (3) the waveform should be sine wave as possible. (4) lamp current should not exceed the maximum value within the operating temperature (it is prohibited to over the maximum lamp current even if operated in the non-guaranteed temperature). when lamp current is over the maximum value for a long time, it may cause fire. therefore, it is recommend that the inverter should have the current limit circuit. note3 the inverter open voltage should be designed larger than the lamp starting voltage at t=0 o c, otherwise backlight may be blinking for a moment after turning on or not be able to turn on. the open voltage should be measured after ballast capacitor. if an inverter has shutdown function it should keep its open voltage for longer than 1 second even if lamp connector is open. note4 lamp frequency may produce interference with horizontal synchronous frequency and this may cause line flow on the display. therefore lamp frequency shall be detached from the horizontal synchronous frequency and its harmonics as far as possible in order to avoid interference. note5 brightness (icfl=6ma) to be decreased to the 50% of the initial value.
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 18/28 2004 all right reserved. no reproduction and redistribution allowed. 8.0 interface timings basically, interface timing should match the vesa 800x600 /60hz(vg901101) manufacturing guide line timing. 8.1 timing characteristics (a) de mode item symbol min. typ. max. unit remark clock frequency fck 30 40 50 mhz horizontal blanking thb1 160 256 260 clk vertical blanking tvb1 28 28 28 th (b) hv mode item symbol min. typ. max. unit remark clock frequency fck 30 40 50 mhz hsync period th 960 1056 1060 clk hsync active thsd 800 clk hsync front porch thf 114 210 214 clk hsync pulse width + back porch thw + thb 46 46 46 clk hsync blanking thb1 160 256 260 clk vsync period tv 628 628 628 th vsync active tvsd 600 th vsync front porch tvf 1 1 1 th vsync pulse width + back porch tvw + tvb 27 27 27 th hsync/vsync phase shift ths 2 th
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 19/28 2004 all right reserved. no reproduction and redistribution allowed. item symbol value unit description horizontal display start the 46 clk after falling edge of hsync, counting 218clk, then getting valid data from 219th clk s data. vertical display start tve 1 th after falling edge of vsync, counting 25th, then getting 26th th s data.
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 20/28 2004 all right reserved. no reproduction and redistribution allowed. 8.2 timing definition
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 21/28 2004 all right reserved. no reproduction and redistribution allowed. 8.3 timing chart
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 22/28 2004 all right reserved. no reproduction and redistribution allowed. 9.0 power consumption input power specifications are as follows symbol parameter min typ max units condition module vdd logic/lcd drive voltage 3.0 3.3 3.6 v load capacitance 20uf pdd vdd power - 1.4 - w all black pattern pdd max vdd power max - 1.56 - w max pattern note idd idd current - 424 - marms 64 grayscale pattern note 1 idd max idd current max - 473 - marms vertical stripe line pattern note 2 v rp power ripple voltage - 100 - mvp-p i rush inrush current - 1500 - mapeak lamp icfl ccfl current - 6 - marms vcfl ccfl voltage (referance) - 530 - v pcfl ccfl power consumption - 3.2 - w ta=25 total power consumptio 7.8 watt (w/o inverter, all black pattern) @lcm circuit 1.4 w (typ.), b/l input 6.4w (typ.) note 1: effective value (marms) at v cc = 3.3 v/25 . note 2: idd max (0) 64 black (7) 64 black vertical stripe line
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 23/28 2004 all right reserved. no reproduction and redistribution allowed. 10.0 power on/off sequence vdd power and lamp on/off sequence is as follows. interface signals are also shown in the chart. signals from any system shall be hi-z state or low level when vdd is off.
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 24/28 2004 all right reserved. no reproduction and redistribution allowed. 11.0 reliability / safety requirement 11.1 reliability test conditions test tem test condition remark high temperature storage 70 , 240hrs note 1, 2, 3 low temperature storage -30 , 240hrs note 1, 2, 3 high temperature & high humidity operation 40 , 90%rh, 240hrs (no condensation) note 1, 2, 3 high temperature operation 65 , 240hrs note 1, 2, 3 low temperature operation -10 , 240hrs note 1, 2, 3 electrostatic discharge (non-operation) 150 pf,150 ,10kv,1 second, 9 position on the panel, 10 times each place note 3 vibration (non-operation) sinusoidal vibration,1.5 g zero-to-peak, 50 to 500 hz, 0.5 octave/minute. the test duration shall be one sweep from 50 to 500 to 50 hz in each of three mutually perpendicular axes note 1, 2, 3 mechanical shock (non-operation) 50g/11ms, x, y, z, half-sin, one time note 1, 2, 3 thermal shock (non-operation) 1. -30 3 30minutes 70 3 30minutes 2. 100 cycles 3. temperature transition time within 5 minutes note 1, 2, 3 note 1 : evaluation should be tested after storage at room temperature for one hour. note 2 : there should be no change which might affect the practical display function when the display quality test is conducted under normal operating condition. note 3 : judgement: 1. function ok 2. no serious image quality degradation
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 25/28 2004 all right reserved. no reproduction and redistribution allowed. 11.2 safety ul 11.3 green 12.0 packing dimension: 1. max. capacity: 20pcs lcd modules / per carton 2. max. weight: tbd kg / per carton 3. the outside dimension of carton is tbd lead (pb) free & rohs in taiwan and in europe
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 26/28 2004 all right reserved. no reproduction and redistribution allowed. 13.0 mechanical characteristics 13.1 lcm outline dimension (front view)
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 27/28 2004 all right reserved. no reproduction and redistribution allowed. 13.2 lcm outline dimension (rear view)
(c) copyright au optroncis, inc. g121sn01 v.0 ver.0 28/28 2004 all right reserved. no reproduction and redistribution allowed. 13.3 screw note tbd


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