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??????? china.maximintegrated. com/MAX5986A/max5987a.related ?? ieee is a registered service mark of the institute of electrical and electronics engineers, inc. wimax is a registered certification mark and registered service mark of wimax forum. MAX5986A/max5987a??(poe)??ieee ? 802.3af?class 1 pd??? MAX5986A/max5987a??dc-dc? pd???????pd max5987a??MAX5986A?? ??? pd?????class 1? pd?????mosfet60ma ( )??201ma (?)? ??dc-dc?????? ?????????? 8.7v60v??1.15a?? ?3.84w?dc-dc?275khz ?????????? ?? ??(uvlo)????? ????????? ??/????? ????? ??? MAX5986A/max5987a16?5mm x 5mmtqfn ? - 40 c + 85 c?? ? ieee 802.3af? ip ? ip? wimax ? ? s ieee 802.3af s poe class 1? s ???? s ?dc-dc?(?) s 8.7v60v?? s 3.0v5.6v?? s ? s ?275khz? s ???? s ? s ?reset(max5987a) s ???? s ? s ?? s tvs????(cde) s ?ldo???100ma? (max5987a) s ?3.3v???? s 49ma (?)? s ??2kv200m cat-6? 19-6261; rev 0; 4/12 ??????????????? ?????maxim?10800 852 1249 ()10800 152 1249 () maxim?china.maximintegrated.com MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc?
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 2 junction-to-ambient thermal resistance (q ja ) .............. 35c/w junction-to-case thermal resistance (q jc ) .................. 2.7c/w absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics (note 2) electrical characteristics (v dd = 48v, r sig = 24.9k, led, v cc , sl, ulp, wk, reset, ldo_out unconnected, wad = ldo_en = ldo_in = pgnd = gnd, c1 = 68nf, c2 = 10f, c3 = 1f (see figure 3), v fb = v aux = 0v, lx unconnected. all voltages are referenced to gnd, unless otherwise noted. t a = t j = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) (note 3) note 2: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to china.maximintegrated.com/thermal-tutorial. note 1: see figure 1, test circuit. (all voltages referenced to gnd, unless otherwise noted.) v dd to gnd ........................................................... -0.3v to +70v (100v, 100ms, r test = 3.3k) (note 1) v cc , wad, rref to gnd ........................ -0.3v to (v dd + 0.3v) aux, ldo_in, led to gnd .................................... -0.3v to 16v ldo_out to gnd .............................. -0.3v to (ldo_in + 0.3v) ldo_fb to gnd ...................................................... -0.3v to +6v lx to gnd ................................................ -0.3v to (v cc + 0.3v) ldo_out, vdrv, fb, reset, wk, sl, ulp, to gnd .............................................................. -0.3v to +6v vdrv to v dd ............................................ -0.3v to (v dd + 0.3v) pgnd to gnd ...................................................... -0.3v to +0.3v lx total rms current ........................................................... 1.6a continuous power dissipation (t a = + 70nc) tqfn (derate 28.6mw/nc above +70nc) .............. 2285.7mw operating temperature range .......................... -40nc to +85nc junction temperature .................................................... .+150nc storage temperature range ............................ -65nc to +150nc lead temperature (soldering, 10s) ............................... .+300nc soldering temperature (reflow) ...................................... +260nc parameter symbol conditions min typ max units power device (pd) interface detection mode input offset current i offset v vdd = 1.4v to 10.1v. (note 3) 10 fa effective differential input resistance dr v vdd = 1.4v to 10.1v with 1v step, (note 4) 23.95 25 25.5 ki classification mode classification enable threshold v th,cls,en v dd rising 10.2 11.4 12.5 v classification disable threshold v th,cls,dis v dd rising 22 22.9 23.6 v classification stability time 0.2 ms classification current i class v dd = 12.6v to 20v 9.12 10.51 11.88 ma power mode v dd supply voltage range v dd 60 v v dd supply current i dd v cc = 60v 3 4.5 ma v dd turn-on voltage v on v dd rising MAX5986A 34.3 35.4 37.6 v max5987a 37.2 38.7 40 v dd turn-off voltage v off v dd falling 30 31.5 v
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 3 electrical characteristics (continued) (v dd = 48v, r sig = 24.9k, led, v cc , sl, ulp, wk, reset, ldo_out unconnected, wad = ldo_en = ldo_in = pgnd = gnd, c1 = 68nf, c2 = 10f, c3 = 1f (see figure 3), v fb = v aux = 0v, lx unconnected. all voltages are referenced to gnd, unless otherwise noted. t a = t j = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) (note 3) parameter symbol conditions min typ max units v dd turn-on/off hysteresis v hyst_uvlo (note 5) MAX5986A 4 v max5987a 7.2 v dd deglitch time t off_dly v dd falling from 40v to 20v (note 5) 100 116 135 fs inrush to operating mode delay t delay t delay = time from a (v dd - v cc ) 1.5v to 0v step to dc-dc converter turn-on 75 90 110 ms isolation power mosfet on-resistance r on_iso i vcc = 100ma t j = +25nc 1.1 i t j = +85nc 1.4 1.7 poe mps current threshold tbd 30 tbd ma poe mps output average current 2.5 3 3.5 ma current limit inrush current limit i inrush during initial turn-on period, v dd C v cc = 4v, measured at v cc 39 49 60 ma current limit during normal operation i lim after inrush completed, v cc = v dd - 1.5v, measured at v cc 180 201 220 ma wad detection rising threshold v wad_rise 8.8 v wad detection falling threshold v wad_fall 8.2 v wad detection hysteresis tbd v wad input current i wad v wad = 24v 100 fa internal regulator with back bias vaux input voltage range v aux inferred from v aux input current 4.75 14 v v aux input current v aux from 4.75v to 14v 1 2 tbd ma v drv output voltage 4.5 5.5 v sleep mode (MAX5986A) wk and ulp logic threshold v th v /wk falling and v /ulp rising and falling 1.9 2.25 2.7 v sl logic threshold falling 0.55 0.6 0.65 v sl current v sl = 0v 12.5 fa led current amplitude i led r sl = 60.4ki, v led = 6.5v 9.6 10.7 11.8 ma r sl = 30.2ki, v led = 6.5v 19.2 21.4 23.5 r sl = 30.2ki, v led = 3.5v 19 led current programmable range 10 20 ma led current with grounded sl v sl = 0v 20.6 26.4 31.4 ma led current frequency f iled sleep and ultra-low power modes 250 hz led current duty cycle d iled sleep and ultra-low power modes 25 %
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 4 electrical characteristics (continued) (v dd = 48v, r sig = 24.9k, led, v cc , sl, ulp, wk, reset, ldo_out unconnected, wad = ldo_en = ldo_in = pgnd = gnd, c1 = 68nf, c2 = 10f, c3 = 1f (see figure 3), v fb = v aux = 0v, lx unconnected. all voltages are referenced to gnd, unless otherwise noted. t a = t j = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) (note 3) parameter symbol conditions min typ max units v cc current amplitude i vcc sleep mode, v led = 6.5v 10 12 14 ma internal current duty cycle d ivdd sleep and ultra-low power modes 75 % internal current enable time t mps ultra-low power mode 76 87 98 ms internal current disable time t mpdo ultra-low power mode 205 235 265 ms thermal shutdown thermal shutdown threshold t sd t j rising 143 nc thermal shutdown hysteresis t sd,hys 16 nc ldo (max5987a) input voltage range inferred from line regulation 4.5 14 v output voltage ldo _fb = v drv 3.1 3.3 3.5 v max output voltage setting with external divider to ldo_fb 5.5 v ldo fb regulation voltage 1.19 1.224 1.255 v ldo fb leakage current -1 +1 fa dropout v ldo_in = 5v, v ldo_fb = v drv , i load = 80ma 600 mv load regulation i load from 1ma to 80ma 0.2 0.5 0.8 mv/ma line regulation ldo_in from 4.5v to 14v 2 3 mv/v noise tbd tbd overcurrent protection threshold i ovc 85 ma ldo_fb rising threshold 2 v ldo_fb hysteresis 1 v dc-dc converter input supply v cc voltage range v cc v wad = v cc = v dd 7.8 60 v power mosfets high-side pmos on-resistance r dson-h i lx = 0.5a (sourcing) t a = +25nc 0.5 tbd i low-side nmos on-resistance r dson-l i lx = 0.5a (sinking) t a = +25nc 0.15 tbd i lx leakage current i lx-lkg v dd = v cc = 28v, t a = +25 o c, v lx = (v pgnd + 1v) to (v cc - 1v) 5 fa soft-start (ss) soft-start time t ss-th 7.45 ms feedback (fb) fb regulation voltage v fb-rg tbd 1.224 tbd v fb input bias current i fb v fb = 1.224v, t a = +25 o c 10 200 na
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 5 electrical characteristics (continued) (v dd = 48v, r sig = 24.9k, led, v cc , sl, ulp, wk, reset, ldo_out unconnected, wad = ldo_en = ldo_in = pgnd = gnd, c1 = 68nf, c2 = 10f, c3 = 1f (see figure 3), v fb = v aux = 0v, lx unconnected. all voltages are referenced to gnd, unless otherwise noted. t a = t j = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) (note 3) parameter symbol conditions min typ max units output voltage output voltage range v out 3.0 5.6 v cycle by cycle overvoltage protection v out-ov rising 102.3 105 107.6 % falling 98.6 101.25 103.7 internal compensation network compensation network zero- resistance r zero 200 ki compensation network zero- capacitance c zero 150 pf current limit peak current-limit threshold i peak-limit tbd 1.6 tbd a runaway current-limit threshold i runaway- limit 1.6 1.8 2 a valley current-limit threshold i valley- limit 0.9 1.1 1.3 a zx threshold i zx 25 ma timings switching frequency f sw 245 275 305 khz frequency foldback f sw-fold 122.5 137.5 152.5 khz consecutive zx events for entering foldback 8 events consecutive zx events for exiting foldback 8 events v out undervoltage trip level to cause hiccup v out-hicf after soft-start completed 58 60 62 % hiccup timeout 120 ms minimum on-time t on-min tbd tbd ns maximum duty cycle d max 100 % lx dead time 14 ns reset (max5987a) v fb threshold for reset assertion v fb-okf v fb falling (note 6) 87.75 90 92.25 % v fb threshold for reset deassertion v fb-okr v fb rising (note 6) 92.6 95 97.4 % v ldo_fb threshold for reset assertion v ldo_ fb-okf v ldo_fb falling, ldo_fb = v drv , (note 7) tbd tbd tbd %
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 6 electrical characteristics (continued) (v dd = 48v, r sig = 24.9k, led, v cc , sl, ulp, wk, reset, ldo_out unconnected, wad = ldo_en = ldo_in = pgnd = gnd, c1 = 68nf, c2 = 10f, c3 = 1f (see figure 3), v fb = v aux = 0v, lx unconnected. all voltages are referenced to gnd, unless otherwise noted. t a = t j = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) (note 3) note 3: all devices are 100% production tested at t a = +25c. limits over temperature are guaranteed by design. note 4: the input offset current is illustrated in figure 2. note 5: effective differential input resistance is defined as the differential resistance between v dd and gnd, see figure 2. note 6: a 20v glitch on input voltage, which takes v dd below v on shorter than or equal to t off_dly does not cause the device to exit power-on mode. note 7 referred to feedback regulation voltage. note 8: referred to ldo feedback regulation voltage. note 9: the wad detection rising and falling thresholds control the isolation power mos transistor. to turn the dc-dc on in wad mode, the wad must be detected and the v dd must be within the v dd voltage range. ?1. MAX5986A/max5987a?tvs ?2. ?? parameter symbol conditions min typ max units v ldo_fb threshold for reset deassertion v ldo_ fb-okr v ldo_fb rising, ldo_fb = v drv , (note 7) tbd tbd tbd % reset deassertion delay after fb reaches 95% regulation 3.72 ms reset output voltage low i sink = 1ma 0.1 0.2 v reset leakage current -10 +10 fa i in i ini + 1 i ini i offset dr i 1v v ini v ini + 1 i offset = i ini - v ini dr i dr i = (v ini + 1 - v ini ) = 1v (i ini + 1 - i ini ) (i ini + 1 - i ini ) v in evaluation board 1ms /1 0ms / 100ms r test MAX5986A 100 v
maxim integrated 7 MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? ? (t a = +25c, unless otherwise noted.) detection current vs. input voltage MAX5986A toc01 input voltage (v) detection current (ma) 8.9 7.4 5.9 4.4 2.9 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0 1.4 10.1 quiescent current vs. supply voltage (ultra-low power mode) MAX5986A toc02 supply voltage (v) quiescent current (ma) 55 50 45 40 2.75 3.00 3.25 3.50 3.75 4.00 2.50 35 60 signature resistance vs. supply voltage MAX5986A toc03 supply voltage (v) differential resistance (ki) 7.4 5.9 4.4 2.9 23 24 25 26 27 28 22 1.4 10.1 8.9 input offset current vs. input voltage MAX5986A toc04 supply voltage (v) offset current (a) 7.4 5.9 4.4 2.9 -2 -1 0 1 2 3 -3 1.4 10.1 8.9 classification settling time MAX5986A toc06 v dd 10v/div gnd i dd 10ma /div 0ma 400s/div classification current vs. input voltage MAX5986A toc05 input voltage (v) classification current (ma) 18.6 17.1 15.6 14.1 10.42 10.44 10.46 10.48 10.50 10.52 10.54 10.56 10.58 10.60 10.40 12.6 20.0 inrush current limit vs. v cc voltage MAX5986A toc07 v cc (v) inrush current (ma) 42 36 30 24 18 12 6 44 48 52 56 60 40 04 8
maxim integrated 8 ?() (t a = +25c, unless otherwise noted.) MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? led current vs. r sl MAX5986A toc08 r sl (ki) led current (ma) 70 60 50 40 30 20 12 18 20 24 28 8 10 80 led current vs. led voltage MAX5986A toc09 led voltage (v) led current (ma) 5.25 3.50 1.75 10 15 20 25 5 0 7.00 r sl = 30.2ki r sl = 60.4ki efficiency vs. load current (v out = 5v) MAX5986A toc10 load current (ma) efficiency (%) 700 600 400 500 200 300 100 55 60 65 70 75 80 85 90 95 100 50 0 800 v dd = 57v v wad = 12v v dd = 48v aux connected to v out 5v load transient (0% to 50%) MAX5986A toc11 v out ac-coupled 50mv/div i out 500ma /div 0a 100s/div dc-dc converter startup i out = 0a MAX5986A toc13 v out 1v/div v gnd 2ms/div 5v load transient (50% to 100%) MAX5986A toc12 v out ac-coupled 50mv/div i out 500ma /div 0a 100s/div dc-dc converter startup r out = 6.67i MAX5986A toc14 v out 1v/div v gnd 2ms/div
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 9 ? MAX5986A max5987a 1 1 aux ????v drv ???4.75vaux buck????????? 2 2 lx ??dc-dc??? 3 led led??led?(i led )??250hz???25% 4 wk ????wk?50k ??5v??wk??? ????(??) 5 5 fb ldo???ldo_ingndldo_ingnd? 1f? 6, 10, 11 6, 9, 10 gnd ldoldo_outgnd?1 f? 15 16 14 13 6 5 7 lx wk 8 aux gnd ulp wad 12 v cc 4 12 11 9 pgnd rref *ep *ep *exposed pad, connect to gnd *exposed pad, connect to gnd sl vdrv gnd fb + led gnd 3 10 v dd tqfn MAX5986A top view 15 16 14 13 6 5 7 lx ldo_out 8 aux reset gnd wad 12 v cc 4 12 11 9 pgnd rref ldo_fb vdrv gnd fb + ldo_in gnd 3 10 v dd tqfn max5987a
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 10 ?() MAX5986A MAX5986A 5 5 fb dc-dc???fbgnd???? ? 6, 10, 11 6, 9, 10 gnd ?????????(fb?gnd?) 7 7 vdrv ?5v????mosfet??5vv drv gnd??v drv ?v drv gnd?1 f? 8 sl ????sl????slgnd??? (r sl )led(i led ) 9 ulp ?????ulp?50k ?5v??ulp????sl ????????????????? ??????mps 12 12 wad ????wadgnd??8.8v???? ????pmosfet?????? ??wad?gnd 13 13 v dd ??v dd pgnd?68nf()? 14 14 v cc dc-dc???v dd ?pmosfetv cc v cc pgnd? 10 f?1 f??? 15 15 pgnd ??dc-dc?????pgndgnd?pgnd? ??? 16 16 rref ?24.9k ?(r sig )gnd 8 ldo_fb ldo??v drv ??3.3v?ldoldo_outgnd? ?????ldo 11 reset ?reset ldo_outfb???90% reset ? ?ldo_outfb?95%100 sreset ???? ??? ep ????
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 11 ?? pd? MAX5986A/max5987a??????pd? ieee 802.3af?1pd??? ???pse??mosfet? buck????MAX5986A/max5987a ????10 a???(uvlo) ?????????? ????????/?? ??? ?? MAX5986A/max5987a v dd ??? ?????????????? v dd ?1.4v10.1v???v dd ?12.6v 20v??????v on ? ??? ??(1.4v v dd 10.1v) ??MAX5986A/max5987a?v dd ? ??(pse)v dd ?? 1.4v10.1v???1vpse ?k?24.9k rrefgnd ?24.9k (r sig )?? ???v dd ?rref v dd ??10 a??? ? ???(12.6v v dd 20v) ???MAX5986A/max5987aclass 1 pse??12.6v20v???? MAX5986A/max5987a 24.9k (r sig )??10.5mapse?? ?????pd ??ieee 802.3af/at??? ??????? ??(v dd v on ) ??MAX5986A/max5987a?v dd v cc ? mosfet ? ?max5987a? buck ? ldoMAX5986A????????? ??MAX5986A?????buck? v dd ??(v on )??? ?v dd v on ???p mosfetv cc v dd ?? ?49ma (?)v cc ?v dd ? ?mosfet???mosfet? ?201ma (?)buck?? mosfet??100ms?? ?? MAX5986A/max5987a 60v ? ? uvlo(v on )?35.4v/38.7v (?)?uvlo (v off )?31.4v (?)?v on ? ???mosfet??v off ??t off_dly ?mosfetbuck??? led(MAX5986A) MAX5986A?led?ledled ??6.5v??led?? ?25%?r sl r sl led ?10ma20ma??? i led = 646/r sl (ma) ?r sl ??k
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 12 ?????(MAX5986A) MAX5986A????????? pmosfet??buck??? ?led(led)led?? ??25%?led(i led )?r sl ? ??? ulp ?? sl ? ????????? ???MAX5986A?? ???ieee????????? ulp ??50k ?5v?? ?????? ulp ??? sl ?? ?????????? ??????????? ???(wk)??? ??? MAX5986A/max5987a????143 c ?????? + 127 c ??????? wad? ???(???)pd?? MAX5986A/max5987a?????? ???wadpgnd??wadpgnd ? 8.8v?MAX5986A/max5987a ? ? ??????mosfet ??? ?wadwadv dd ?? ?wadv cc ????2 ?? ???????v dd v cc ??v dd ???v dd ??? dc-dc??dc-dc? ?v dd v cc ?8.7v?? v dd v cc ?7.3vdc-dc??? ? ?????wad?? v dd > 8.7v?wad > 9.4v ???? ??????vdrvvdrv vdrvgnd?1 f?? ????vdrvv dd vaux?v aux ???pdbuck ? v out 4.75vv out ?vdrv? ?vdrvv out ?v dd ? ?v out ??aux?v out buck????vdrvv dd v aux ?_(cde) 70v????? ?? dc-dc buck? dc-dc buck?pwm?????? ???????? buck?8.7v60v?1.15a ???3.84w???? uvlo??????? ????? ???????? ?
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 13 ??? 8?MAX5986A/max5987a ?????? ???275khz????? ?137.5khz??8 ???? ?????????50% ?? MAX5986A/max5987a?? ????????mosfet? ?????120ms? ??? mosfet???????? ??????? ?????60% (?) ?? reset(max5987a) max5987a?? reset ??ldo ???????? ?90% reset ??? ??95% 100 sreset ? ?? ? ???(???)pd?? MAX5986A??????v dd ??wad???wad??? wad???wadpgnd?? wadpgnd??8.8v?MAX5986A?? ??????mosfet ???v cc ??? ?wadwadv cc ????2 ?? ldo?(max5987a) ??ldo??? ldo_fb?vdrv???3.3v? ??ldo_outldo_fbgnd? ????100k ? ?85ma???????? ldo?vout????? ????buck?????ldo buck??????ldo buck?? ????buck?? ??3.0v5.6vfb?1.225v?fb ??????? 100k ? ?? ?lir??????? ?????lir?20%40%? ???????? ??????? ?MAX5986A?2? ? v cc ? ???????ic? ???? ???????? ??
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 14 ?v in-ripple ??? ?2%d???(v out /v in )ts? (1/f s ) ??????? ?????? ?????rms ?? ?i ripple ?rms? ? ?????esresl?? ???dc/dc??? ??????? ??esr???esl? ??esresl?? v ripple = v ripple(c) + v ripple(esr) +v ripple(esl) ??esresl???? ???-(i p-p ) ??????? ??????? ?????? ???????? ???esresl????esl ???? ????????? ??esr x i load ???? ???????? ?????? ????????????? ???
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 15 pcb ?pcb?????? MAX5986AJ???? J?????pcb? 1) ???? ??? 2) ?v dd v cc auxv drv ???ic ???????(pgnd) ???(gnd)?? 3) ??????? lx??? 4) ?v dd v cc pgnd? ?ic????? 5) ??????? ic 6) ?????lx??(fb) 7) MAX5986A/max5987aep?? ??pcb??? ??1mm1.2mm??(1oz?) (0.3mm0.33mm)???
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 16 ?? ?3. ?MAX5986A 5v MAX5986A vdrv v dd v cc wad wk sl rref gnd pgnd ulp aux lx fb led l0 47h c2 10f c1 68nf c3 1f 1f r1 75k i r sl 60.4k i 0 i to p open-drain outputs or pulldown switches r sig 24.9k i r2 24.9k i 5v output rj-45 and bridge rectifier c4 47f
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 17 ??() ?4. max5987a 5v buck?3.3v ldo max5987a ldo_fb v dd v cc wad rref gnd pgnd aux lx fb led l0 47h c2 10f c1 68nf c3 1f 1f r1 75k i 0 i r sig 24.9k i r2 24.9k i 5v output rj-45 and bridge rectifier vdrv to 5v output ldo_in c6 1f ldo_out c5 1f c4 47f
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 18 ?? control clk 1.5v vref driver fb pgnd lx vdrv aux wad v cc 5v hot-swap controller pd voltage monitor 5v 5v 1 0 5v 5v regulator open drain reset (max5987a only ) 5v detection classification tvs gnd v dd rref vref ldo_in ldo_out ldo_fb ldo logic 50k i 50k i wk sl ulp led (MAX5986A only ) 5v v dd bandgap vref 5v MAX5986A max5987a
MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc? maxim integrated 19 ? ?? process: bicmos ?? ?????(?)? china. maximintegrated.com/packages ????+ #-?rohs???????? ?????rohs???? + ??(pb)/rohs??? *ep =?? ** ??? ? ? ? ?? 16 tqfn-ep t1655-4 21-0140 90-0121 part pin-package sleep/ulp mode ldo uvlo (v) reset MAX5986Aete+ 16 tqfn-ep* yes no 35.7 no max5987aete+** 16 tqfn-ep* no yes 38.7 yes
?? ? ? ? ?? 0 4/12 maximmaxim????????maxim??????????? ???(??)?????? maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-10 00 20 ? 2012 maxim integrated maxim?maxim integratedmaxim integrated products, inc.? maxim 8328 100083 ?800 810 0310 010-6211 5199 010-6211 5299 MAX5986A/max5987a ieee 802.3af?class 1 pd dc-dc?

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