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general description the MAX34460 is a system monitor that is capable of managing up to 12 power supplies. the power-supply manager monitors the power-supply output voltages and constantly checks for user-programmable overvoltage and undervoltage thresholds. if a fault is detected, the device automatically shuts down the system in an orderly fashion. the device can sequence the supplies in any order at both power-up and power-down. with the addition of external current dacs, the device has the ability to close-loop margin the power-supply output voltages up or down to a user-programmable level. the device contains an internal temperature sensor and can support up to four external remote temperature sensors. once configured, the device can operate autonomously without any host intervention. applications network switches/routers base stations servers smart grid network systems features s 12 channels of power-supply management s power-supply voltage measurement and monitoring s fast minimum/maximum threshold excursion detection s remote ground sensing improves measurement accuracy s automatic closed-loop margining s programmable up and down time-based or event-based sequencing s supports dual-sequencing groups s supports up to five temperature sensors (one internal/four remote) s fault detection on all temperature sensors s programmable alarm outputs s reports peak and average levels for a number of parameters s watchdog timer function s pmbus?-compliant command interface s i 2 c/smbus-compatible serial bus with bus timeout function s on-board nonvolatile black box fault logging and default configuration setting s expandable channel operation with parallel devices s up to 20 gpos s no external clocking required s 3.0v to 3.6v supply voltage 19-6486; rev 0; 9/12 ordering information and typical operating circuit appear at end of data sheet. pmbus is a trademark of smif, inc. for related parts and recommended products to use with this part, refer to: www.maximintegrated.com/MAX34460.related MAX34460 pmbus 12-channel voltage monitor and sequencer evaluation kit available for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maximintegrated.com.
MAX34460 pmbus 12-channel voltage monitor and sequencer 2 table of contents general description ............................................................................ 1 applications .................................................................................. 1 features ..................................................................................... 1 absolute maximum ratings ...................................................................... 8 recommended operating conditions .............................................................. 8 electrical characteristics ........................................................................ 8 i 2 c/smb us interface electrical specifications ....................................................... 10 i 2 c/smbus timing ............................................................................ 10 typical operating characteristics ................................................................ 11 pin configuration ............................................................................. 13 pin description ............................................................................... 13 expanded pin description .................................................................... 15 block diagram ............................................................................... 16 detailed description ........................................................................... 16 address select ............................................................................. 19 smbus/pmbus operation ..................................................................... 19 smbus/pmbus communication examples ..................................................... 20 group command ........................................................................... 21 group command write format .............................................................. 21 addressing ................................................................................ 21 alert and alert response address (ara) ....................................................... 21 alert response address (ara) byte format .................................................... 22 host sends or reads too few bits ............................................................. 22 host sends or reads too few bytes ............................................................ 22 host sends too many bytes or bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 host reads too many bytes or bits ............................................................. 22 host sends improperly set read bit in the slave address byte ....................................... 22 unsupported command code received/host writes to a read-only command ......................... 22 invalid data received ........................................................................ 22 host reads from a write-only command ........................................................ 23 host writes to a read-only command ........................................................... 23 smbus timeout ............................................................................. 23 pmbus operation ........................................................................... 23 pmbus protocol support ...................................................................... 23 data format ................................................................................ 23 interpreting received direct format values ..................................................... 23 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 3 table of contents ( continued ) sending a direct format value ............................................................... 24 fault management and reporting .............................................................. 25 password protection ......................................................................... 25 sequencing ................................................................................ 25 pmbus-defined time-based sequencing ........................................................ 26 timeslot-defined event-based sequencing ....................................................... 27 dual-sequencing groups ..................................................................... 28 multiple device connections .................................................................. 28 system watchdog timer ...................................................................... 29 crc memory check ......................................................................... 29 alarm outputs .............................................................................. 29 f a u lt and f a u lt 2 input/output pins ............................................................ 29 monoff disable monitoring control input ....................................................... 30 external signal watchdog ..................................................................... 30 pmbus commands ........................................................................... 32 page (00h) ................................................................................ 32 operation (01h) ........................................................................... 33 special operation commands for dual-sequencing mode ...................................... 34 on_off_config (02h) ...................................................................... 34 cle ar _ faults (03h) ....................................................................... 35 write_protect (10h) ...................................................................... 35 store_default_all (11h) .................................................................. 35 mfr_store_single (fch) .................................................................. 35 restore_default_all (12h) ................................................................ 36 capability (19h) ........................................................................... 36 vout_mode (20h) .......................................................................... 36 vout_margin_high (25h) .................................................................. 36 vout_margin_low (26h) ................................................................... 36 vout_scale_monitor (2ah) ................................................................ 37 vout_ov_fault_limit (40h) ................................................................. 38 vout_ov_warn_limit (42h) ................................................................. 38 vout_uv_warn_limit (43h) ................................................................. 38 vout_uv_fault_limit (44h) ................................................................. 38 ot_fault_limit (4fh) ....................................................................... 38 ot_warn _ limit (51h) ....................................................................... 39 power_good_on (5eh) .................................................................... 39 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 4 table of contents ( continued ) power_good_off (5fh) ................................................................... 39 ton _ del ay (60h) .......................................................................... 39 toff_ del ay (64h) .......................................................................... 39 ton_max_fault_limit (62h) ................................................................ 40 status _word (79h) ........................................................................ 43 status _vout (7ah) ......................................................................... 43 status _temperature (7dh) ................................................................ 44 status _cml (7eh) ......................................................................... 44 status _ mfr _ specific (80h) ................................................................ 45 read_vout (8bh) .......................................................................... 45 read_temperature_1 (8dh) ................................................................ 46 pmbus_revision (98h) ..................................................................... 46 mfr_id (99h) .............................................................................. 46 mfr_model (9ah) ......................................................................... 46 mfr_revision (9bh) ....................................................................... 46 mfr_location (9ch) ....................................................................... 46 mfr _ date (9dh) ........................................................................... 46 mfr_serial (9eh) .......................................................................... 46 mfr_mode (d1h) ........................................................................... 46 mfr_psen_config (d2h) ................................................................... 48 mfr_seq_timeslot (d3h) ................................................................... 49 mfr_vout_peak (d4h) ..................................................................... 49 mfr_temperature_peak (d6h) ............................................................. 49 mfr_vout_min (d7h) ....................................................................... 49 mfr_temperature_avg (e3h) ............................................................... 49 mfr_nv_log_config (d8h) ................................................................. 50 mfr_fault_response (d9h) ................................................................ 51 local vs. global channels .............................................................. 51 fault detection before psenn assertion ....................................................... 51 logging faults into mfr_nv_fault_log ..................................................... 53 power-supply retry with undervoltage faults ................................................... 55 mfr_fault_retry (dah) .................................................................... 55 mfr_pg_delay (dbh) ...................................................................... 55 mfr_nv_fault_log (dch) .................................................................. 55 mfr_time_count (ddh) .................................................................... 57 mfr_margin_config (dfh) ................................................................. 58 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 5 table of contents ( continued ) margining faults .......................................................................... 59 dac margining component selection ......................................................... 59 temperature-sensor operation ................................................................. 59 mfr_temp_sensor_config (f0h) ........................................................... 60 mfr_gpo_config (fbh) .................................................................... 60 mfr_watchdog_config (fdh) ............................................................. 61 applications information ........................................................................ 61 v dd , v dda , and reg18 decoupling ............................................................ 61 open-drain pins ............................................................................ 61 keep-alive circuit ........................................................................... 61 configuration port ........................................................................... 62 resistor-dividers and source impedance for rsn inputs ............................................ 62 current measurement on rsn inputs ............................................................ 62 exposed pad grounding ...................................................................... 62 typical operating circuit ....................................................................... 63 ordering information .......................................................................... 64 package information ........................................................................... 64 revision history .............................................................................. 65 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 6 list of tables table 1. pmbus command codes ................................................................ 17 table 2. pmbus/smbus serial-port address ........................................................ 19 table 3. pmbus command code coefficients ...................................................... 24 table 4. coefficients for direct format value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 5. dual-sequencing groups ................................................................ 28 table 6. device configuration quick reference ..................................................... 29 table 7. gpo pins ............................................................................ 29 table 8. page commands ...................................................................... 32 table 9. operation command byte (when bit 3 of on_off_config = 1) .............................. 33 table 10. operation command byte (when bit 3 of on_off_config = 0) ............................. 33 table 11. special operation command bytes for primary sequence ................................... 34 table 12. special operation command bytes for secondary sequence ................................ 34 table 13. on_off_config (02h) command byte ................................................... 34 table 14. write_protect command byte ........................................................ 35 table 15. capability command byte ............................................................ 36 table 16. vout_scale_monitor examples ...................................................... 37 table 17. parametric monitoring states ............................................................ 37 table 18. ton_max_fault_limit device response ................................................ 40 table 19. status _word ...................................................................... 43 table 20. status _vout ....................................................................... 43 table 21. status_temperature ............................................................... 44 table 22. status _cml ........................................................................ 44 table 23. status_mfr_specific (for pages 0C11) ................................................. 45 list of figures figure 1. pmbus-defined time-based sequencing example ........................................... 26 figure 2. timeslot-defined event-based sequencing example ......................................... 27 figure 3. multiple device hardware connections .................................................... 28 figure 4. external watchdog operation ............................................................ 31 figure 5. sequencing configurations .............................................................. 41 figure 6. status register organization ............................................................. 42 figure 7. mfr_fault_response operation ....................................................... 52 figure 8. mfr_nv_fault_log ................................................................. 55 figure 9. dac margining circuit .................................................................. 59 figure 10. current-measuring circuit .............................................................. 62 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 7 list of tables ( continued ) table 24. status_mfr_specific (for page 255) .................................................. 45 table 25. mfr_mode ......................................................................... 47 table 26. psenn configuration .................................................................. 48 table 27. mfr_psen_config .................................................................. 48 table 28. mfr_seq_timeslot ................................................................. 49 table 29. mfr_nv_log_config ............................................................... 50 table 30. mfr_fault_response (note 1) ........................................................ 51 table 31. alarm_config codes ............................................................... 53 table 32. mfr_fault_response codes for global channels ...................................... 54 table 33. mfr_fault_response codes for local channels ........................................ 54 table 34. mfr_nv_fault_log ................................................................. 56 table 35. mfr_margin_config ............................................................... 58 table 36. power-supply margining with ds4424 dac outputs .......................................... 58 table 37. ds75lv address pin configuration ....................................................... 59 table 38. mfr_temp_sensor_config .......................................................... 60 table 39. mfr_gpo_config ................................................................... 60 table 40. mfr_watchdog_config ............................................................ 61 table 41. scale current-gain example ............................................................ 62 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 8 v dd and v dda to v ss .......................................... -0.3v to +4.0v rsg0 and rsg1 to v ss ....................................... -0.3v to +0.3v all other pins except reg18 relative to v ss ..................................... -0.3v to (v dd + 0.3v)* reg18 to v ss ....................................................... -0.3v to +2.0v continuous power dissipation (t a = +70c) tqfn (derate 26.3mw/c above +70c) ............... 2105.3mw operating temperature range .......................... -40c to +85c storage temperature range ............................ -55c to +125c lead temperature (soldering, 10s) ................................ +260c soldering temperature (reflow) ...................................... +260c absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. recommended operating conditions (t a = -40c to +85c, unless otherwise noted.) electrical characteristics (v dd and v dda = 3.0v to 3.6v, t a = -40c to +85c, unless otherwise noted. typical values are at v dd /v dda = 3.3v, t a = +25c.) * subject to not exceeding +4.0v. parameter symbol conditions min typ max units v dd operating voltage range v dd (note 1) 3.0 3.6 v input logic 1 (except i 2 c pins) v ih1 0.7 x v dd v dd + 0.3 v input logic 0 (except i 2 c pins) v il1 -0.3 +0.3 x v dd v input logic 1: scl, sda, mscl, msda v ih2 2.1 v dd + 0.3 v input logic 0: scl, sda, mscl, msda v il2 -0.3 +0.8 v source impedance to rs adc_time[1:0] = 00 1 k i adc_time[1:0] = 01 5 adc_time[1:0] = 10 10 adc_time[1:0] = 11 20 parameter symbol conditions min typ max units general supply current i cpu (note 2) 12 ma i program 18 system clock error f err:mosc +25 c < t a < +85 c -3 +3 % -40 c < t a < +25 c -4 +4 output logic-low (except i 2 c pins) v ol1 i ol = 4ma (note 1) 0.4 v output logic-high (except i 2 c pins) v oh1 i oh = -2ma (note 1) v dd - 0.5 v maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 9 electrical characteristics ( continued ) (v dd and v dda = 3.0v to 3.6v, t a = -40c to +85c, unless otherwise noted. typical values are at v dd /v dda = 3.3v, t a = +25c.) parameter symbol conditions min typ max units output logic-low scl, sda, mscl, msda v ol2 i ol = 4ma (note 1) 0.4 v scl, sda, mscl, msda leakage il i2c v dd = 0v or unconnected q 5 f a control threshold 2.048 v control hysteresis 50 mv adc adc bit resolution 12 bits adc conversion time adc_time[1:0] = 00 1000 ns adc full scale v fs t a = 0c to +85c 2.032 2.048 2.064 v adc measurement resolution v lsb 500 f v rs input capacitance c rs 15 pf rs input leakage il rs q 0.25 f a adc integral nonlinearity inl q 1 lsb adc differential nonlinearity dnl q 1 lsb temperature sensor internal temperature- measurement error t a = -40c to +85c q 2 c flash flash endurance n flash 20,000 write cycles data retention t a = +50c 100 years store_default_all write time 70 ms mfr_store_single write time 310 f s restore_default_all time 70 ms mfr_nv_fault_log write time writing 1 fault log 11 ms mfr_nv_fault_log delete time deleting all fault logs 200 ms mfr_nv_fault_log overwrite time 40 ms timing operating characteristics voltage sample rate threshold excursion (note 3) 48 f s data collection 5 ms temperature sample rate 1000 ms device startup time 135 ms maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 10 i 2 c/smb us interface electrical specifications (v dd and v dda = 3.0v to 3.6v, t a = -40c to +85c, unless otherwise noted. typical values are at v dd /v dda = 3.3v, t a = +25 n c.) note 1: all voltages are referenced to ground. current entering the device are specified as positive and currents exiting the device are negative. note 2: this does not include pin input/output currents. note 3: the round-robin threshold excursion rate can be changed with the adc_average and adc_time bits in mfr_mode from 12 f s (no averaging and 1 f s conversion) to 768 f s (8x averaging and 8 f s conversion). i 2 c/smbus timing parameter symbol conditions min typ max units scl clock frequency f scl 10 400 khz mscl clock frequency f mscl 100 khz bus free time between stop and start conditions t buf 1.3 f s hold time (repeated) start condition t hd:sta 0.6 f s low period of scl t low 1.3 f s high period of scl t high 0.6 f s data hold time t hd:dat receive 0 ns transmit 300 ns data setup time t su:dat 100 ns start setup time t su:sta 0.6 f s sda and scl rise time t r 300 ns sda and scl fall time t f 300 ns stop setup time t su:sto 0.6 f s clock low time out t to 25 27 35 ms scl note: timing is referenced to v il(max) and v ih(min) . sda stop start repeated start t buf t hd:sta t hd:dat t su:dat t su:sto t hd:sta t sp t su:sta t high t r t f t low maxim integrated
11 typical operating characteristics (v dd = 3.3v and t a = +25c, unless otherwise noted.) alert pin during power-up MAX34460 toc06 200s/div 1v/div 1v/div v dd alert address pins during power-up MAX34460 toc05 20ms/div 2v/div 2v/div 2v/div v dd a0/monoff a1/pg 100nf to gnd and 220k pullup on each address pin fault pins during power-up MAX34460 toc04 20ms/div 2v/div 2v/div 2v/div v dd fault fault2 psen outputs during power-up MAX34460 toc03 20ms/div 2v/div 2v/div 2v/div v dd psen0 psen1 the control pin is asserted when power is applie d the psen pins power up in a high-impedance stat e ton_delay = 0ms ton_delay = 10ms supply current vs. supply voltage MAX34460 toc02 v dd (v) i dd (ma) 3.5 3.4 3.3 3.2 3.1 10.5 11.0 11.5 12.0 12.5 13.0 10.0 3.0 3.6 t a = +85c t a = +25c t a = -40c supply current vs. temperature MAX34460 toc01 temperature (c) i dd (ma) 80 60 40 20 0 -20 10.5 11.0 11.5 12.0 12.5 13.0 10.0 -40 100 MAX34460 pmbus 12-channel voltage monitor and sequencer maxim integrated
12 typical operating characteristics (continued) (v dd = 3.3v and t a = +25c, unless otherwise noted.) i dd vs. time during a nonvolatile log write with overwrite enabled MAX34460 toc10 4ms/div 2v/div fault i dd 5ma/div 0ma i dd vs. time during a nonvolatile log write MAX34460 toc09 2ms/div 2v/div fault i dd 5ma/div 0ma v out steps during margining MAX34460 toc08 20ms/div 50mv/div v out rst pin during power-up MAX34460 toc07 200s/div 1v/div 1v/div v dd rst MAX34460 pmbus 12-channel voltage monitor and sequencer maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 13 pin configuration pin description pin* name type** function 1 rs4 ai adc voltage-sense input 4. connect to v ss if unused. 2 rs3 ai adc voltage-sense input 3. connect to v ss if unused. 3 rs2 ai adc voltage-sense input 2. connect to v ss if unused. 4 rs1 ai adc voltage-sense input 1. connect to v ss if unused. 5 rs0 ai adc voltage-sense input 0. connect to v ss if unused. 6 a0/ monoff di smbus address 0 input/active-low monitoring off input. this dual-function pin is sampled on device power-up to determine the smbus address. after device power-up, this pin becomes an input, with an internal pullup, that when pulled low defeats the overvoltage and undervoltage monitoring to allow an external device to margin the power supplies. 7 v dda power analog supply voltage. bypass v dda to v ss with 0.1 f f. connect to v dd . 8 n.c. no connection. do not connect any signal to this pin. 9 fault dio active-low fault input/output for the primary sequence. see the expanded pin description section for more details. top view MAX34460 tqfn 13 14 15 16 17 18 19 20 21 22 23 24 sd a ep/ v ss + sc l v dd reg1 8 fault2 mscl msda psen 8 psen 9 psen10 psen11 alarm0 48 47 46 45 44 43 42 41 40 39 38 37 1 2 34 56 78 91 0 11 12 rs 5 rs 6 rs 7 rs 8 rs 9 rs10 rs11 wd i wdo psen 7 psen 6 psen 5 alarmclr rst control fault n.c. v dda a0 / monoff rs 0 rs 1 rs 2 rs 3 rs 4 36 35 34 33 32 31 30 29 28 27 26 25 alarm1 alert a1/ pg pg2 control2 rsg0 rsg1 psen0 psen1 psen2 psen3 psen4 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 14 pin description (continued) pin* name type** function 10 control ai power-supply master on/off control for the primary sequence. active low or active high based on the on_off_config command. 11 rst dio active-low reset input/output. contains an internal pullup. 12 alarmclr di active-low alarm clear input with a weak pullup. toggle low to clear the alarm0 / alarm1 outputs. leave open circuit or connect high if not used. 13 sda dio i 2 c/smbus-compatible input/open-drain output 14 scl dio i 2 c/smbus-compatible clock input/open-drain output 15 v dd power digital supply voltage. bypass v dd to v ss with 0.1 f f. connect to v dda . 16 reg18 power regulator for digital circuitry. bypass to v ss with 1 f f and 10nf (500m i maximum esr). do not connect other circuitry to this pin. 17 fault2 dio active-low fault input/output for the secondary sequence. see the expanded pin description section for more details. 18 mscl dio master i 2 c clock input/open-drain output 19 msda dio master i 2 c data input/open-drain output 20 psen8 do power-supply enable output 8. see the expanded pin description section for more details. 21 psen9 do power-supply enable output 9. see the expanded pin description section for more details. 22 psen10 do power-supply enable output 10. see the expanded pin description section for more details. 23 psen11 do power-supply enable output 11. see the expanded pin description section for more details. 24 alarm0 do active-low alarm output 0. see the expanded pin description section for more details. 25 alarm1 do active-low alarm output 1. see the expanded pin description section for more details. 26 alert do active-low, open-drain alert output 27 a1/pg dio smbus address 1 input/power-good output for the primary sequence. this dual-function pin is sampled on device power-up to determine the smbus address. after device power- up, this pin becomes an output that transitions high when all the enabled power supplies are above their associated power_good_on thresholds. this pin is forced low immediately when the control pin goes inactive or the operation off command is received. this pin contains a weak pullup during device reset. 28 pg2 do power good for the secondary sequence 29 control2 di power-supply master on/off control for the secondary sequence. active low or active high based on the on_off_config command. 30 rsg0 ai remote-sense ground for rs0Crs3. 31 rsg1 ai remote-sense ground for rs4Crs11. 32 psen0 do power-supply enable output 0. see the expanded pin description section for more details. 33 psen1 do power-supply enable output 1. see the expanded pin description section for more details. 34 psen2 do power-supply enable output 2. see the expanded pin description section for more details. 35 psen3 do power-supply enable output 3. see the expanded pin description section for more details. 36 psen4 do power-supply enable output 4. see the expanded pin description section for more details. 37 psen5 do power-supply enable output 5. see the expanded pin description section for more details. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 15 pin description (continued) expanded pin description * all pins except v dd , ep/v ss , alert , a1/pg, and reg18 are high impedance during device power-up and reset. ** ai = analog input, ao = analog output; di = digital input; dio = digital input/output; do = digital output pin* name type** function 38 psen6 do power-supply enable output 6. see the expanded pin description section for more details. 39 psen7 do power-supply enable output 7. see the expanded pin description section for more details. 40 wdo dio open-drain, active-low watchdog input/output. can be configured with mfr_watchdog_config as a manual reset input. 41 wdi di watchdog input. rising edge triggered. 42 rs11 ai adc voltage-sense input 11. connect to v ss if unused. 43 rs10 ai adc voltage-sense input 10. connect to v ss if unused. 44 rs9 ai adc voltage-sense input 9. connect to v ss if unused. 45 rs8 ai adc voltage-sense input 8. connect to v ss if unused. 46 rs7 ai adc voltage-sense input 7. connect to v ss if unused. 47 rs6 ai adc voltage-sense input 6. connect to v ss if unused. 48 rs5 ai adc voltage-sense input 5. connect to v ss if unused. ep/v ss power exposed pad (bottom side of package). must be connected to local ground. the exposed pad is the ground reference (v ss ) for the entire device. name function psen0Cpsen11 the psen0Cpsen11 outputs are programmable with the mfr_psen_config command for either active- high or active-low operation and can be either open-drain or push-pull. if not used for power-supply enables, these outputs can be repurposed as general-purpose outputs using the mfr_psen_config command. if these pins are used to enable power supplies, it is highly recommended that these pins have external pullups or pulldowns to force the supplies into an off state when the device is not active. fault open-drain, active-low fault input/output. this pin is asserted when one or more of the power supplies in a global group are being shut down due to a fault condition. also, this pin is monitored and when it is asserted, all power supplies in a global group are shut down. this pin is used to provide hardware control for power supplies in a global group across multiple devices. this output is unconditionally deasserted when rst is asserted or the device is power cycled. upon reset, this output is pulled low until monitoring starts. alarm open-drain, active-low alarm output. the outputs can be configured with the mfr_fault_response command to go active in any combination of channels for undervoltage or overvoltage, or sequencing faults or warnings. these outputs are latched until cleared with the alarmclr pin or the alarm_clr bit in mfr_mode. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 16 detailed description the MAX34460 is a highly integrated system monitor with functionality to monitor up to 12 power supplies. the device provides power-supply voltage monitoring and sequencing. it can also provide closed-loop margining control and local/remote thermal-sensing facilities. the power-supply manager monitors the power-supply output voltage and constantly checks for user program - mable overvoltage and undervoltage thresholds. it also has the ability to margin the power-supply output voltage up or down by a user-programmable level. the margin - ing is performed in a closed-loop arrangement, whereby the device automatically adjusts an external-current dac block diagram mux alert pmbus control and monitoring engine control2 fault2 pg2 rs0?rs3 msda mscl smbus master sda scl smbus slave secondary sequencer control alarmclr alarm0 12 4 latched alarm indication auto sequencer pullup fault wdo control wdi watchdog psen0? psen11 a1/pg a0/monoff MAX34460 pullup pullup rst reg18 ep/ v ss v dd v dda power control 1.8v vreg rsg0 rs4?rs11 8 rsg1 digital comparators adc results sram v ref 2.048v alarm1 power-supply output enables sample averaging 12-bit 1msps adc temp sensor maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 17 output and then measures the resultant output voltage. the power-supply manager can also sequence the supplies in any order at both power-up and power-down. thermal monitoring can be accomplished using up to five temperature sensors including an on-chip tempera - ture sensor and up to four external remote ds75lv digital temperature sensors. communications with the ds75lv temperature sensors is conducted through a dedicated i 2 c/smbus interface. the device provides alert and fault output signals. host communications are conducted through a pmbus- compatible communications port. table 1. pmbus command codes code command name type page 0C11 page 13C17 page 255 no. of bytes flash stored/ locked (note 2) default value (note 2) (note 1) 00h page r/w byte r/w r/w r/w 1 n/n 00h 01h operation r/w byte r/w w 1 n/n 00h 02h on_off_config r/w byte r/w r/w r/w 1 y/y 1ah 03h clear_faults send byte w w w 0 n/n 10h write_protect r/w byte r/w r/w r/w 1 n/y 00h 11h store_default_all send byte w w w 0 n/y 12h restore_default_all send byte w w w 0 n/y 19h capability read byte r r r 1 n/n 20h/30h 20h vout_mode read byte r r r 1 fixed/n 40h 25h vout_margin_high r/w word r/w 2 y/y 0000h 26h vout_margin_low r/w word r/w 2 y/y 0000h 2ah vout_scale_monitor r/w word r/w 2 y/y 7fffh 40h vout_ov_fault_limit r/w word r/w 2 y/y 7fffh 42h vout_ov_warn_limit r/w word r/w 2 y/y 7fffh 43h vout_uv_warn_limit r/w word r/w 2 y/y 0000h 44h vout_uv_fault_limit r/w word r/w 2 y/y 0000h 4fh ot_fault_limit r/w word r/w 2 y/y 7fffh 51h ot_warn_limit r/w word r/w 2 y/y 7fffh 5eh power_good_on r/w word r/w 2 y/y 0000h 5fh power_good_off r/w word r/w 2 y/y 0000h 60h ton_delay r/w word r/w 2 y/y 0000h 62h ton_max_fault_limit r/w word r/w 2 y/y ffffh 64h toff_delay r/w word r/w 2 y/y 0000h 79h status_word read word r r r 2 n/n 0000h 7ah status_vout read byte r 1 n/n 00h 7dh status_temperature read byte r 1 n/n 00h 7eh status_cml read byte r r r 1 n/n 00h 80h status_mfr_specific read byte r r 1 n/n 00h 8bh read_vout read word r 2 n/n 0000h 8dh read_temperature_1 read word r 2 n/n 0000h 98h pmbus_revision read byte r r r 1 fixed/n 11h maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 18 table 1. pmbus command codes (continued) note 1: common commands are shaded. access through any page results in the same device response. note 2: in the flash stored/locked column, the n on the left indicates that this parameter is not stored in flash memory when the store_default_all command is executed; the value shown in the default value column is automatically loaded upon power-on reset or when the rst pin is asserted. in the flash stored/locked column, the y on the left side indicates that the currently loaded value in this parameter is stored in flash memory when the store_default_all command is executed and is automatically loaded upon power-on reset, or when the rst pin is asserted and the value shown in the default value column is the value when shipped from the factory. fixed in the flash stored/locked column means that the value is fixed at the factory and cannot be changed. the value shown in the default value column is automatically loaded upon power-on reset, or when the rst pin is asserted. the right-side y/n indicates that when the device is locked, only the commands listed with n can be accessed. all other commands are ignored if writ - ten and return ffh if read. only the page, clear_faults, operation, and mfr_serial commands can be written to. the device unlocks if the upper 4 bytes of mfr_serial match the data written to the device. note 3: the factory-set value is dependent on the device hardware and firmware revision. note 4: the factory-set default value for this 8-byte block is 3130313031303130h. note 5: the factory-set default value for the complete block of the mfr_nv_fault_log is ffh. note 6: the factory-set default value for this 4-byte block is 00000000h. code command name type page 0C11 page 13C17 page 255 no. of bytes flash stored/ locked (note 2) default value (note 2) (note 1) 99h mfr_id read byte r r r 1 fixed/n 4dh 9ah mfr_model read byte r r r 1 fixed/n 57h 9bh mfr_revision read word r r r 2 fixed/n (note 3) 9ch mfr_location block r/w r/w r/w r/w 8 y/y (note 4) 9dh mfr_date block r/w r/w r/w r/w 8 y/y (note 4) 9eh mfr_serial block r/w r/w r/w r/w 8 y/y (note 4) d1h mfr_mode r/w word r/w r/w r/w 2 y/y 0008h d2h mfr_psen_config r/w byte r/w 1 y/y 00h d3h mfr_seq_timeslot r/w byte r/w 1 y/y 00h d4h mfr_vout_peak r/w word r/w 2 n/y 0000h d6h mfr_temperature_peak r/w word r/w 2 n/y 8000h d7h mfr_vout_min r/w word r/w 2 n/y 7fffh d8h mfr_nv_log_config r/w word r/w r/w r/w 2 y/y 0000h d9h mfr_fault_response r/w word r/w 2 y/y 0000h dah mfr_fault_retry r/w word r/w r/w r/w 2 y/y 0000h dbh mfr_pg_delay r/w word r/w r/w r/w 2 y/y 0000h dch mfr_nv_fault_log block read r r r 255 y/y (note 5) ddh mfr_time_count block read r/w r/w r/w 4 n/y (note 6) dfh mfr_margin_config r/w word r/w 2 y/y 0000h e3h mfr_temperature_avg r/w word r/w 2 n/y 0000h f0h mfr_temp_sensor_config r/w word r/w 2 y/y 0000h fbh mfr_gpo_config r/w word r/w r/w r/w 2 y/y 0000h fch mfr_store_single r/w word r/w r/w r/w 2 n/y 0000h fdh mfr_watchdog_config r/w word r/w r/w r/w 2 y/y 0000h maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 19 address select on device power-up, the device samples the a0 and a1 pins to determine the pmbus/smbus serial-port address. the combination of the components shown below deter - mines the serial-port address (see also table 2 ). smbus/pmbus operation the device implements the pmbus command structure using the smbus format. the structure of the data flow between the host and the slave is shown below for sev - eral different types of transactions. all transactions begin with a host sending a command code that is immediately preceded with a 7-bit slave address (r/ w = 0). data is sent msb first. table 2. pmbus/smbus serial-port address note: the device also responds to a slave address of 34h (this is the factory programming address) and the device should not share the same i 2 c bus with other devices that use this slave address. a1 a0 7-bit slave address r1 r2 c2 r1 r2 c2 220k i 220k i 1110 100 (e8h) 220k i 220k i 1110 101 (eah) 220k i 220k i 100nf 0001 010 (24h) 220k i 22k i 100nf 0001 011 (26h) 220k i 220k i 1110 110 (ech) 220k i 220k i 1110 111 (eeh) 220k i 220k i 100nf 0001 100 (28h) 220k i 22k i 100nf 0001 101 (2ah) 220k i 100nf 220k i 1001 100 (98h) 220k i 100nf 220k i 1001 101 (9ah) 220k i 100nf 220k i 100nf 1011 000 (b0h) 220k i 100nf 22k i 100nf 1011 001 (b2h) 22k i 100nf 220k i 1001 110 (9ch) 22k i 100nf 220k i 1001 111 (9eh) 22k i 100nf 220k i 100nf 1011 110 (bch) 22k i 100nf 22k i 100nf 1011 111 (beh) a0/monoff a1/pg r1 r2 c2 MAX34460 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 20 smbus/pmbus communication examples read word format 1 7 1 1 8 1 1 7 1 1 8 1 8 1 1 s slave address w a command code a sr slave address r a data byte low a data byte high na p read byte format 1 7 1 1 8 1 1 7 1 1 8 1 1 s slave address w a command code a sr slave address r a data byte na p write word format 1 7 1 1 8 1 8 1 8 1 1 s slave address w a command code a data byte low a data byte high a p write byte format 1 7 1 1 8 1 8 1 1 s slave address w a command code a data byte a p send byte format 1 7 1 1 8 1 1 s slave address w a command code a p k ey: s = start sr = repeated start p = stop w = write bit (0) r = read bit (1) a = acknowledge (0) na = not acknowledge (1) shaded block = slave transaction maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 21 group command the device supports the group command. with the group command, a host can write different data to multiple devices on the same serial bus with one long continuous data stream. all the devices addressed during this trans - action wait for the host to issue a stop before beginning to respond to the command. group command write format addressing the device responds to receiving its fixed slave address by asserting an acknowledge (ack) on the bus. the device does not respond to a general call address; it only responds when it receives its fixed slave address or the alert response address (ara). see the alert and alert response address (ara) section for more details. alert and alert response address (ara) if the alert output is enabled (alert bit = 1 in mfr_mode), when a fault occurs the device asserts the alert signal and then waits for the host to send an ara, as shown in the alert response address (ara) byte format section. when the ara is received and the device is asserting alert , the device acks it and then attempts to place its fixed slave address on the bus by arbitrating the bus, since another device could also try to respond to the ara. the rules of arbitration state that the lowest address device wins. if the device wins the arbitration, it deasserts alert . if the device loses arbitration, it keeps alert asserted and waits for the host to once again send the ara. slave address, command byte, and data word for device 1 1 7 1 1 8 1 8 1 8 1 s slave address w a command code a data byte low a data byte high a u u u slave address, command byte, and data byte for device 2 1 7 1 1 8 1 8 1 sr slave address w a command code a data byte a u u u slave address and send byte for device 3 1 7 1 1 8 1 sr slave address w a command code a u u u u u u slave address, command byte, and data word for device n 1 7 1 1 8 1 8 1 8 1 1 sr slave address w a command code a data byte low a data byte high a p k ey: s = start sr = repeated start p = stop w = write bit (0) a = acknowledge (0) shaded block = slave transaction maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 22 alert response address (ara) byte format host sends or reads too few bits if, for any reason, the host does not complete writing a full byte or reading a full byte from the device before a start or stop is received, the device does the follow - ing: 1) ignores the command. 2) sets the cml bit in status_word. 3) sets the data_fault bit in status_cml. 4) notifies the host through alert assertion (if enabled). host sends or reads too few bytes for each supported command, the device expects a fixed number of bytes to be written or read from the device. if, for any reason, less than the expected number of bytes is written to or read from the device, the device completely ignores the command and takes no action. host sends too many bytes or bits for each supported command, the device expects a fixed number of bytes to be written to the device. if, for any reason, more than the expected number of bytes or bits are written to the device, the device does the following: 1) ignores the command. 2) sets the cml bit in status_word. 3) sets the data_fault bit in status_cml. 4) notifies the host through alert assertion (if enabled). host reads too many bytes or bits for each supported command, the device expects a fixed number of bytes to be read from the device. if, for any reason, more than the expected number of bytes or bits are read from the device, the device does the following: 1) sends all ones (ffh) as long as the host keeps acknowledging. 2) sets the cml bit in status_word. 3) sets the data_fault bit in status_cml. 4) notifies the host through alert assertion (if enabled). host sends improperly set read bit in the slave address byte if the device receives the r/ w bit in the slave address set to a one immediately preceding the command code, the device does the following (this does not apply to the ara): 1) acks the address byte. 2) sends all ones (ffh) as long as the host keeps acknowledging. 3) sets the cml bit in status_word. 4) sets the data_fault bit in status_cml. 5) notifies the host through alert assertion (if enabled). unsupported command code received/ host writes to a read-only command if the host sends the device a command code that it does not support, or if the host sends a command code that is not supported by the current page setting, the device does the following: 1) ignores the command. 2) sets the cml bit in status_word. 3) sets the comm_fault bit in status_cml. 4) notifies the host through alert assertion (if enabled). invalid data received the device checks the page, operation, and write_ protect command codes for valid data. if the host writes a data value that is invalid, the device does the following: 1) ignores the command. 2) sets the cml bit in status_word. 3) sets the data_fault bit in status_cml. 4) notifies the host through alert assertion (if enabled). 1 7 1 1 8 1 1 s ara 0001100 r a device slave address with lsb = 0 na p maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 23 host reads from a write-only command when a read request is issued to a write-only command (clear_faults, store_default_all, restore_ default_all, operation with page = 255), the device does the following: 1) acks the address byte. 2) ignores the command. 3) sends all ones (ffh), as long as the host keeps acknowledging. 4) sets the cml bit in status_word. 5) sets the data_fault bit in status_cml. 6) notifies the host through alert assertion (if enabled). host writes to a read-only command when a write request is issued to a read-only command, the device does the following: 1) ignores the command. 2) sets the cml bit in status_word. 3) sets the comm_fault bit in status_sml. 4) notifies the host through alert assertion (if enabled). smbus timeout if during an active smbus communication sequence the scl signal is held low for greater than the timeout duration (nominally 27ms), the device terminates the sequence and resets the serial bus. it takes no other action. no status bits are set. pmbus operation from a software perspective, the device appears as a pmbus device capable of executing a subset of pmbus commands. a pmbus 1.1-compliant device uses the smbus version 1.1 for transport protocol and responds to the smbus slave address. in this data sheet, the term smbus is used to refer to the electrical characteristics of the pmbus communication using the smbus physical layer. the term pmbus is used to refer to the pmbus com - mand protocol. the device employs a number of standard smbus protocols (e.g., write word, read word, write byte, read byte, send byte, etc.) to program output voltage and warning/fault thresholds, read monitored data, and provide access to all manufacturer-specific commands. the device supports the group command. the group command is used to send commands to more than one pmbus device. it is not required that all the devices receive the same command. however, no more than one command can be sent to any one device in one group command packet. the group command must not be used with commands that require receiving devices to respond with data, such as the status_word com - mand. when the device receives a command through this protocol, it immediately begins execution of the received command after detecting the stop condition. the device supports the page command and uses it to select which individual channel to access. when a data word is transmitted, the lower order byte is sent first and the higher order byte is sent last. within any byte, the (msb is sent first and the lsb is sent last. pmbus protocol support the device supports a subset of the commands defined in the pmbus power system management protocol specification part ii - command language revision 1.1. for detailed specifications and the complete list of pmbus commands, refer to part ii of the pmbus speci - fication available at www.pmbus.org . the supported pmbus commands and the corresponding device behav - ior are described in this document. all data values are represented in direct format, unless otherwise stated. whenever the pmbus specification refers to the pmbus device, it is referring to the device operating in conjunc - tion with a power supply. while the command can call for turning on or off the pmbus device, the device always remains on to continue communicating with the pmbus master and the device transfers the command to the power supply accordingly. data format voltage data for commanding or reading the output voltage or related parameters (such as the overvoltage threshold) are presented in direct format. direct format data is a 2-byte, twos complement binary value. direct format data can be used with any command that sends or reads a parametric value. the direct format uses an equation and defined coefficients to calculate the desired values. table 3 lists coefficients used by the device. interpreting received direct format values the host system uses the following equation to convert the value received from the pmbus devicein this case, the MAX34460into a reading of volts, degrees celsius, or other units as appropriate: x = (1/m) x (y x 10 Cr - b) where x is the calculated, real-world value in the appro - priate units (i.e., v, n c, etc.); m is the slope coefficient; y is the 2-byte, twos complement integer received from the pmbus device; b is the offset; and r is the exponent. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 24 table 3. pmbus command code coefficients sending a direct format value to send a value, the host must use the following equation to solve for y: y = (mx + b) x 10 r where y is the 2-byte, twos complement integer to be sent to the unit; m is the slope coefficient; x is the real- world value, in units such as volts, to be converted for transmission; b is the offset; and r is the exponent. the following example demonstrates how the host can send and retrieve values from the device. table 4 lists the coefficients used in the following parameters. if a host wants to set the device to change the power-supply output voltage to 3.465v (or 3465mv), the corresponding vout_margin_high value is: y = (1 x 3465 + 0) x 10 0 = 3465 (decimal) = 0d89h (hex) conversely, if the host received a value of 0d89h on a read_vout command, this is equivalent to: x = (1/1) x (0d89h x 10 -(-0) C 0) = 3465mv = 3.465v power supplies and power converters generally have no way of knowing how their outputs are connected to ground. within the power supply, all output voltages are most commonly treated as positive. accordingly, all output voltages and output voltage-related parameters of pmbus devices are commanded and reported as posi - tive values. it is up to the system to know that a particular output is negative if that is of interest to the system. all output-voltage-related commands use 2 data bytes. table 4. coefficients for direct format value parameter commands units resolution maximum m b r voltage vout_margin_high vout_margin_low vout_ov_fault_limit vout_ov_warn_limit vout_uv_warn_limit vout_uv_fault_limit power_good_on power_good_off read_vout mfr_vout_peak mfr_vout_min mv 1 32,767 1 0 0 voltage scaling vout_scale_monitor 1/32,767 1 32,767 0 0 temperature ot_fault_limit ot_warn_limit read_temperature_1 mfr_temperature_peak mfr_temperature_avg n c 0.01 327.67 1 0 2 timing ton_delay ton_max_fault_limit toff_delay mfr_fault_retry mfr_pg_delay ms 0.2 6553.4 5 0 0 command code command name m b r 25h vout_margin_high 1 0 0 8bh read_vout 1 0 0 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 25 fault management and reporting for reporting faults/warnings to the host on a real-time basis, the device asserts the open-drain alert pin (if enabled in mfr_mode) and sets the appropriate bit in the various status registers. on recognition of the alert assertion, the host or system manager is expected to poll the i 2 c bus to determine the device asserting alert . the host sends the smbus ara (0001 100). the device acks the smbus ara, transmits its slave address, and deasserts alert . the system controller then communi - cates with pmbus commands to retrieve the fault/warning status information from the device. see the individual command sections for more details. faults and warnings that are latched in the status registers are cleared when any one of the following conditions occurs: ? a clear_faults command is received. ? the rst pin is toggled or a soft-reset is issued. ? bias power to the device is removed and then reapplied. one or more latched-off power supplies are only restart - ed when one of the following conditions occurs: ? the operation commands are received that turn off and on the power supplies or the control pin is toggled to turn off and then turn on the power supplies. ? the rst pin is toggled or a soft-reset is issued. ? bias power to the device is removed and then reapplied. a power supply is not allowed to turn on if any faults the supply responds to are detected. only after the faults clear is the power supply allowed to turn on. when global supplies are being sequenced on, a fault on any of the supplies keeps all global supplies from being turned on. upon a system-wide power-up (operation command is received to turn the supplies on when page is 255 or the control pin is toggled to turn on the supplies), all enabled global power supplies with their overvolt - age- or overtemperature-fault responses enabled with the mfr_fault_response command are only allowed to power up if neither the overvoltage or overtemperature fault exists. the device responds to fault conditions according to the manufacturer fault response command (mfr_fault_ response). this command byte determines how the device should respond to each particular fault. password protection the device can be password protected by using the lock bit in the mfr_mode command. once the device is locked, only certain pmbus commands can be accessed with the serial port. see table 1 for a com - plete list. commands that have password protection return all ones (ffh), with the proper number of data bytes when read. when the device is locked, only the page, operation, clear_faults, and mfr_serial commands can be written; all other written commands are ignored. when mfr_serial is written and the upper 4 bytes match the internally flash-stored value, the device unlocks and remains unlocked until the lock bit in mfr_mode is activated once again. the lock status bit in status_mfr_specific is always available to indicate whether the device is locked or unlocked. sequencing the device implements both pmbus-defined time- based sequencing and timeslot-defined event-based sequencing. the seq bit in mfr_mode determines which sequencing profile is used. with pmbus-defined sequencing, the activation of all power-supply channels (even across multiple devices) is timed from a common start signal that can be either the control pin or the operation command. with timeslot sequencing, each power-supply channel is assigned to a particular timeslot and each power supply waits until the preceding power supply is active before it is turned on. the power- down sequencing of both the pmbus and the timeslot arrangements is the same. when the power supplies are instructed to turn off, all supplies can be switched off immediately, or they can be shut down in any order according to the toff_delay command setting. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 26 pmbus-defined time-based sequencing figure 1 details a simple sequencing scheme using four power supplies. when either the control pin goes active or the operation command is received (as defined by the on_off_config command), each enabled psenn output goes active (can be active high or low, as defined in mfr_psen_config) after the associ - ated delay time programmed in ton_delay. the power supplies can be sequenced on in any order. the output voltage of each power supply is monitored to ensure that the supply crosses the undervoltage fault limit (as configured in vout_uv_fault_limit) within a pro - grammable time limit (as configured in ton_max_ fault_limit). after all enabled supplies are turned on and above their respective power-good-on levels (as configured in power_good_on), the pg output transitions high. the pg output transition can be delayed with the mfr_pg_delay command. when either the control pin goes inactive or the operation off command is received (or the fault pin goes low for global channels), the power supplies are sequenced off. the order in which the supplies are disabled is determined with the toff_delay configuration. alternatively, all of the power supplies can be switched off immediately, as configured in the on_off_config command or with the operation command. figure 1. pmbus-defined time-based sequencing example psen 0 rs 0 to n_ m ax_ fa ul t_li mi t to n_ m ax_ fa ul t_li mi t po we r_ goo d_ on po we r_ goo d_ on po we r_ good _o n po we r_ goo d_ on vout_uv_ fa ul t_li mi t ton_m ax _fau lt _l im it ton_m ax _fau lt _l im it vout_uv_ fa ul t_li mi t vout_uv_ fa ul t_li mi t vout_uv_ fa ul t_li mi t psen 2 rs 2 psen 5 rs 5 psen 1 rs 1 toff _d el ay toff _d el ay power_good_off pg po we r-up po we r-down no tes 2, 3 no te 3 no te 1 cont rol pi n or oper at io n co mm and no te s: 1. pg tr an siti on hi gh c an be de layed wi th mfr_ pg _d el ay. 2. alte rnate power-dow n sequenci ng op er atio n is to shut off all su pplie s imme di ately. 3. th e fa ul t pin being asse rt ed lo w can also ca us e a power-d ow n se qu en ce to oc cu r on global channels . ton_del ay ton_del ay ton_del ay ton_del ay toff _d el ay toff _d el ay maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 27 timeslot-defined event-based sequencing as an example of timeslot sequencing, figure 2 details a simple sequencing scheme using four power supplies. when either the control pin goes active or the operation command is received (as defined by the on_off_config command), psen0, which has been assigned to timeslot 0 (with the mfr_seq_timeslot command), goes active (can be active high or low, as defined in mfr_psen_config) after the associated delay time programmed in ton_delay. rs0 is moni - tored to make sure that the psen0 supply crosses the undervoltage-fault limit (as configured in vout_uv_ fault_limit) within a programmable time limit (as con - figured in ton_max_fault_limit). when rs0 crosses the undervoltage-fault limit, timeslot 1 begins. psen2 and psen5 have been assigned to timeslot 1 and each has their own unique ton_delay and ton_max_fault_ limit values. since two power supplies have been assigned to timeslot 1, the last power supply to cross its associated undervoltage-fault-limit level defines when figure 2. timeslot-defined event-based sequencing example psen 0 rs 0 rs 2 to n_ m ax_ fa ul t_li mi t to n_ m ax_ fa ul t_li mi t to n_ m ax_ fa ul t_li mi t to n_ m ax_ fa ul t_li mi t psen 2 psen 5 rs 5 psen 1 rs 1 pg po we r-up timeslot 0 timeslot 1 note 3 timeslot 2 po we r-down po we r-down ignores timeslot assignments no tes 2, 4 no te 1 cont rol pi n or oper at io n co mm and no te s: 1. pg tr an siti on hi gh c an be de layed wi th mfr_ pg _d el ay. 2. alte rnate power-dow n sequenci ng op er atio n is to shut off all su pplies imme di ately. 3. if ton_max_fault_limit = 0000h, then the start of the next timeslot does not depend on vout_uv_fault_limit . 4. the fault pin being asse rt ed lo w can also ca us e a power-d ow n se qu en ce to o ccu r on global channels . ton_del ay ton_del ay ton_del ay ton_de la y toff _d el ay toff _d el ay po we r_ goo d_ on vout_uv_ fa ul t_li mi t po we r_ goo d_ on po we r_ good _o n po we r_ good _o n vout_uv_ fa ul t_li mi t vout_uv_ fa ul t_li mi t vout_uv_ fa ul t_li mi t power_good_off toff _d el ay toff _d el ay maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 28 timeslot 2 begins. the power supplies can be sequenced on in any order. since multiple power supplies can be assigned to a single timeslot, not all timeslots may be needed. however, timeslot assignment must be sequen - tial. global channels must start in timeslot 0, whereas local channels can be assigned to any timeslot. after all enabled supplies are turned on and above their respec - tive power-good-on levels, the pg output transitions high. the pg output transition can be delayed with the mfr_pg_delay command. when either the control pin goes inactive or the operation command is received (or the fault pin goes low for global chan - nels), the power supplies are sequenced off. the order in which the supplies are disabled is determined with the toff_delay configuration. alternatively, all the power supplies can be switched off immediately, as configured in on_off_config or with the operation command. dual-sequencing groups if enabled with the dual_seq bit in mfr_mode, the device implements two independent sequencing groups. each group has its own control, fault , and pg pins, as shown in table 5 . which power supplies are assigned to which sequencing group is different depending on the selected sequencing profile. each power-supply channel is assigned to either the primary or the secondary group with the group bit in mfr_seq_timeslot. there are special operation commands to allow a host to independently control the two sequencing groups. the watchdog timer function only uses the primary group to time the beginning of the watchdog startup when the watchdog is operated in the dependent mode. multiple device connections multiple MAX34460 devices (or even other max3445x and max3446x pmbus system managers from the maxim integrated family) can be connected together to increase the system channel count. figure 3 details the two possible connection schemes. the multi_ seq bits in the mfr_mode command are used to select the sequencing configuration. with the common control or common operation command sequencing arrangement, all the paral - leled devices share the same control, fault , and smbus signals. all the devices use a common signal (either the control pin or the operation command) to enable and disable all of the power supplies. any of the monitored power supplies can be configured with the mfr_fault_response com - mand to be tagged as global supplies and hence activate the fault signal and shut down all the other supplies tagged as global. with the cascaded sequencing arrangement, the pg output from upstream device is connected to the control input on the downstream device. the control input on the downstream device must be enabled with the on_off_config command. all the power supplies in the upstream device must be table 5. dual-sequencing groups figure 3. multiple device hardware connections sequencing group assigned signals alternate functionality primary control not available fault pg secondary control2 gpo4 fault2 gpo3 pg2 gpo5 MAX34460 scl / sda control fault MAX34460 scl / sda control fault MAX34460 scl / sda control fault common control/operation sequencing MAX34460 scl / sda control fault pg MAX34460 scl / sda control master slave slave fault pg MAX34460 scl / sda control fault pg cascaded sequencing maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 29 above the power_good_on level before the power supplies in the downstream device are sequenced on. when the control line is inactivated or the operation off command turns the supplies off in the master device, the pg output is pulled low when the first power supply falls below the power_good_ off level, which in turn initiates the shutdown of the channels in the first downstream device. a detected fault on any global power supply can also initiate the shutdown of the rest of the global power sup - ply channels by pulling the fault signal low. only channels in the primary sequencing group should be arranged in a cascaded sequence. user note: in cascaded sequencing, the master and slave devices must be powered up at the same time. also, all devices must be configured for the same latch off or retry configuration. system watchdog timer the device uses an internal watchdog timer that is internally reset every 5ms. in the event the device is locked up and this watchdog reset does not occur after 210ms, the device automatically resets. after the reset occurs, the device reloads all configuration values that were stored to flash and begins normal operation. after the reset, the device also does the following: 1) sets the mfr bit in status_word. 2) sets the watchdog_int bit in status_mfr_ specific (for page 255). 3) notifies the host through alert assertion (if enabled in mfr_mode). crc memory check upon reset, the device runs an internal algorithm to check the integrity of the key internal nonvolatile memory. if the crc check fails, the device does not power up and remains in a null state with all pins high impedance, but asserts the fault and fault2 outputs. alarm outputs the alarm0 and alarm1 pins are active-low, open-drain outputs that can be configured with the mfr_fault_response command to assert under any combination of undervoltage, overvoltage, or sequencing faults or warnings. if more than one channel is configured to assert either alarm output, the multiple channels are logically ored such that any enabled channel asserts the output. once asserted, the outputs remain asserted until they are cleared either by toggling the alarmclr input low or by setting the alarm_clr bit in mfr_mode. the current real-time status of the alarm outputs is reported in status_mfr_specific (page = 255). fault and fault2 input/output pins fault and fault2 are open-drain, active-low input/out - put pins. the primary purpose of the fault pins is to pro - vide sequencing control across multiple devices in fault situations. within the device, any power supply tagged as a global power supply (with the mfr_fault_ response command) asserts the associated fault pin to indicate to other global power supplies in other devices that action should be taken. the fault pins are also inputs that can be configured with the fault_ignore and fault2_ignore bits in the mfr_mode command to cause all global power supplies within the device to shut down and retry when fault is released. the input status of the fault pins is available in the status_mfr_ specific command when the page is set to 255. the fault pins are pulled low when the device is reset until monitoring begins. table 7. gpo pins table 6. device configuration quick reference action configuration enable a channel configure ton_max_fault_limit = 0000h to 7fffh. disable a channel configure ton_max_fault_limit = 8000h to ffffh. pin default functionality alternate gpo 24 alarm0 gpo0 25 alarm1 gpo1 12 alarmclr gpo2 17 fault2 gpo3 29 control2 gpo4 28 pg2 gpo5 40 wdo gpo6 41 wdi gpo7 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 30 monoff disable monitoring control input the monoff control (which is shared with the a0 i 2 c slave address-select function) is an active-low input with an internal weak pullup. to allow the device to properly set the i 2 c address, this pin should be high impedance upon power-up or device reset (it is recommended that a small-signal mosfet be used to pull this pin low). see the typical operating circuit for an example. after power- up, when this pin is pulled low, the device stops monitor - ing for overvoltage/undervoltage and temperature faults/ warnings and freezes the current state of the power-good and fault signals. the monoff input is useful in systems that do not use the external ds4424 current dacs to margin the power supplies and instead use some other technique such as a bed-of-nails tester. asserting this pin lets the system be margin tested without causing any voltage faults or warnings. the monoff input is ignored when faults are active and when the power-good signals are not asserted. no sequencing should be performed while monoff is active. external signal watchdog the external signal watchdog function is configured using the mfr_watchdog_config command. the startup sequence for the watchdog depends on whether the device is configured for dependent or independent mode operation. in the dependent mode, the pg output must be asserted before the watchdog startup timer begins. if dual sequencing is enabled, pg2 has no effect on the watchdog. in dependent mode, the watchdog function stops each time the pg output deasserts and wdo is deasserted; the device waits for pg to assert before once again starting the watchdog. in independent mode, the watchdog startup time begins after device startup. the watchdog startup time is defined with the wd_startup bits in mfr_watchdog_config. after the first rising edge is detected at the wdi input during the startup time, the watchdog begins expecting a rising edge to occur before the watchdog timeout period expires. each rising edge at wdi resets the watchdog timeout counter. the watchdog timeout period is defined with the wd_timeout bits in mfr_watchdog_ config. as an alternative to using the wdi input to reset the watchdog timeout counter, the wd_toggle bit in mfr_watchdog_config can be used. the wdo output can be used in conjunction with the power-good outputs to create a system reset or can also be used to shut down the supplies or restart them, depending on how the device is configured. in both dependent and independent modes, the wdo pin can also be configured to act as a manual-reset (mr) input. when the wd_wdo_mr bit is set in mfr_ watchdog_config, the wdo pin becomes a digital input/output pin that detects a falling edge, debounces the falling edge for a 200ms period, and then once the manual reset has been qualified, the device asserts the wdo output low for the time configured in mfr_pg_ delay before releasing the pin and restarting the watch - dog function. to prevent glitches from occurring in the reset signal, the device seizes the reset signal as soon as it qualifies the manual reset and holds the wdo output low for the mfr_pg_delay time. the mfr_pg_delay time should be configured for a time longer than the manual-reset pulse length. when the time configured in mfr_pg_delay expires, the device releases the reset signal and restarts the watchdog as long as the pin is high. if the pin is low when the wdo pin is released, the device waits for the pin to go high (debounced by 20ms) before restarting the watchdog function. see figure 4 . maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 31 figure 4. external watchdog operation pg wdi v dd wd_timeout wd_startup wd_timeout wdo high impedance mfr_pg_delay power-good wd_timeout startup for independent mode wdi wd_timeout wd_startup wd_timeout high impedance wd_timeout 125ms wd_startup wd_startup mfr_pg_delay startup for dependent mode high impedance system reset signal 10ki 10ki 10ki wdo pg wdi wdo control wdi watchdog hardware-control configurations pushbutton reset option mfr_pg_delay high impedance asserts system reset if watchdog fails or if power good deasserts, or if manual reset asserts power cycle all powe r supplies if watchdog fail s power cycle global powe r supplies if watchdog fail s control2 wdo fault wdi fault2 wdo maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 32 pmbus commands a summary of the pmbus commands supported by the device are described in the following sections. page (00h) the device can monitor up to 12 voltages, sequence up to 12 power supplies, and margin up to 12 power supplies using three external current dacs (ds4424). the device can monitor up to five temperature sensors, one internal local temperature sensor, plus four external remote temperature sensors (ds75lv). all the monitor - ing and control is accomplished using one pmbus (i 2 c) address. send the page command with data 0C11 and 13C17 (decimal) to select which power supply or tem - perature sensor is affected by all the following pmbus commands. not all commands are supported within each page. if an unsupported command is received, the cml status bit is set. some commands are common, which means that any selected page has the same effect on and the same response from the device. see table 8 for page commands. table 8. page commands page associated control 0 power supply monitored by rs0 and controlled by psen0 and optionally margined by out0 of the external ds4424 at i 2 c address 20h. 1 power supply monitored by rs1 and controlled by psen1 and optionally margined by out1 of the external ds4424 at i 2 c address 20h. 2 power supply monitored by rs2 and controlled by psen2 and optionally margined by out2 of the external ds4424 at i 2 c address 20h. 3 power supply monitored by rs3 and controlled by psen3 and optionally margined by out3 of the external ds4424 at i 2 c address 20h. 4 power supply monitored by rs4 and controlled by psen4 and optionally margined by out0 of the external ds4424 at i 2 c address 60h. 5 power supply monitored by rs5 and controlled by psen5 and optionally margined by out1 of the external ds4424 at i 2 c address 60h. 6 power supply monitored by rs6 and controlled by psen6 and optionally margined by out2 of the external ds4424 at i 2 c address 60h. 7 power supply monitored by rs7 and controlled by psen7 and optionally margined by out3 of the external ds4424 at i 2 c address 60h. 8 power supply monitored by rs8 and controlled by psen8 and optionally margined by out0 of the external ds4424 at i 2 c address a0h. 9 power supply monitored by rs9 and controlled by psen9 and optionally margined by out1 of the external ds4424 at i 2 c address a0h. 10 power supply monitored by rs10 and controlled by psen10 and optionally margined by out2 of the external ds4424 at i 2 c address a0h. 11 power supply monitored by rs11 and controlled by psen11 and optionally margined by out3 of the external ds4424 at i 2 c address a0h. 12 reserved. 13 internal temperature sensor. 14 external ds75lv temperature sensor with i 2 c address 90h. 15 external ds75lv temperature sensor with i 2 c address 92h. 16 external ds75lv temperature sensor with i 2 c address 94h. 17 external ds75lv temperature sensor with i 2 c address 96h. 18C254 reserved. 255 applies to all pages. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 33 table 9. operation command byte (when bit 3 of on_off_config = 1) table 10. operation command byte (when bit 3 of on_off_config = 0) note: active margining begins once power good has been exceeded for all channels. note: the device only takes action if the supply is enabled. the v out of all channels must exceed power_good_on for margin - ing to begin, or power good must be forced good through the test mode. set the page command to 255 when the following pmbus commands should apply to all pages at the same time. there are only a few commands (operation, clear_faults) where this function has a real application. operation (01h) the operation command is used to turn the power supply on and off in conjunction with the control input pin. the operation command is also used to cause the power supply to set the output voltage to the upper or lower margin voltages. the power supply stays in the com - manded operating mode until a subsequent operation command or a change in the state of the control pin (if enabled) instructs the power supply to change to another state. the valid operation command byte values are shown in table 9 . the operation command controls how the device responds when commanded to change the output. when the command byte is 00h, the device immediately turns the power supply off and ignores any programmed turn-off delay. when the command byte is set to 40h, the device powers down according to the programmed turn-off delay. in table 9 and table 10 , act on any fault means that if any warning or fault on the selected power supply is detected when the output is margined, the device treats this as a warning or fault and responds as programmed. ignore all faults means that all warnings and faults on the selected power supply are ignored. any command value not shown in table 9 is an invalid command. if the device receives a data byte that is not listed in table 9 , then it treats this as invalid data, declares a data fault (set cml bit and assert alert ), and responds, as described in the fault management and reporting section. user note: all power supplies tagged as global supplies (see mfr_fault_response) should be turned on and off at the same time by setting the page to 255. if supplies are turned on and off indepen - dently by setting the page from 0C11, then the sup - plies are not sequenced and only use their associated ton_delay and toff_delay settings, without any regard to the other supplies. for timeslot-defined sequenc - ing, global channels must start in timeslot 0; local channels can be assigned to any timeslot. command byte power supply on/off margin state 00h immediate off (no sequencing) 40h soft off (with sequencing) 80h on margin off 94h on margin low (ignore all faults) 98h on margin low (act on any fault) a4h on margin high (ignore all faults) a8h on margin high (act on any fault) command byte power supply on/off margin state 00h command has no effect margin off 40h command has no effect margin off 80h command has no effect margin off 94h command has no effect margin low (ignore all faults) 98h command has no effect margin low (act on any fault) a4h command has no effect margin high (ignore all faults) a8h command has no effect margin high (act on any fault) maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 34 special operation commands for dual-sequencing mode when the device is configured to operate in dual- sequencing mode (the dual_seq bit in mfr_mode is set), the operation command (described in table 10 ) applies to both the primary and secondary sequences. there are several special operation commands for individual control of the primary and secondary sequenc - es (see table 11 and table 12 ). in dual-sequencing mode, when the operation command is read, the channels always respond with the standard operation commands, not the special command bytes (01h, 41h, 81h, 02h, 42h, 82h). these special operation commands can only be used with the page set to 255. on_off_config (02h) the on_off_config command configures the com - bination of control input and pmbus operation commands needed to turn the power supply on and off. this indicates how the power supply is commanded when power is applied. table 13 describes the on_off_ config message content. the host should not modify on_off_config while the power supplies are active. when the device is configured to operate in dual- sequencing mode (the dual_seq bit in mfr_mode is set), the on_off_config command applies to both the primary and secondary sequences. table 13. on_off_config (02h) command byte table 11. special operation command bytes for primary sequence table 12. special operation command bytes for secondary sequence note: if both bits 2 and 3 are set, both the control pin and the operation command are required to turn the supplies on, and either one can turn the supplies off. command byte power supply on/off margin state 01h immediate off (no sequencing) 41h soft-off (with sequencing) 81h on margin off command byte power supply on/off margin state 02h immediate off (no sequencing) 42h soft-off (with sequencing) 82h on margin off bit purpose bit value meaning 7:5 reserved always returns 000. 4 turn on supplies when bias is present, or use the control pin and/or operation command. 0 turn on the supplies (with sequencing if so configured) as soon as bias is supplied to the device regardless of the control pin. 1 use control pin (if enabled) and/or operation command (if enabled). see note below. 3 operation command enable. 0 ignore the on/off portion of the operation command. 1 operation command enabled and required for action. 2 control pin enable. 0 ignore the control pin. 1 control pin enabled and required for action. 1 control pin polarity. 0 active low (drive low to turn on the power supplies). 1 active high (drive high to turn on the power supplies). 0 control pin turn-off action. 0 use the programmed turn-off delay (soft-off). 1 turn off the power supplies immediately. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 35 table 14. write_protect command byte clear_faults (03h) the clear_faults command is used to clear any latched fault or warning bits in the status registers that have been set and also unconditionally deasserts the alert output. this command clears all bits simultane - ously. the clear_faults command does not cause a power supply that has latched off for a fault condition to restart. the state of the psenn outputs under fault conditions is not affected by this command and changes only if commanded through the operation com - mand or control pin. if a fault is still present after the clear_faults command is executed, the fault status bit is immediately set again, but alert is not reasserted. alert is only asserted again when a new fault or warn - ing is detected that occurs after the clear_faults command is executed. this command is write-only. there is no data byte for this command. write_protect (10h) the write_protect command is used to provide protection against accidental changes to the devices operating memory. all supported commands can have their parameters read, regardless of the write_ protect settings. the write_protect message content is described in table 14 . store_default_all (11h) the store_default_all command instructs the device to transfer the complete device configuration information to the internal flash memory array. not all information is stored; only configuration data is stored, not any status or operational data. if an error occurs during the transfer, alert asserts if enabled and the cml bit in and status_word is set to 1. no bits are set in status_cml. this command is write-only. there is no data byte for this command. note: it is not recommended to use the store_default_all command while the device is operating power supplies. the device is unre - sponsive to pmbus commands and does not monitor power supplies while transferring the configuration. if the device configuration needs to be stored to flash while the device is operating the power supplies, it should be done one configuration parameter at a time using the mfr_store_single command. user note: v dd must be above 2.9v for the device to perform the store_default_all command. mfr_store_single (fch) mfr_store_single is a read/write word command that instructs the device to transfer a single configu - ration parameter to the internal flash memory array. the upper byte contains the page and the lower byte contains the pmbus command that should be stored. for example, if the ton_delay parameter for the power supply controlled by page 4 needs to be stored to flash, 0460h would be written with this command. when read, this command reports the last single page/ command written to flash. this command can be used while the device is operating the power supplies. if an error occurs during the transfer, alert asserts if enabled and the cml bit in status_word is set to 1. no bits are set in status_cml. note: the mfr_store_single command should only be invoked a maximum of 85 times before either a device reset is issued or a device power cycle occurs, or the restore_default_all command is invoked. also, mfr_store_single should not be used for commands that are not stored in flash. see table 1 for a list of commands that are stored in flash. user note: v dd must be above 2.9v for the device to perform the mfr_store_single command. note: no fault or error is generated if the host attempts to write to a protected area. command byte meaning 80h disables all writes except the write_protect command. 40h disables all writes except the write_protect, operation, and page commands. 20h disables all writes except the write_protect, operation, page, and on_off_config commands. 00h enables writes for all commands (default). maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 36 restore_default_all (12h) the restore_default_all command transfers the default configuration information from the internal flash memory array to the user memory registers in the device. the restore_default_all command should only be executed when the device is not operating the power supplies. upon a device power-on reset or any device reset, this command is automatically executed by the device without pmbus action required. this command is write-only. there is no data byte for this command. capability (19h) the capability command is used to determine some key capabilities of the device. the capability com - mand is read-only. the message content is described in table 15 . vout_mode (20h) the vout_mode command is used to report the data format of the device. the device uses the direct format for all the voltage-related commands. the value returned is 40h, indicating direct data format. this command is read-only. if a host attempts to write this command, the cml status bit is asserted. see table 3 for the m, b, and r values for the various commands. vout_margin_high (25h) the vout_margin_high command loads the device with the voltage to which the power-supply output is to be changed when the operation command is set to margin high. if the power supply is already operating at margin high, changing vout_margin_high has no effect on the output voltage. the device only adjusts the power supply to the new vout_margin_high voltage after receiving a new margin-high operation command. the 2 data bytes are in direct format. if the device cannot successfully close-loop margin the power supply, the device keeps attempting to margin the supply and does the following: 1) sets the margin bit in status_word. 2) sets the margin_fault bit in status_mfr_ specific (page 0C11). 3) notifies the host through alert assertion (if enabled in mfr_mode). vout_margin_low (26h) the vout_margin_low command loads the device with the voltage to which the power-supply output is to be changed when the operation command is set to margin low. if the power supply is already operating at margin low, changing vout_margin_low has no effect on the output voltage. the device only adjusts the power supply to the new vout_margin_low voltage after receiving a new margin-low operation command. the 2 data bytes are in direct format. if the device can - not successfully close-loop margin the power supply, the device keeps attempting to margin the supply and does the following: 1) sets the margin bit in status_word. 2) sets the margin_fault bit in status_mfr_ specific (page 0C11). 3) notifies the host through alert assertion (if enabled in mfr_mode). table 15. capability command byte bit description meaning 7 packet-error checking 0 = pec not supported. 6:5 pmbus speed 01 = maximum supported bus speed is 400khz. 4 alert 1 = device supports an alert output (if alert is enabled in mfr_mode). 0 = device does not support alert output (alert is disabled in mfr_mode). 3:0 reserved always returns 0000. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 37 vout_scale_monitor (2ah) in applications where the measured power-supply volt - age is not equal to the voltage at the adc input, vout_scale_monitor is used. for example, if the adc input expects a 1.8v input for a 12v output, vout_ scale_monitor = 1.8v/12v = 0.15. in applications where the power-supply output voltage is greater than the devices 2.048v input range, the output voltage of the power supply is sensed through a resistive voltage- divider. the resistive voltage-divider reduces or scales the output voltage. the pmbus commands specify the actual power-supply output voltages and not the input voltage to the adc. to allow the device to map between the high power-supply voltages (such as 12v) and the voltage at the adc input, the vout_scale_monitor command is used. the 2 data bytes are in direct format. this value is dimensionless. for example, if the required scaling factor is 0.15, then vout_scale_monitor should be set to 1333h (4915/32767 = 0.15). see table 16 for more examples. table 16. vout_scale_monitor examples table 17. parametric monitoring states * the full-scale adc voltage on the device is 2.048v. a scaling factor where a 1.8v adc input represents a nominal 100% voltage level is recommended to allow headroom for margining. resistor-dividers with a maximum source impedance of 1k ? must be used to measure voltage greater than 1.8v. nominal voltage level monitored (v) nominal adc input voltage level (v)* resistive voltge- divider ratio vout_scale_monitor value (hex) 1.8 or less 1.8 1.0 7fffh 2.5 1.8 0.72 5c28h 3.3 1.8 0.545454 45d1h 5 1.8 0.36 2e14h 12 1.8 0.15 1333h parameter required conditions for active monitoring action during a fault overvoltage ? power supply enabled (ton_max_fault_limit 8000h to ffffh) stop monitoring while psenn is inactive and resume monitoring before channel is restarted. undervoltage ? power supply enabled (ton_max_fault_limit 8000h to ffffh) ? psenn output is active ? channels vout must have exceeded vout_uv_fault during channel power-up stop monitoring while the power supply is off. power-up time ? power supply enabled (ton_max_fault_limit 8000h to ffffh or 0000h) ? psenn output is active monitor only during power-on. overtemperature ? temp sensor enabled (enable in mfr_temp_sensor_config = 1) continue monitoring. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 38 vout_ov_fault_limit (40h) the vout_ov_fault_limit command sets the value of the output voltage that causes an output overvoltage fault. the monitored voltage must drop by at least 2% below the limit before the fault is allowed to clear. this fault is masked until the output voltage is below this limit for the first time. the 2 data bytes are in direct for - mat. in response to the vout_ov_fault_limit being exceeded, the device does the following: 1) sets the vout_ov bit and the vout bit in status_ word. 2) sets the vout_ov_fault bit in status_vout. 3) responds as specified in the mfr_fault_ response. 4) notifies the host through alert assertion (if enabled in mfr_mode). vout_ov_warn_limit (42h) the vout_ov_warn_limit command sets the value of the output voltage that causes an output voltage high warning. the monitored voltage must drop by at least 2% below the limit before the warning is allowed to clear. this warning is masked until the output voltage is below this limit for the first time. this value is typically less than the output overvoltage threshold in vout_ov_fault_limit. the 2 data bytes are in direct format. in response to the vout_ov_warn_limit being exceeded, the device does the following: 1) sets the vout bit in status_word. 2) sets the vout_ov_warn bit in status_vout. 3) notifies the host using alert assertion (if enabled in mfr_mode). vout_uv_warn_limit (43h) the vout_uv_warn_limit command sets the value of the output voltage that causes an output-voltage low warning. the monitored voltage must increase by at least 2% above the limit before the warning is allowed to clear. this value is typically greater than the output undervoltage fault threshold in vout_uv_fault_limit. this warning is masked until the output voltage reaches the programmed vout_uv_warn_limit for the first time and also during turn-off when the power supply is disabled. the 2 data bytes are in direct format. in response to violation of the vout_uv_warn_limit, the device does the following: 1) sets the vout bit in status_word. 2) sets the vout_uv_warn bit in status_vout. 3) notifies the host using alert assertion (if enabled in mfr_mode). vout_uv_fault_limit (44h) the vout_uv_fault_limit command sets the value of the output voltage, which causes an output undervoltage fault. the monitored voltage must increase by at least 2% above the limit before the fault is allowed to clear. this fault is masked until the output voltage reaches the programmed vout_uv_fault_limit for the first time and also during turn-off when the power supply is disabled. the vout_uv_fault_limit threshold is also used to determine if ton_max_fault_limit is exceed - ed. the 2 data bytes are in direct format. in response to violation of the vout_uv_fault_limit, the device does the following: 1) sets the vout bit in status_word. 2) sets the vout_uv_fault bit in status_vout. 3) responds as specified in mfr_fault_response. 4) notifies the host using alert assertion (if enabled in mfr_mode). ot_fault_limit (4fh) the ot_fault_limit command sets the temperature, in degrees celsius, of the selected temperature sensor at which an overtemperature fault is detected. the moni - tored temperature must drop by at least 4 n c below the limit before the fault is allowed to clear. the 2 data bytes are in direct format. in response to the ot_fault_ limit being exceeded, the device does the following: 1) sets the temperature bit in status_word. 2) sets the ot_fault bit in status_temperature register. 3) responds as specified in the mfr_fault_ response. 4) notifies the host using alert assertion (if enabled in mfr_mode). maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 39 ot_warn_limit (51h) the ot_warn_limit command sets the temperature, in degrees celsius, of the selected temperature sensor at which an overtemperature warning is detected. the monitored temperature must drop by at least 4 n c below the limit before the warning is allowed to clear. the 2 data bytes are in direct format. in response to the ot_warn_limit being exceeded, the device does the following: 1) sets the temperature bit in status_word. 2) sets the ot_warn bit in status_temperature register. 3) notifies the host through alert assertion (if enabled in mfr_mode). power_good_on (5eh) the power_good_on command sets the value of the output voltage, which causes the pg output (and the pg2 output in dual-sequencing mode) to assert. all power supplies must be above their associated power_ good_on thresholds before the pg output is asserted. unused channels or disabled power supplies can use the test mode described in the user note below to force power good on the associated channel. all power supplies must also be above power_good_on for power-supply margining to begin. the power_good_ on level is normally set higher than the power_good_ off level. the 2 data bytes are in direct format. user note: there is a special test mode that forces a channel into and out of a power good state based on two unique values. if either of these settings is configured into power_good_on, the actual measured power-supply voltage is ignored and the logical state is forced. ? force power-good deassert = power_good_on = 7fffh ? force power-good assert = power_good_on = 0000h power_good_off (5fh) the power_good_off command sets the value of the output voltage that causes the pg output to deassert after it has been asserted. any power supply that falls below the associated power_good_off threshold causes the pg output to be deasserted. the power_ good_off level is normally set lower than the power_ good_on level. the 2 data bytes are in direct format. when the v out level of a power supply falls from greater than power_good_on to less than power_good_ off, the device does the following: 1) sets the power_good# bit in status_word. 2) sets the power_good# bit in status_mfr_ specific register (page 0C11). ton_delay (60h) in the pmbus-sequencing configuration, ton_delay sets the time, in milliseconds, from when a start condition is received (a valid operation command or through the control pin when enabled) until the psenn output is asserted. in the timeslot-sequencing configuration, ton_delay sets the time, in milliseconds, from the beginning of a timeslot until the psenn output is asserted. the undervoltage fault and warning are masked off during ton_delay. the 2 data bytes are in direct format. toff_delay (64h) the toff_delay sets the time, in milliseconds, from when a stop condition is received (a soft-off operation command or through the control pin when enabled) until the psenn output is deasserted. when commanded to turn off immediately (either through the operation command or the control pin), the toff_delay value is ignored. the 2 data bytes are in direct format. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 40 ton_max_fault_limit (62h) the ton_max_fault_limit sets an upper time limit, in milliseconds, from when the psenn output is asserted until the output voltage crosses the vout_uv_fault_ limit threshold. the 2 data bytes are in direct format. if the value is less than zero, then the power supply is not sequenced by the device and the associated psenn output remains deasserted and voltage faults are dis - abled. see table 18 for more details. in response to the ton_max_fault_limit being exceeded, the device does the following: 1) sets the vout bit in status_word. 2) sets the ton_max_fault bit in status_vout. 3) responds as specified in the mfr_fault_ response. 4) notifies the host using alert assertion (if enabled in mfr_mode). if an event is still present when the clear_faults command is issued, the bit is immediately asserted once again. when the alert latch is cleared, if any events are still present, they do not reassert the alert output. table 18. ton_max_fault_limit device response note 1: there is one-to-one correspondence between the rsn input and the psenn output for each page. note 2: see figure 5 for example hardware configurations. note 3: voltage monitoring includes overvoltage and undervoltage. note 4: the gpo configuration for psenn is set with the mfr_psen_config command and can be configured to override the normal sequencing action of the psenn output. sequencing configuration (note 2) ton_max_ fault_limit value device response (for each associated page) (note 1) sequencing response voltage fault monitoring ( note 3) use psenn as gpo ( note 4) standard 0001h to 7fffh device asserts psenn and monitors rsn to cross the undervoltage-fault limit in the time set by ton_max_fault_limit. enabled no blind 0000h device asserts psenn and monitors rsn but does not wait for rs to cross the undervoltage- fault limit. in timeslot sequencing, this channel exceeding undervoltage-fault limit is not used to time the start of the next timeslot. enabled no monitoring only 0000h psenn should be configured as gpo and rsn monitoring for faults and warnings is enabled. in timeslot sequencing, this channel should be assigned to timeslot 0 and ton_delay should be set to 0. enabled yes off 8000h to ffffh psenn should be configured as gpo and rsn monitoring for faults and warnings is disabled. defeated yes maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 41 figure 5. sequencing configurations ma x3 44 60 enable v out rsn page n standard sequencing ton_max_fault_limit = 0001h to 7fffh channel off ton_max_fault_limit = 8000h to ffffh ov/uv monitor sequencer read_vout /p g ov/uv monitor sequencer read_vout /p g ov/uv monitor sequencer read_vout /p g ov/uv monitor sequencer read_vout /p g gpo psenn power supply power supply digital output voltage source monitoring only ton_max_fault_limit = 0000h blind sequencing ton_max_fault_limit = 0000h ma x3 44 60 gpo digital output voltage source ma x3 44 60 gpo ma x3 44 60 enable v out gpo voltage source rsn page n psenn rsn page n psenn rsn page n psenn maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 42 figure 6. status register organization vo ut _o v_ fa ul t status_vout (pages 0?11) latch event fault_l og_full status_cml (all pages) event data_faul t latch event comm_faul t latch event vout_o v_ wa rn latch event vo ut_u v_ faul to r or or or and clear or off status_mfr_specific (pages 0?11) event power_good# event margin_fault latch event status_temperature (pages 13?17) ot_warn latch event ot_fault latch event or latch event vout_uv_ wa rn latch event ton_m ax _fau lt latch event lock status_mfr_specific (page 255) status_word (all pages) event alarm0 event alarm1 event watchdog_wdo latch event fault2_input latch event fault_input latch latch event watchdog_int temperature sys_off power_good# vout_ov vout cml margin mfr latch event control# latch clear_faults command alert response address (ara) received and arbitration won alert bit in mfr_mode event alert output maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 43 status_word (79h) the status_word command returns 2 bytes of information with a summary of the reason for a fault. the status_word message content is described in table 19 . see figure 6 for status register organization. status_vout (7ah) the status_vout command returns 1 byte of informa - tion with contents, as described in table 20 . all the bits in status_vout are latched. when cleared, the bits are set again if the condition persists, or in the case of ton_max_fault, when the event occurs again. table 19. status_word table 20. status_vout note: the setting of the sys_off and power_good# bits do not assert the alert signal. bit name meaning 15 vout an output voltage fault or warning or ton_max_fault has occurred. 14 0 this bit always returns a 0. 13 0 this bit always returns a 0. 12 mfr a bit in status_mfr_specific (page = 255) has been set. 11 power_good# any power-supply voltage has fallen from power_good_on to less than power_good_ off (logical or of all the power_good# bits in status_mfr_specifc). 10 0 this bit always returns a 0. 9 0 this bit always returns a 0. 8 margin a margining fault has occurred. 7 0 this bit always returns a 0. 6 sys_off set when any of the power supplies are sequenced off (logical or of all the off bits in status_mfr_specifc). 5 vout_ov an overvoltage fault has occurred. 4 0 this bit always returns a 0. 3 0 this bit always returns a 0. 2 temperature a temperature fault or warning has occurred. 1 cml a communication, memory, or logic fault has occurred. 0 0 this bit always returns a 0. bit name meaning latched 7 vout_ov_fault v out overvoltage fault. yes 6 vout_ov_warn v out overvoltage warning. yes 5 vout_uv_warn v out undervoltage warning. yes 4 vout_uv_fault v out undervoltage fault. yes 3 0 this bit always returns a 0. 2 ton_max_fault ton maximum fault. yes 1 0 this bit always returns a 0. 0 0 this bit always returns a 0. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 44 status_temperature (7dh) the status_temperature command returns 1 byte of information with contents, as described in table 21 . all the bits in status_vout are latched. when cleared, the bits are set again if the condition persists. status_cml (7eh) the status_cml command returns 1 byte of infor - mation with contents, as described in table 22 . the comm_fault and data_fault bits are latched. when cleared, the bits are set again when the event occurs again. the fault_log_full bit reflects the current real-time state of the fault log. table 21. status_temperature table 22. status_cml * when nv fault log overwrite is enabled (nv_log_overwrite = 1 in mfr_nv_log_config), fault_log_full will be set when the fault log is full but will clear when the fault log is overwritten since two fault logs are cleared before each overwrite. bit name meaning latched 7 ot_fault overtemperature fault. yes 6 ot_warn overtemperature warning. yes 5 0 this bit always returns a 0. 4 0 this bit always returns a 0. 3 0 this bit always returns a 0. 2 0 this bit always returns a 0. 1 0 this bit always returns a 0. 0 0 this bit always returns a 0. bit name meaning latched 7 comm_fault an invalid or unsupported command has been received. yes 6 data_fault an invalid or unsupported data has been received. yes 5 0 this bit always returns a 0. 4 0 this bit always returns a 0. 3 0 this bit always returns a 0. 2 0 this bit always returns a 0. 1 0 this bit always returns a 0. 0 fault_log_full mfr_nv_fault_log is full and needs to be cleared.* no maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 45 table 23. status_mfr_specific (for pages 0C11) table 24. status_mfr_specific (for page 255) status_mfr_specific (80h) the status_mfr_specific message content varies based on the selected page, and is described in table 23 and table 24 . read_vout (8bh) the read_vout command returns the actual measured (not commanded) output voltage. read_vout is mea - sured and updated every 5ms. the 2 data bytes are in direct format. note: the setting of the off and power_good# bits do not assert the alert signal. note 1: the setting of the lock bit does not assert the alert signal. note 2: the faultn status bits are set even if the faultn pins are configured in mfr_mode to ignore the fault pin. the fault2_input status bit only functions if the device is in dual-sequencing mode. note 3: in dual-sequencing mode, either control input sets this bit. on_off_config must be set to use the control pin for this status bit to function. bit name meaning latched 7 off for enabled channels (ton_max_fault_limit r 0), this bit reflects the output state of the sequencer and is set when psenn is not asserted due to either a sequencing delay or fault, or the power supply being turned off. this bit is always cleared when the channel is disabled (ton_max_fault_limit < 0). if psenn is reconfigured as a gpo, this bit does not reflect the state of the pin. no 6 0 this bit always returns a 0. 5 0 this bit always returns a 0. 4 0 this bit always returns a 0. 3 margin_fault this bit is set if the device cannot properly close-loop margin the power supply. yes 2 power_good# this bit is set when the power-supply voltage has fallen from power_ good_on to less than power_good_off. in the pg test mode, this bit reflects the forced pg state. on device reset, this bit is set until the power supply is greater than power_good_on. no 1 0 this bit always returns a 0. 0 0 this bit always returns a 0. bit name meaning latched 7 lock set when the device is password protected (note 1). no 6 fault_input set each time the fault input is pulled low (note 2). yes 5 fault2_input set each time the fault2 input is pulled low (note 2). yes 4 watchdog_int set upon device reset when the internal watchdog has caused the device reset. yes 3 control# set each time the control input is deasserted (note 3). yes 2 wdo set each time the external wdo pin is asserted. yes 1 alarm1 set when the alarm1 output is active. no 0 alarm0 set when the alarm0 output is active. no maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 46 read_temperature_1 (8dh) the read_temperature_1 command returns the tem - perature returned from the temperature sensor. read_ temperature_1 returns 7fffh if the sensor is faulty and 0000h if the sensor is disabled. read_temperature_1 is measured and updated once per second. the 2 data bytes are in direct format. pmbus_revision (98h) the pmbus_revision command returns the revision of the pmbus specification to which the device is compliant. the command has 1 data byte. bits [7:4] indicate the revision of pmbus specification part i to which the device is compliant. bits [3:0] indicate the revision of pmbus specification part ii to which the device is compliant. this command is read-only. the pmbus_revision value returned is always 11h, which indicates that the device is compliant with part i rev 1.1 and part ii rev 1.1. mfr_id (99h) the mfr_id command returns the text (iso/iec 8859-1) character of the manufacturers (maxim) identification. the default mfr_id value is 4dh (m). this command is read-only. mfr_model (9ah) the mfr_model command returns the text (iso/iec 8859-1) character of the device model number. the default mfr_model value is 57h (w). this command is read-only. mfr_revision (9bh) the mfr_revision command returns two text (iso/ iec 8859-1) characters that contain the device revision numbers for hardware (upper byte) and firmware (lower byte). this command is read-only. mfr_location (9ch) the mfr_location command loads the device with text (iso/iec 8859-1) characters that identify the facility that manufactures the power supply. the maximum num - ber of characters is 8. this data is written to internal flash using the store_default_all command. the factory default text string value is 10101010. mfr_date (9dh) the mfr_date command loads the device with text (iso/iec 8859-1) characters that identify the date of manufacture of the power supply. the maximum number of characters is 8. this data is written to internal flash using the store_default_all command. the factory- default text string value is 10101010. mfr_serial (9eh) the mfr_serial command loads the device with text (iso/iec 8859-1) characters that uniquely identify the device. the maximum number of characters is 8. this data is written to internal flash using the store_ default_all command. the factory-default text string value is 10101010. the upper 4 bytes of mfr_serial are used to unlock a device that has been password pro - tected. the lower 4 bytes of mfr_serial are not used to unlock a device and can be set to any value. mfr_mode (d1h) the mfr_mode command is used to configure the device to support manufacturer-specific commands. the mfr_mode command should not be changed while power supplies are operating. the mfr_mode com - mand is described in table 25 . maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 47 table 25. mfr_mode bit name meaning 15:14 multi_seq[1:0] these bits set the sequencing configuration for the primary sequencing group. the secondary sequencing group should not use cascaded sequencing if the group involves multiple devices. 00 = single device or multiple devices with common control or common operation command. 01 = multiple devices with cascaded sequencingCslave device. 10 = multiple devices with cascaded sequencingCmaster device with latchoff. 11 = multiple devices with cascaded sequencingCmaster device with retry. 13 alert 0 = alert disabled (device does not respond to ara). 1 = alert enabled (device does respond to ara). 12 seq 0 = pmbus-defined time-based sequencing. 1 = timeslot-defined event-based sequencing. 11 soft_reset this bit must be set, then cleared and set again within 8ms for a soft-reset to occur. 10 lock this bit must be set, then cleared and set again within 8ms for the device to become password protected. this bit is cleared when the password is unlocked. the device should only be locked and then unlocked a maximum of 256 times before either a device reset is issued or a device power cycle occurs. 9:8 0 these bits always return a 0. 7:6 adc_time[1:0] these bits select the adc conversion time. adc_time[1:0] adc conversion time (s) 00 1 01 2 10 4 11 8 5 dual_seq 0 = single-sequence mode. 1 = dual-sequence mode. 4 fault_ignore 0 = shut down all global primary channels when fault is pulled low. 1 = ignore fault if pulled low ( fault still asserted as configured in mfr_fault_ response). 3:2 adc_average[1:0] these bits select the post adc conversion averaging: adc_average[1:0] adc averaging 00 no averaging 01 average 2 samples 10 average 4 samples 11 average 8 samples 1 fault2_ignore 0 = shut down all global secondary channels when fault2 is pulled low. 1 = ignore fault2 if pulled low ( fault2 still asserted as configured in mfr_fault_ response). 0 alarm_clr setting this bit to a 1 clears alarm0 and alarm1 if they are asserted. once set, the device clears this bit when the action is completed. the host must set again for subsequent action. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 48 mfr_psen_config (d2h) the mfr_psen_config command is used to configure the individual psenn outputs. this command should not be changed while the power supplies are operating. the mfr_psen_config command is described in table 26 and table 27 . table 26. psenn configuration table 27. mfr_psen_config command byte psenn configuration 00 normal power-supply enable/disable control action active low push-pull 40 active high 80 active low open drain c0 active high 01 override action (gpo mode) force low push-pull 41 force high 81 force low open drain c1 force high bit name meaning 7 psen_pp_od 0 = psenn push-pull output. 1 = psenn open-drain output. 6 psen_hi_lo 0 = psenn active-low. 1 = psenn active-high. 5:1 0 these bits always return a 0. 0 override when this bit is set to a 1, the associated psenn output pin no longer responds as a normal enable/disable for the power supply, but rather is forced active either high or low as indicated by bit 6 and is configured as either open drain or push-pull as configured by bit 7. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 49 table 28. mfr_seq_timeslot mfr_seq_timeslot (d3h) the mfr_seq_timeslot command is used in the time- slot-defined sequencing mode (seq bit in mfr_mode is set) to determine which timeslot the psenn output is associated with and the command is also used in the dual-sequencing mode (dual_seq bit in mfr_mode is set) to assign channels to a group. in the timeslot- defined sequencing mode, multiple psenn outputs can be assigned to the same timeslot. not all timeslots must be used, but the ordering must be sequential. global channels must start with timeslot 0. local channels can be assigned to any timeslot. the mfr_seq_timeslot command is described in table 28 . mfr_vout_peak (d4h) the mfr_vout_peak command returns the maximum actual measured output voltage. to reset this value to 0, write to this command with a data value of 0. any values written to this command are used as a comparison for future peak updates. the 2 data bytes are in direct format. mfr_temperature_peak (d6h) the mfr_temperature_peak command returns the maximum measured temperature. to reset this value to its lowest value, write to this command with a data value of 8000h. any other values written by this command are used as a comparison for future peak updates. the 2 data bytes are in direct format. mfr_vout_min (d7h) the mfr_vout_min command returns the minimum actual measured output voltage. to reset this value, write to this command with a data value of 7fffh. any values written to this command are used as a comparison for future minimum updates. the 2 data bytes are in direct format. mfr_temperature_avg (e3h) the mfr_temperature_avg command returns the calculated average temperature. to reset the average, write to this command with a data value of 0. any other values written by this command are ignored. the 2 data bytes are in direct format. bit name meaning 7:6 0 these bits always return a 0. 5 group (dual-sequence mode only) this bit is used in dual-sequencing mode to determine the sequencing channel assignment. this bit is ignored if the dual-sequencing mode is disabled (dual_seq bit in mfr_mode is cleared). 0 = channel is assigned to the primary sequencing group. 1 = channel is assigned to the secondary sequencing group. 4 0 these bits always return a 0. 3:0 timeslot[3:0] timeslot assignment (ignored in pmbus sequence mode): 0000 timeslot 0 1000 timeslot 8 0001 timeslot 1 1001 timeslot 9 0010 timeslot 2 1010 timeslot 10 0011 timeslot 3 1011 timeslot 11 0100 timeslot 4 1100 reserved 0101 timeslot 5 1101 reserved 0110 timeslot 6 1110 reserved 0111 timeslot 7 1111 reserved maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 50 mfr_nv_log_config (d8h) the mfr_nv_log_config command is used to configure the operation of the nonvolatile fault logging in the device. the mfr_nv_log_config command is described in table 29 . table 29. mfr_nv_log_config * the device clears two fault logs at a time when overwrite is enabled. bit name meaning 15 force_nv_fault_log setting this bit to a 1 forces the device to log data into the nonvolatile fault log. once set, the device clears this bit when the action is completed. the host must set again for subsequent action. if an error occurs during this action, the device sets the cml bit in status_word; no bits are set in status_cml. 14 clear_nv_fault_log setting this bit to a 1 forces the device to clear the nonvolatile fault log by writing ffh to all byte locations. once set, the device clears this bit when the action is completed. the host must set again for subsequent action. if an error occurs during this action, the device sets the cml bit in status_word; no bits are set in status_cml. while clearing the fault log, monitoring is stopped and commands should not be sent to the pmbus port. 13:11 0 these bits always return a 0. 10 nv_log_t0_config this bit determines the source of the data written into the t0 location of each page when a nonvolatile fault log is written. 0 = log the last regular collection interval adc reading. 1 = read the latest adc value before logging. 9 nv_log_overwrite 0 = do not overwrite the nv fault log. 1 = overwrite the nv fault log once it is full.* 8:7 nv_log_depth[1:0] these bits determine the depth of the nv fault log: adc result collection nv fault log nv_log_depth[1:0] interval (ms) depth (ms) 00 5 25 01 20 100 10 80 400 11 160 800 6 nv_log_fault 0 = do not write nv fault log when fault or fault2 is externally pulled low. 1 = write nv fault log when fault or fault2 is externally pulled low if the fault_ ignore or fault_ignore2 bits are not set in mfr_mode. 5:0 0 these bits always return a 0. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 51 mfr_fault_response (d9h) the mfr_fault_response command specifies the response to each fault or warning condition supported by the device. in response to a fault/warning, the device always reports the fault/warning in the appropriate sta - tus register and asserts the alert output (if enabled in mfr_mode). a cml fault cannot cause any device action other than setting the status bit and asserting the alert output. the mfr_fault_response command is described in table 30 and figure 7 . local vs. global channels with the mfr_fault_response command (bit 14), each power-supply channel can be tagged as either being local or global. when bit 14 is cleared, the channel is configured as a local channel, which means that a detected fault only affects this channel. with the response bits in the mfr_fault_response command, the device can be configured to respond differently to each possible fault. when bit 14 is set, the channel is configured as a global channel, which means that a detected fault on this channel affects all other channels also tagged as global channels within their respective sequencing group (i.e., either the primary or secondary sequencing group). also, any global channel can be configured to assert their associated hardware fault signal pins ( fault for the primary sequencing group and fault2 for the second - ary sequencing group). only global channels respond to assertions of the fault pins; local channels do not respond to the fault pins. in the timeslot-defined sequenc - ing mode, global channels must start with timeslot 0. local channels can be assigned to any timeslot. fault detection before psenn assertion before any power-supply channel is enabled, the device checks for overvoltage and temperature faults. with global channels, all channels must be clear of faults and the fault pins must be deasserted (if enabled) before the channels are allowed to be enabled. table 30. mfr_fault_response (note 1) note 1: the fault response for power-supply faults is determined by the programmed mfr_fault_response for the faulting channel. if this channel is part of a global group, this fault response is performed for all of the global channels. note 2: the filter selection does not apply to temperature or sequencing faults. note 3: all enabled temperature-sensor faults are logically ored together. note 4: temperature faults affect all enabled power supplies. supplies that are designated as global all respond in the same manner. this response is the worst-case response of the global channels for the given fault. supplies that are not global respond to a temperature fault based upon the programmed response for the particular supply. bit name meaning 15 nv_log 0 = do not log the fault into mfr_nv_fault_log. 1 = log the fault into mfr_nv_fault_log. 14 global 0 = local (affects only the selected page power supply). 1 = global (affects all supplies with global = 1). 13:12 filter[1:0] excursion time before a fault or warning is declared and action is taken (note 2). 00 = immediate 01 = 2ms 10 = 3ms 11 = 4ms 11:8 alarm_config[3:0] see table 31. 7:6 ot_fault_limit_response[1:0] see tables 32 and 33 (notes 3 and 4). 5:4 ton_ max_fault_limit_response[1:0] see tables 32 and 33. 3:2 vout_uv_fault_limit_response[1:0] see tables 32 and 33. 1:0 vout_ov_fault_limit_response[1:0] see tables 32 and 33. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 52 figure 7. mfr_fault_response operation overvoltage fault fault warning status registers nv_fault_log shutdown sequencing fault warning monitoring 12 channels sequencing error undervoltage fault input/ output warning fault temperature sensors ds75lv ds75lv internal global bit psen0 global bit psen1 global bit psen2 global bit psen3 global bit psen4 global bit psen5 global bit psen6 global bit psen7 global bit psen8 global bit psen9 global bit psen10 global bit on_off_config bit 0 shutdown immediately or sequence off fault_ignore bit in mfr_mode alarm_config mf r_ fa u lt_ re sp onse psen11 and alarm0 output latch alarm1 output alarmclr input latch ds75lv ds75lv or maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 53 logging faults into mfr_nv_fault_log if bit 15 of mfr_fault_response is set, faults are logged into the on-board nonvolatile fault log for this channel unless the response for the associated fault is configured to take no action (response[1:0] = 00). to keep from needlessly filling the fault log with excessive data, the following rules are applied when subsequent faults occur. when overvoltage faults occur, subsequent overvoltage faults on this channel are not written to the fault log until either the clear_faults command is issued or the associated psenn output has been deas - serted for any reason. the same rule applies to undervolt - age. when an overtemperature fault occurs, subsequent overtemperature faults on the faulting temperature sen - sor are not written to the fault log until a clear_faults command is written. all sequencing faults are written to the fault log. table 31. alarm_config codes alarm_config[3:0] alarm output selected alarm condition alarm criteria 0000 alarm0 none 0001 alarm0 sequencing fault fault only 0010 alarm0 undervoltage only fault only 0011 alarm0 undervoltage only fault or warning 0100 alarm0 overvoltage only fault only 0101 alarm0 overvoltage only fault or warning 0110 alarm0 undervoltage or overvoltage fault only 0111 alarm0 undervoltage or overvoltage fault or warning 1000 alarm1 none 1001 alarm1 sequencing fault fault only 1010 alarm1 undervoltage only fault only 1011 alarm1 undervoltage only fault or warning 1100 alarm1 overvoltage only fault only 1101 alarm1 overvoltage only fault or warning 1110 alarm1 undervoltage or overvoltage fault only 1111 alarm1 undervoltage or overvoltage fault or warning maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 54 table 32. mfr_fault_response codes for global channels table 33. mfr_fault_response codes for local channels note: alert is asserted, if enabled, when a new status bit is set. a status bit is latched when a particular fault occurs that causes a fault response. note: alert is asserted, if enabled, when a new status bit is set. a status bit is latched when a particular fault occurs that causes a fault response. response[1:0] fault response 11 ? set the corresponding fault bit in the appropriate status register. ? log fault into mfr_nv_fault_log if nv_log = 1. ? continue operation. 10 (retry) ? shut down the power supply by deasserting the psenn output. all enabled global power supplies are shut down in sequence as configured with toff_delay, or they are all shut down immediately as configured by bit 0 in on_off_config. wait for the time configured in mfr_fault_retry and restart supplies in sequence as configured. ? assert the fault or fault2 output until faults on all global supplies clear and mfr_ fault_retry expires. ? set the corresponding fault bit in the appropriate status register. ? log fault into mfr_nv_fault_log if nv_log = 1. 01 (latch off) ? latch off the power supply by deasserting the psenn output. all enabled global power supplies are either shut down in sequence as configured with toff_delay, or they are shut down immediately as configured by bit 0 in on_off_config. ? assert the fault or fault2 outputs. ? set the corresponding fault bit in the appropriate status register. ? log fault into mfr_nv_fault_log if nv_log = 1. 00 ? set the corresponding fault bit in the appropriate status register. ? continue operation without any action. response [1:0] fault response 11 ? set the corresponding fault bit in the appropriate status register. ? log fault into mfr_nv_fault_log if nv_log = 1. ? continue operation. 10 (retry) ? shut down the power supply by deasserting the psenn output. all power supplies are shut down in sequence as configured with toff_delay or they are all shut down immediately as configured by bit 0 in on_off_config. wait for the time configured in mfr_fault_retry and restart the supply. ? set the corresponding fault bit in the appropriate status register. ? log fault into mfr_nv_fault_log if nv_log = 1. 01 (latchoff) ? latch off the power supply by deasserting the psenn output. all power supplies are shut down in sequence as configured with toff_delay or they are all shut down immediately as configured by bit 0 in on_off_config. ? set the corresponding fault bit in the appropriate status register. ? log fault into mfr_nv_fault_log if nv_log = 1. 00 ? set the corresponding fault bit in the appropriate status register. ? continue operation without any action. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 55 power-supply retry with undervoltage faults if the power supply is configured to retry when an under - voltage fault occurs, the power supply is turned off for the fault retry time and then the power supply is turned back on by asserting the psenn output. if the undervoltage fault still exists, the ton_max_fault_limit is exceed - ed and the device takes fault action as configured. mfr_fault_retry (dah) the mfr_fault_retry command sets the delay time between a power supply being shut down by a fault response and the power supply restarting. this com - mand value is used for all fault responses that require delay retry. if global supplies are being sequenced off, the retry delay time does not begin until the last global channel is turned off. the 2 data bytes are in direct format. when mfr_fault_retry = 0000h, the device restarts the power supply at the next available time period. mfr_pg_delay (dbh) the mfr_pg_delay command sets the delay time between when a power good is determined and the pg output is asserted. the 2 data bytes are in direct format. when mfr_pg_delay = 0000h, the delay is disabled and the pg output is asserted immediately after power good is declared. when the device is configured to operate in dual- sequencing mode (the dual_seq bit in mfr_mode is set), the mfr_pg_delay command applies to both the primary and secondary sequences. mfr_pg_delay is also used to set the external signal watchdog wdo active-low time. for the watchdog func - tion, when mfr_pg_delay = 0000h, the wdo active- low time is set to 5ms. mfr_nv_fault_log (dch) each time the mfr_nv_fault_log command is exe - cuted, the device returns a block of 255 bytes containing one of the 15 nonvolatile fault logs. the mfr_nv_fault_ log command must be executed 15 times to dump the complete nonvolatile fault log. if the returned fault log is all ffs (except bytes 0 and 1), this indicates that this fault log has not been written by the device. as the device is operating, it is reading the latest operating conditions for voltage and temperature and is updating the status registers. all this information is stored in on-board ram. when a fault is detected (if so enabled in mfr_fault_ response), the device automatically logs this informa - tion to one of the 15 nonvolatile fault logs ( figure 8 ). after 15 faults have been written, bit 0 of status_cml is set and the device can be configured (with the nv_log_ overwrite bit in mfr_nv_log_config) to either stop writing additional fault logs or to write over the old - est data. the host can clear the fault log by setting the clear_nv_fault_log bit in mfr_nv_log_config. if a temperature sensor is disabled, the associated fault- log position returns 0000h. figure 8. mfr_nv_fault_log fault_log_index fault_log_count mfr_time_count status_word status_vout status_mfr_specific status_cml status_temperature read_vout (5 readings) read_temperature_1 mfr_vout_peak mfr_temperature_peak mfr_vout_min mfr_temperature_avg fault occurrence each fault is written into the next fault log each command read accesses the next fault log mfr_nv_fault_log fault log index 0 (255 bytes) fault log index 1 (255 bytes) fault log index 2 (255 bytes) fault log index 14 (255 bytes) ram flash maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 56 there is a fault_log_count (16-bit counter) at the beginning of each fault log that indicates which fault log is the latest. this counter rolls over should more than 65,535 faults be logged. this counter is not cleared when the clear_nv_fault_log bit in mfr_nv_log_ config is toggled. the 255 bytes returned by the mfr_ nv_fault_log command are described in table 34 . if an error occurs while the device is attempting to write or clear the mfr_nv_fault_log, the device sets the cml bit in status_word; no bits are set in status_ cml. alert is asserted (if enabled in mfr_mode). user note: v dd must be above 2.9v for the device to clear or log data into mfr_nv_fault_log. table 34. mfr_nv_fault_log byte parameter byte parameter 0 00h/fault_log_index 128 read_vout t4 page 7 2 fault_log_count 130 read_vout t0 page 8 4 mfr_time_count (lsw) 132 read_vout t1 page 8 6 mfr_time_count (msw) 134 read_vout t2 page 8 8 0000h 136 read_vout t3 page 8 10 status_cml/00h 138 read_vout t4 page 8 12 status_word 140 read_vout t0 page 9 14 status_vout pages 0/1 142 read_vout t1 page 9 16 status_vout pages 2/3 144 read_vout t2 page 9 18 status_vout pages 4/5 146 read_vout t3 page 9 20 status_vout pages 6/7 148 read_vout t4 page 9 22 status_vout pages 8/9 150 read_vout t0 page 10 24 status_vout pages 10/11 152 read_vout t1 page 10 26 status_mfr_specific pages 0/1 154 read_vout t2 page 10 28 status_mfr_specific pages 2/3 156 read_vout t3 page 10 30 status_mfr_specific pages 4/5 158 read_vout t4 page 10 32 status_mfr_specific pages 6/7 160 read_vout t0 page 11 34 status_mfr_specific pages 8/9 162 read_vout t1 page 11 36 status_mfr_specific pages 10/11 164 read_vout t2 page 11 38 status_mfr_specific pages 255/00h 166 read_vout t3 page 11 40 status_temperature pages 13/14 168 read_vout t4 page 11 42 status_temperature pages 15/16 170 0000h 44 status_temperature pages 17/00h 172 mfr_vout_peak page 0 46 0000h 174 mfr_vout_peak page 1 48 0000h 176 mfr_vout_peak page 2 50 read_vout t0 page 0 178 mfr_vout_peak page 3 52 read_vout t1 page 0 180 mfr_vout_peak page 4 54 read_vout t2 page 0 182 mfr_vout_peak page 5 56 read_vout t3 page 0 184 mfr_vout_peak page 6 58 read_vout t4 page 0 186 mfr_vout_peak page 7 60 read_vout t0 page 1 188 mfr_vout_peak page 8 62 read_vout t1 page 1 190 mfr_vout_peak page 9 64 read_vout t2 page 1 192 mfr_vout_peak page 10 66 read_vout t3 page 1 194 mfr_vout_peak page 11 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 57 table 34. mfr_nv_fault_log (continued) mfr_time_count (ddh) the mfr_time_count command returns the current value of a real-time counter that increments every 5ms, 20ms, 80ms, or 160ms depending on the configuration of the nv_log_depth bits in mfr_nv_log_config. this counter is useful in determining the time between multiple faults. the counter is a 32-bit value that rolls over. the count is reset to zero upon device power cycle or rst action, or a soft-reset. this count can also be reset to zero by writing a sequence of all zeros (00000000h), followed by all ones (ffffffffh), followed by all zeros (00000000h) within 8ms. note: log_valid is set to ddh if the fault log contains valid data. for read_vout, t4 is the oldest reading and t0 is the newest reading. byte parameter byte parameter 68 read_vout t4 page 1 196 mfr_vout_min page 0 70 read_vout t0 page 2 198 mfr_vout_min page 1 72 read_vout t1 page 2 200 mfr_vout_min page 2 74 read_vout t2 page 2 202 mfr_vout_min page 3 76 read_vout t3 page 2 204 mfr_vout_min page 4 78 read_vout t4 page 2 206 mfr_vout_min page 5 80 read_vout t0 page 3 208 mfr_vout_min page 6 82 read_vout t1 page 3 210 mfr_vout_min page 7 84 read_vout t2 page 3 212 mfr_vout_min page 8 86 read_vout t3 page 3 214 mfr_vout_min page 9 88 read_vout t4 page 3 216 mfr_vout_min page 10 90 read_vout t0 page 4 218 mfr_vout_min page 11 92 read_vout t1 page 4 220 0000h 94 read_vout t2 page 4 222 read_temperature_1 page 13 96 read_vout t3 page 4 224 read_temperature_1 page 14 98 read_vout t4 page 4 226 read_temperature_1 page 15 100 read_vout t0 page 5 228 read_temperature_1 page 16 102 read_vout t1 page 5 230 read_temperature_1 page 17 104 read_vout t2 page 5 232 mfr_temperature_peak page 13 106 read_vout t3 page 5 234 mfr_temperature_peak page 14 108 read_vout t4 page 5 236 mfr_temperature_peak page 15 110 read_vout t0 page 6 238 mfr_temperature_peak page 16 112 read_vout t1 page 6 240 mfr_temperature_peak page 17 114 read_vout t2 page 6 242 mfr_temperature_avg page 13 116 read_vout t3 page 6 244 mfr_temperature_avg page 14 118 read_vout t4 page 6 246 mfr_temperature_avg page 15 120 read_vout t0 page 7 248 mfr_temperature_avg page 16 122 read_vout t1 page 7 250 mfr_temperature_avg page 17 124 read_vout t2 page 7 252 0000h 126 read_vout t3 page 7 254 log_valid maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 58 mfr_margin_config (dfh) the mfr_margin_config command configures the external ds4424 current dac (if present) to margin the associated power supplies. the mfr_margin_config command is described in table 35 . for the power supplies connected to psenn (pages 0C11), power-supply margining is implemented using the external ds4424 dac outputs, according to table 36 . the devices closed loop controls the dac output current setting to margin the power supply. the device margins the power supplies when operation is set to one of the margin states. margining of the supplies does not begin until all power supplies have exceeded their programmed power_good_on levels. when this happens, the dac output is enabled and margining is initiated. the device then averages four samples of v out for a total time of 20ms. if the measured v out and the target (set by either vout_ margin_high or vout_margin_low) differ by more than 1%, the dac setting is adjusted by one step that is 1/64 of full scale. the direction of the duty-cycle adjust - ment is determined by the slope bit in mfr_margin_ config. all changes to the dac setting are made after averaging four samples of v out over a 20ms period. table 35. mfr_margin_config table 36. power-supply margining with ds4424 dac outputs bit name meaning 15 slope dac setting to resulting voltage relationship. 0 = negative slope (dac source current results in a lower voltage). 1 = positive slope (dac source current results in a higher voltage). 14 open_loop 0 = normal closed-loop margining. 1 = dac setting constantly to the dac_value when margining invoked. 13:7 0 these bits always return a 0. 6:0 dac_value when bit 14 is set, this 7-bit value is written to the external current dac. page power supply ds4424 device ds4424 output 0 psen0 unit 0 i 2 c address 20h out0 1 psen1 out1 2 psen2 out2 3 psen3 out3 4 psen4 unit 1 i 2 c address 60h out0 5 psen5 out1 6 psen6 out2 7 psen7 out3 8 psen8 unit 2 i 2 c address a0h out0 9 psen9 out1 10 psen10 out2 11 psen11 out3 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 59 margining faults the device detects two possible margining faults. first, if the initial dac step causes v out to exceed the tar - get value (either high or low depending on whether the device has been instructed to margin high or low, respectively), this creates a fault. second, if the target value cannot be reached when the dac reaches full scale, this also creates a fault. if either margining fault occurs, the device continues attempting to margin the power supply and does the following: 1) sets the margin bit in status_word. 2) sets the margin_fault bit in status_mfr_ specific (pages 0C11). 3) notifies the host through alert assertion (if enabled in mfr_mode). if a communication error occurs between the device and the external ds4424, a fault occurs when the device attempts to set the dac to full scale and the target margin value is not reached. dac margining component selection the external components needed to realize the margin - ing circuitry for the current dac outputs are shown in figure 9 and described in the formulas below: dac rfs = (7.75)/(ifb x margining range) where ifb is the feedback node current. example: ifb = 500 f a, margining range = q 15% dac rfs value = (7.75)/(500 f a x 15%) = 103k i note: 40k i < rfs < 160k i temperature-sensor operation the device can monitor up to five different temperature sensors, four external sensors, plus its own internal tem - perature sensor. the external temperature sensors are all connected in parallel to the master i 2 c port (msda and mscl pins). the device can support up to four ds75lv devices. each of the enabled temperature sensors are measured once per second. the internal temperature sensor is averaged four times to reduce the effect of noise. each time the device attempts to read a temperature sensor, it checks for faults. for the internal temperature sensor, a fault is defined as reading greater than +130 n c or less than -60 n c. for the i 2 c temperature sensors, a fault is defined as a communication access failure. temperature- sensor faults are reported by setting the temperature reading to 7fffh. a temperature-sensor fault results in the setting of the temperature bit in status_word and alert is asserted (if enabled in mfr_mode). no bits are set in status_temperature. on reset of the device, if it cannot initialize the external ds75lv device, the temperature bit in status_word is set and alert is asserted (if enabled in mfr_mode), but the device does not attempt to reinitialize the ds75lv until 8000h is written to mfr_temp_sensor_config. reading disabled temperature sensors returns a fixed value of 0000h. up to four ds75lv digital temperature sensors can be controlled by the device. the a0Ca2 pins on the ds75lv should be configured as shown in table 37 . the thermo - stat function on the ds75lv is not used and hence the o.s. output should be left open circuit. figure 9. dac margining circuit table 37. ds75lv address pin configuration page MAX34460 temp sensor ds75lv address pin configuration a2 a1 a0 13 MAX34460 internal 14 ds75lv (address 90h) 0 0 0 15 ds75lv (address 92h) 0 0 1 16 ds75lv (address 94h) 0 1 0 17 ds75lv (address 96h) 0 1 1 i fb v out out fs r fs power supply ds4424 fb /t rim maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 60 mfr_temp_sensor_config (f0h) the mfr_temp_sensor_config command is used to configure the temperature sensors. the mfr_temp_ sensor_config command is described in table 38 . mfr_gpo_config (fbh) the mfr_gpo_config command is used to configure the individual gpo outputs. the mfr_gpo_config command is described in table 39 . the gpo pins can be found in table 7 . table 38. mfr_temp_sensor_config table 39. mfr_gpo_config * in dual-sequencing mode, control2, pg2, and fault2 cannot be configured as gpos. bit name meaning 15 enable 0 = temperature sensor disabled. 1 = temperature sensor enabled. 14:0 0 these bits always return a 0. bit name meaning 15 gpo7_override 0 = pin 41 acts as wdi. 1 = force gpo7/pin 41 to an open-drain output. 14 gpo6_override 0 = pin 40 acts as wdo . 1 = force gpo6/pin 40 to an open-drain output. 13 gpo5_override 0 = pin 28 acts as pg2. 1 = force gpo5/pin 28 to an open-drain output.* 12 gpo4_override 0 = pin 29 acts as control2. 1 = force gpo4/pin 29 to an open-drain output.* 11 gpo3_override 0 = pin 17 acts as fault2 . 1 = force gpo3/pin 17 to an open-drain output.* 10 gpo2_override 0 = pin 12 acts as alarmclr . 1 = force gpo2/pin 12 to an open-drain output. 9 gpo1_override 0 = pin 25 acts as alarm1 . 1 = force gpo1/pin 25 to an open-drain output. 8 gpo0_override 0 = pin 24 acts as alarm0 . 1 = force gpo0/pin 24 to an open-drain output. 7 gpo7_hi_lo 0 = force gpo7/pin 41 low if bit 15 is set. 1 = force gpo7/pin 41 high impedance if bit 15 is set. 6 gpo6_hi_lo 0 = force gpo6/pin 40 low if bit 14 is set. 1 = force gpo6/pin 40 high impedance if bit 14 is set. 5 gpo5_hi_lo 0 = force gpo5/pin 28 low if bit 13 is set. 1 = force gpo5/pin 28 high impedance if bit 13 is set. 4 gpo4_hi_lo 0 = force gpo4/pin 29 low if bit 12 is set. 1 = force gpo4/pin 29 high impedance if bit 12 is set. 3 gpo3_hi_lo 0 = force gpo3/pin 17 low if bit 11 is set. 1 = force gpo3/pin 17 high impedance if bit 11 is set. 2 gpo2_hi_lo 0 = force gpo2/pin 12 low if bit 10 is set. 1 = force gpo2/pin 12 high impedance if bit 10 is set. 1 gpo1_hi_lo 0 = force gpo1/pin 25 low if bit 9 is set. 1 = force gpo1/pin 25 high impedance if bit 9 is set. 0 gpo0_hi_lo 0 = force gpo0/pin 24 low if bit 8 is set. 1 = force gpo0/pin 24 high impedance if bit 8 is set. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 61 mfr_watchdog_config (fdh) the mfr_watchdog_config command is used to configure the external watchdog function. the mfr_watchdog_config command is described in table 40 . applications information v dd , v dda , and reg18 decoupling to achieve the best results when using the device, decouple v dd and v dda power inputs each with a 0.1 f f capacitor. if possible, use a high-quality, ceramic, surface-mount capacitor. surface-mount components minimize lead inductance, which improves performance; ceramic capacitors tend to have adequate high-frequen - cy response for decoupling applications. decouple the reg18 regulator output using 1 f f and 10nf capacitors with a maximum esr of 500m i . open-drain pins msda, mscl, scl, sda, fault , and alert are open- drain pins and require external pullup resistors con - nected to v dd to realize high logic levels. psen0Cpsen11 can be user-configured as either cmos push-pull or open-drain outputs. when configured as open-drain (see mfr_psen_config), external pullup resistors connected to v dd are required to realize high logic levels. keep-alive circuit in systems where the power to the device may be not always be present, a keep-alive circuit consisting of a schottky diode and a bulk capacitor can be added to allow the device time to orderly shut down the power supplies it is controlling before power is lost. table 40. mfr_watchdog_config * if dual sequencing is enabled, only the primary group is used to time the start of the watchdog. bit name meaning 15:13 wd_startup[2:0] these bits define the watchdog startup time. 000 1s 100 16s 001 2s 101 32s 010 4s 110 64s 011 8s 111 128s 12 0 this bit always returns a 0. 11:8 wd_timeout[3:0] these bits define the watchdog timeout time. 0000 5ms 1000 1s 0001 10ms 1001 2s 0010 20ms 1010 4s 0011 40ms 1011 8s 0100 80ms 1100 16s 0101 160ms 1101 32s 0110 320ms 1110 64s 0111 640ms 1111 128s 7:4 0 these bits always return a 0 when read. 3 wd_wdo_mr 0 = wdo pin is watchdog output only. 1 = wdo pin is watchdog output and manual-reset input. 2 wd_toggle when this bit is set to a 1, it resets the watchdog the same as a rising edge on wdi does. this bit always returns a 0 when read. 1 wd_mode 0 = independent mode. 1 = dependent mode.* 0 wd_enable 0 = watchdog disabled ( wdo is forced high impedance). 1 = watchdog enabled. maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 62 configuration port some applications require the ability to configure the device when it has been mounted on a pcb. in such applications, a 3- or 4-wire header can be added to allow access to the slave i 2 c pins. resistor-dividers and source impedance for rsn inputs the maximum full-scale voltage on the adc inputs is 2.048v (nominal). a resistor-divider must be used to measure voltages greater than 1.8v. the maximum source impedance to the rsn inputs is determined by the adc_time bits in mfr_mode. see the recommended operating conditions table for more information. in applications where voltages up to 2v can be applied to the rsn inputs when v dd or v dda is grounded, a series resistance of 100 i is recommended to protect the device by limiting power dissipation. current measurement on rsn inputs the rsn inputs normally measure voltages, but with the addition of an external current-sense amplifier the device can also be configured to measure current. any of the rsn inputs can be configured to measure current. on channels that measure current, the sequencing for that channel should be disabled by setting ton_max_ fault_limit = 8000h to ffffh. on these channels, the associated psenn output is available to be configured as a gpo. also, for these channels, power_good_on should be set to 0000h to force power-good assertion since this channel is not measuring voltage ( figure 10 ). the current-sense amplifier must have a source imped - ance of less than the value as constrained by the selection of the adc_time bits in mfr_mode and the output from the amplifier must not exceed the maximum input-voltage limits of the device. the 100 i series resistor is required to protect the device if the current-sense amplifier can be active when the system manager is powered off. the vout_scale_monitor command can be used to properly scale the external sense element and current- sense amplifier gain so that the read_vout com - mand reports current instead of voltage. normally vout_ scale_monitor scales voltage from 0 to 32.767v in 1mv steps. for channels used to measure current instead of voltage, the vout_scale_monitor command can be configured to report current from 0a to 32.767a in 1ma steps by using the following formula. table 41 provides some examples. note that vout_scale_monitor can - not exceed a ratio of 1. system designs should avoid rg combinations with a value greater than 1. vout_scale_monitor = r x g x 32,767 exposed pad grounding the device uses the exposed pad of the tqfn package as the common ground (v ss ) for the entire device. the exposed pad must be connected to the local ground plane. figure 10. current-measuring circuit table 41. scale current-gain example r sense element (m i ) g amplifier gain (v/v) v/a ratio r x g ( i ) vout_scale_monitor value dec hex 1 100 0.1 3276 0ccc 2 100 0.2 6553 1999 2 50 0.1 3276 0ccc 4 20 0.08 2621 0a3d 0.5 100 0.05 1638 0666 current- sense amplifier gain (g) max4376 (single) max4377 (dual) max4378 (quad) vout_scale_monitor = r x g x 32,767 ton_max_fault_limit = 8000h to ffffh power_good_on = 0000h 3v maximum output voltage 1ki maximum output impedance rsn 100i sense element (r) current MAX34460 maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 63 typical operating circuit MAX34460 msda mscl psen0 ? psen3 rs0 ? rs3 rsg0 v dda v dd ds4424 i 2 c 4-channel current dac (i 2 c addresses 20h, 60h, a0h) optional margining support for channels 0 ?11 (up to 3) ds75lv i 2 c temp sensor (i 2 c addresses 90/9 2/94 / 96h) optional keep alive power supply optional 4 channels in only required if the monitored voltage is > 1.8v out load en optional configuration access optional remote temp sensors (up to 4) sda scl alert rst wdi wdo 3.3v control2 pg2 fault2 fault control a0/ monoff a1/ pg reg18 ep/ v ss host interface power control monitoring defeat psen4 ? psen11 rs4 ? rs11 rsg1 alarm0 power supply optional 8 channels in only required if the monitored voltage is > 1.8v out load en alarm1 alarmclr maxim integrated
MAX34460 pmbus 12-channel voltage monitor and sequencer 64 ordering information + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. t = tape and reel. package information for the latest package outline information and land patterns (foot - prints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. part temp range pin-package MAX34460etm+ -40 n c to +85 n c 48 tqfn-ep* MAX34460etm+t -40 n c to +85 n c 48 tqfn-ep* package type package code outline no. land pattern no. 48 tqfn-ep t4866+2 21-0141 90-0007 maxim integrated
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 65 ? 2012 maxim integrated products, inc. the maxim logo and maxim integrated are trademarks of maxim integrated products, inc. revision history revision number revision date description pages changed 0 9/12 initial release MAX34460 pmbus 12-channel voltage monitor and sequencer

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