phase-locked cryst a loscill a tors pld series: 130 ? 1000 mhz (pld-1c) fe a tures ? low phase noise design ? fractional frequency division available ? low subharmonics for multiplied models (-70 dbc) ? +13 dbm standard out p ut p o wer options ? higher output power ? coupled rf output electrical specific a tions output frequency range multiplied (pld-1c) 130 ? 1000 mhz output power +13 dbm minimum output power variation 1 db maximum phase noise see graph harmonic output -20 dbc maximum spurious output -70 dbc maximum input reference frequency 1 ? 20 mhz input power level 0 3 dbm input impedance 50 ohms load vswr 1.5:1 nominal dc power requirements (note 1) +15, or +20volts @ 370 ma +5 volts @ 200 ma pld-1c series phase noise -1 6 0 -1 5 0 -1 4 0 -1 3 0 -1 2 0 -1 1 0 -1 0 0 -90 -80 -70 -60 -50 -40 10 100 1000 10000 100000 1000000 10000000 frequency o ffset from carrier (hz) phase noise (dbc/hz) pld-1c-010-382-0-15p pld-1c-010-0582-0-15p pld-1c-010-0640-0-15p wn-177696 8/21/2007
phase-locked cryst a loscill a tors block diagram referenc e amplifie r reference divider input reference 1 ? 20 mhz /1, 2, 3...128 divider circuits prescaler digital phase detector fr a ctional division up to 10 khz resolution ordering inform a tion a fc input fundamental rf output (fo) vcxo : 30 ? 165 rf output (n*fo) 165 ? 1000 mhz output frequenc y 165 ? 1000 mhz mechanical specific a tions weight fundamental............................ 2 50 grams nominal multiplied ................................. 3 00 grams nominal rf connectors ............................. sma female dc connectors ............................. feedthru filter environment a l specific a tions temperature operating ............................ 0 to 60c storage ............................... -45 to +85c humidity .................................. 95% at 40c noncondensing shock (survival) ...................... 30 g?s, 10 ms pulse vibration ( survi v al ) .................. 20 to 2000 hz random to 4 g ?s alarm options 0. 0 volts in lock, +v out of lock 3. ttl; low in lock, high out of lock 4. ttl; high in lock, low out of lock supply voltage input freq. (mhz) alarm option output freq. (mhz) p --- pld-1c -__ __ __ __ __ __ wn-177696 8/21/2007 supply v ol t age options 15. +15 vdc. 20. +20 vdc.
outline d r a wings pld-1c series ( mul tiplied ) 3 wn-177696 8/21/2007
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