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tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3sl tisp7250h3sl thru tisp7400h3sl triple bidirectional thyristor overvoltage protectors product information 1 march 1999 - revised october 2000 copyright ? 2000, power innovations limited, u k information is current as of publication date. products conform to specifications in accordance with the terms of power innovations standard warranty. production processing does not necessarily include testing of all parameters . telecommunication system 2x10 0 a 10/1000 overvoltage protector s a bourns compan y l ion-implanted breakdown region - precise dc and dynamic voltage s l rated for international surge wave shapes - single and simultaneous impulse s devic e v dr m v v (bo ) v ?707 0 5 8 7 0 ?708 0 6 5 8 0 ?709 5 7 5 9 5 ?712 5 10 0 12 5 ?713 5 11 0 13 5 ?714 5 12 0 14 5 ?716 5 13 0 16 5 ?718 0 14 5 18 0 ?720 0 15 0 20 0 ?721 0 16 0 21 0 ?722 0 17 0 22 0 ?725 0 20 0 25 0 ?729 0 23 0 29 0 ?735 0 27 5 35 0 ?740 0 30 0 40 0 wave shap e standar d i ts p a 2/1 0 s gr-1089-cor e 50 0 8/2 0 s iec 61000-4- 5 35 0 10/16 0 s fcc part 6 8 25 0 10/70 0 s fcc part 68 itu-t k.20/2 1 20 0 10/56 0 s fcc part 6 8 13 0 10/100 0 s gr-1089-cor e 10 0 l 3-pin through-hole packaging - compatible with to-220ab pin-out - low height. . . . . . . . . . . . . . . . . . . . .8. 3 m m l ................. ul recognized componen t descriptio n the tisp7xxxh3sl limits overvoltages between the telephone line ring and tip conductors and ground. overvoltages are normally caused by a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. each terminal pair, t-g, r-g and t-r, has a symmetrical voltage-triggered bidirectional thyristor protection characteristic. overvoltages are initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. this low-voltage on state causes the current resulting from the overvoltage to be safely diverted through the device. the high crowbar holding current prevents d.c. latchup as the diverted current subsides. . how to orde r devic e packag e carrie r order a s tisp7xxxh 3 sl (single-in-line ) tub e tisp7xxxh3s l insert xxx value corresponding to protection voltages of 070, 080, 095, 125 etcetera . device symbo l g t r sd7xab terminals t, r and g correspond to the alternative line designators of a, b and c sl package (top view) 1 2 3 t g r mdxxaga
tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3s l tisp7250h3sl thru tisp7400h3s l triple bidirectional thyristor overvoltage protector s 2 march 1999 - revised october 200 0 product information this tisp7xxxh3sl range consists of fifteen voltage variants to meet various maximum system voltage levels (5 8 v to 30 0 v). they are guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. these high current protection devices are in a 3-pin single-in-line (sl) plastic package and are supplied in tube pack. for alternative impulse rating, voltage and holding current values in sl packaged protectors, consult the factory. for lower rated impulse currents in the sl package, the 4 5 a 10/1000 tisp7xxxf3sl series is available. these monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and matched breakover control and are virtually transparent to the system in normal operatio n absolute maximum ratings , t a = 2 5 c (unless otherwise noted ) ratin g symbo l valu e uni t repetitive peak off-state voltage, (see note 1 ) ?7070 ?7080 ?7095 ?7125 ?7135 ?7145 ?7165 ?7180 ?7200 ?7210 ?7220 ?7250 ?7290 ?7350 ?7400 v dr m 58 65 75 100 110 120 130 145 150 160 170 200 230 275 30 0 v non-repetitive peak on-state pulse current(see notes 2, and 3 ) i ts p a 2/10(telcordia gr-1089-core, 2/10 voltage wave shape ) 50 0 8/2 0 s(iec 61000-4-5, 1.2/5 0 s voltage, 8/20 current combination wave generator ) 35 0 10/16 0 s(fcc part 68, 10/16 0 s voltage wave shape ) 25 0 4/250(itu-t k.20/21, 10/700 voltage wave shape, dual ) 22 5 0.2/310(cnet i 31-24, 0.5/700 voltage wave shape ) 20 0 5/310(itu-t k.20/21, 10/700 voltage wave shape, single ) 20 0 5/32 0 s(fcc part 68, 9/72 0 s voltage wave shape ) 20 0 10/56 0 s(fcc part 68, 10/56 0 s voltage wave shape ) 13 0 10/1000(telcordia gr-1089-core, 10/1000 voltage wave shape ) 10 0 non-repetitive peak on-state current(see notes 2, 3 and 4 ) i ts m 55 60 0. 9 a 2 0 ms (5 0 hz) full sine wave 16. 7 ms (6 0 hz) full sine wave 100 0 s 5 0 hz/6 0 hz a.c . initial rate of rise of on-state current,exponential current ramp, maximum ramp value < 200 a d i t /d t 40 0 a/ s junction temperatur e t j -40 to +15 0 c storage temperature rang e t st g -65 to +15 0 c notes: 1. derate value at -0.13%/c for temperatures below 2 5 c . 2. initially the tisp7xxxh3 must be in thermal equilibrium. 3. these non-repetitive rated currents are peak values of either polarity. the rated current values may be applied to any terminal pair. additionally, both r and t terminals may have their rated current values applied simultaneously (in this case the g termin al return current will be the sum of the currents applied to the r and t terminals). the surge may be repeated after the tisp7xxxh3 returns to its initial conditions . 4. eia/jesd51-2 environment and eia/jesd51-3 pcb with standard footprint dimensions connected with 5 a rated printed wiring track widths. derate current values at -0.6 1 %/c for ambient temperatures above 2 5 c
3 march 1999 - revised october 2000 tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3sl tisp7250h3sl thru tisp7400h3sl triple bidirectional thyristor overvoltage protectors product information electrical characteristics for any terminal pair, t a = 2 5 c (unless otherwise noted) paramete r test condition s mi n ty p ma x uni t i dr m repetitive peak off- state curren t v d = v dr m t a = 2 5 c t a = 8 5 c 5 1 0 a v (bo ) breakover voltag e dv/d t = 75 0 v/ms, r sourc e = 30 0 w ?7070 ?7080 ?7095 ?7125 ?7135 ?7145 ?7165 ?7180 ?7200 ?7210 ?7220 ?7250 ?7290 ?7350 ?7400 70 80 95 125 135 145 165 180 200 210 220 250 290 350 40 0 v v (bo ) impulse breakover voltag e dv/d t 100 0 v/s, linear voltage ramp, maximum ramp valu e = 50 0 v di/d t = 2 0 a/s, linear current ramp, maximum ramp valu e = 1 0 a ?7070 ?7080 ?7095 ?7125 ?7135 ?7145 ?7165 ?7180 ?7200 ?7210 ?7220 ?7250 ?7290 ?7350 ?7400 78 88 103 134 144 154 174 189 210 220 231 261 302 362 41 4 v i (b o ) breakover curren t dv/d t = 75 0 v/ms, r sourc e = 30 0 w 0. 1 0. 8 a v t on-state voltag e i t = 5 a, t w = 10 0 s 5 v i h holding curren t i t = 5 a, di/d t = +/-3 0 ma/m s 0.1 5 0. 6 a dv/d t critical rate of rise of off-state voltag e linear voltage ramp, maximum ramp valu e < 0.85 v dr m 5 kv/ s i d off-state curren t v d = 5 0 v t a = 8 5 c 1 0 a
tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3s l tisp7250h3sl thru tisp7400h3s l triple bidirectional thyristor overvoltage protector s 4 march 1999 - revised october 200 0 product information c of f off-state capacitanc e f = 1 mhz, v d = 1 v rms, v d = 0, f = 1 mhz, v d = 1 v rms, v d = - 1 v f = 1 mhz, v d = 1 v rms, v d = - 2 v f = 1 mhz, v d = 1 v rms, v d = -5 0 v f = 1 mhz, v d = 1 v rms, v d = -10 0 v (see note 5 ) ?7070 thru ?7095 ?7125 thru ?7220 ?7250 thru ?7400 ?7070 thru ?7095 ?7125 thru ?7220 ?7250 thru ?7400 ?7070 thru ?7095 ?7125 thru ?7220 ?7250 thru ?7400 ?7070 thru ?7095 ?7125 thru ?7220 ?7250 thru ?7400 ?7125 thru ?7220 ?7250 thru ?7400 170 90 84 150 79 67 140 74 62 73 35 28 33 2 6 p f note 5: to avoid possible voltage clipping, the ?7125 is tested with v d = -9 8 v . thermal characteristic s paramete r test condition s mi n ty p ma x uni t r q j a junction to free air thermal resistanc e eia/jesd51-3 pcb, i t = i tsm(1000 ) , t a = 2 5 c, (see note 6 ) 5 0 c/ w note 6: eia/jesd51-2 environment and pcb has standard footprint dimensions connected with 5 a rated printed wiring track widths . electrical characteristics for any terminal pair, t a = 2 5 c (unless otherwise noted) (continued ) paramete r test condition s mi n ty p ma x uni t
5 march 1999 - revised october 2000 tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3sl tisp7250h3sl thru tisp7400h3sl triple bidirectional thyristor overvoltage protectors product information parameter measurement informatio n figure 1. voltage-current characteristic for terminal pair s -v v drm i drm v d i h i t v t i tsm i tsp v (bo) i (bo) i d quadrant i switching characteristic +v +i v (bo) i (bo) v d i d i h i t v t i tsm i tsp -i quadrant iii switching characteristic pm4xaac v drm i drm v d = 50 v and i d = 10 a used for reliability release
tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3s l tisp7250h3sl thru tisp7400h3s l triple bidirectional thyristor overvoltage protector s 6 march 1999 - revised october 200 0 product information typical characteristic s figure 2. figure 3. figure 4. figure 5. off-state current vs junction temperature t j - junction temperature - c 0 25 50 75 100 125 150 | i d | - o f f - s t a t e c u r r e n t - a 00001 0001 001 01 1 10 tc7aaa v d = +50 v v d = -50 v normalised breakover voltage vs junction temperature t j - junction temperature - c -25 0 25 50 75 100 125 150 n o r m a l i s e d b r e a k o v e r v o l t a g e 0.95 1.00 1.05 1.10 tc7aaba '7070 thru '7095 '7250 thru '7400 '7250 thru '7400 '7125 thru '7220 on-state current vs on-state voltage v t - on-state voltage - v 0.7 1.5 2 3 4 5 7 1 10 i t - on-state current - a 1.5 2 3 4 5 7 15 20 30 40 50 70 150 200 1 10 100 t a = 25 c t w = 100 s '3250 thru '3350 '3125 thru '3210 '3070 thru '3095 normalised breakover current vs junction temperature t j - junction temperature - c -25 0 25 50 75 100 125 150 b r e a k o v e r c u r r e n t n o r m a l i s e d t o 2 5 c h o l d i n g c u r r e n t 0.4 0.5 0.6 0.7 0.8 0.9 1.5 2.0 3.0 4.0 1.0 tc7aada + i (bo) , - i (bo) '7250 thru '7400 + i (bo) , - i (bo) '7070 thru '7220 normalised holding current vs junction temperature t j - junction temperature - c -25 0 25 50 75 100 125 150 n o r m a l i s e d h o l d i n g c u r r e n t 0.4 0.5 0.6 0.7 0.8 0.9 1.5 2.0 1.0 tc7aac
7 march 1999 - revised october 2000 tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3sl tisp7250h3sl thru tisp7400h3sl triple bidirectional thyristor overvoltage protectors product information typical characteristic s figure 6. figure 7. normalised capacitance vs off-state voltage v d - off-state voltage - v 1 2 3 5 10 20 30 50 100 150 c a p a c i t a n c e n o r m a l i s e d t o v d = - 1 v 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 t j = 25c v d = 1 vrms '7070 thru '7095 '7250 thru '7400 tc7aaia '7125 thru '7220 differential off-state capacitance vs rated repetitive peak off-state voltage v drm - repetitive peak off-state voltage - v 50 60 70 80 150 200 250 300 400 100 d d c - d i f f e r e n t i a l o f f - s t a t e c a p a c i t a n c e - p f 30 35 40 45 50 55 60 65 70 75 80 d d c = c off(-2 v) - c off(-50 v) ' 7 0 7 0 ' 7 0 8 0 ' 7 0 9 5 ' 7 1 2 5 ' 7 1 3 5 ' 7 1 4 5 ' 7 1 8 0 ' 7 2 5 0 ' 7 2 9 0 ' 7 3 5 0 ' 7 2 1 0 ' 7 4 0 0 t c 7 a a h a ' 7 2 2 0 ' 7 1 6 5 ' 7 2 0 0
tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3s l tisp7250h3sl thru tisp7400h3s l triple bidirectional thyristor overvoltage protector s 8 march 1999 - revised october 200 0 product information rating and thermal informatio n figure 8. figure 9. figure 10. non-repetitive peak on-state current vs current duration t - current duration - s 01 1 10 100 1000 i t s m ( t ) - n o n - r e p e t i t i v e p e a k o n - s t a t e c u r r e n t - a 0.8 0.9 1.5 2 3 4 5 6 7 8 9 15 20 30 1 10 ti7ab v gen = 600 v rms, 50/60 hz r gen = 1.4*v gen /i tsm(t) eia/jesd51-2 environment eia/jesd51-3 pcb, t a = 25 c simultaneous operation of r and t terminals. g terminal current = 2xi tsm(t) v drm derating factor vs minimum ambient temperature t amin - minimum ambient temperature - c -35 -25 -15 -5 5 15 25 -40 -30 -20 -10 0 10 20 d e r a t i n g f a c t o r 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1.00 '7070 thru '7095 '7250 thru '7400 ti7aaca '7125 thru '7220 impulse rating vs ambient temperature t a - ambient temperature - c -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 i m p u l s e c u r r e n t - a 70 80 90 100 120 150 200 250 300 400 500 600 700 iec 1.2/50, 8/20 itu-t 10/700 fcc 10/560 fcc 10/160 tc7haa telcordia 2/10 telcordia 10/1000
9 march 1999 - revised october 2000 tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3sl tisp7250h3sl thru tisp7400h3sl triple bidirectional thyristor overvoltage protectors product information applications informatio n deploymen t these devices are three terminal overvoltage protectors. they limit the voltage between three points in the circuit. typically, this would be the two line conductors and protective ground ( figure 1 1 ) . in figure 1 1 , protectors th2 and th3 limit the maximum voltage between each conductor and ground to the v (bo ) of the individual protector. protector th1 limits the maximum voltage between the two conductors to its v (bo ) value . manufacturers are being increasingly required to design in protection coordination. this means that each protector is operated at its design level and currents are diverted through the appropriate protector e.g. the primary level current through the primary protector and lower levels of current may be diverted through the secondary or inherent equipment protection. without coordination, primary level currents could pass through the equipment only designed to pass secondary level currents. to ensure coordination happens with fixed voltage protectors, some resistance is normally used between the primary and secondary protection. the values given in this data sheet apply to a 40 0 v (d.c. sparkover) gas discharge tube primary protector and the appropriate test voltage when the equipment is tested with a primary protector . impulse testin g to verify the withstand capability and safety of the equipment, standards require that the equipment is tested with various impulse wave forms. the table below shows some common values . figure 11. multi-point protectio n standar d peak voltage setting v voltage wave form s peak current value a current wave form s tisp7xxxh3 2 5 c rating a series resistance w coordination resistance w (min. ) gr-1089-cor e 250 0 2/1 0 50 0 2/1 0 50 0 0 n a 100 0 10/100 0 10 0 10/100 0 10 0 fcc part 6 8 (march 1998 ) 150 0 10/16 0 20 0 10/16 0 25 0 0 n a 80 0 10/56 0 10 0 10/56 0 13 0 1000 1500 150 0 9/72 0 ? (single) (dual ) 25 37.5 2 x 2 7 5/32 0 ? 5/32 0 ? 4/25 0 200 200 2 x 22 5 i 31-2 4 150 0 0.5/70 0 37. 5 0.2/31 0 20 0 0 n a itu-t k.20/k.2 1 1000 1500 4000 400 0 10/700 (single) (single) (dual ) 25 37.5 100 2 x 7 2 5/310 5/310 5/310 4/25 0 200 200 200 2 x 22 5 0 na na 4.5 6. 0 ? fcc part 68 terminology for the waveforms produced by the itu-t recommendation k.21 10/700 impulse generator na = not applicable, primary protection removed or not specified . th3 th2 th1
tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3s l tisp7250h3sl thru tisp7400h3s l triple bidirectional thyristor overvoltage protector s 1 0 march 1999 - revised october 200 0 product information if the impulse generator current exceeds the protectors current rating then a series resistance can be used to reduce the current to the protectors rated value and so prevent possible failure. the required value of series resistance for a given waveform is given by the following calculations. first, the minimum total circuit impedance is found by dividing the impulse generators peak voltage by the protectors rated current. the impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then subtracted from the minimum total circuit impedance to give the required value of series resistance. in some cases the equipment will require verification over a temperature range. by using the rated waveform values from figure 1 0 , the appropriate series resistor value can be calculated for ambient temperatures in the range of -4 0 c to 8 5 c . a.c. power testin g the protector can withstand the g return currents applied for times not exceeding those shown in figure 8 . currents that exceed these times must be terminated or reduced to avoid protector failure. fuses, ptc (positive temperature coefficient) resistors and fusible resistors are overcurrent protection devices which can be used to reduce the current flow. protective fuses may range from a few hundred milliamperes to one ampere. in some cases it may be necessary to add some extra series resistance to prevent the fuse opening during impulse testing. the current versus time characteristic of the overcurrent protector must be below the line shown in figure 8 . in some cases there may be a further time limit imposed by the test standard (e.g. ul 1459 wiring simulator failure) . capacitanc e the protector characteristic off-state capacitance values are given for d.c. bias voltage, v d , values of 0, - 1 v, - 2 v and -5 0 v. where possible values are also given for -10 0 v. values for other voltages may be calculated by multiplying the v d = 0 capacitance value by the factor given in figure 6 . up to 1 0 mhz the capacitance is essentially independent of frequency. above 1 0 mhz the effective capacitance is strongly dependent on connection inductance. for example, a printed wiring (pw) trace of 1 0 cm could create a circuit resonance with the device capacitance in the region of 5 0 mhz. in many applications, the typical conductor bias voltages will be about - 2 v and -5 0 v. figure 7 shows the differential (line unbalance) capacitance caused by biasing one protector at - 2 v and the other at -5 0 v . normal system voltage level s the protector should not clip or limit the voltages that occur in normal system operation. for unusual conditions, such as ringing without the line connected, some degree of clipping is permissible. under this condition, about 1 0 v of clipping is normally possible without activating the ring trip circuit . figure 9 allows the calculation of the protector v dr m value at temperatures below 2 5 c. the calculated value should not be less than the maximum normal system voltages. the tisp3290h3, with a v dr m of 22 0 v, can be used for the protection of ring generators producing 10 5 v rms of ring on a battery voltage of -5 8 v. the peak ring voltage will be 5 8 + 1.414*105 = 206. 5 v. however, this is the open circuit voltage and the connection of the line and its equipment will reduce the peak voltage. for the extreme case of an unconnected line, the temperature at which clipping begins can be calculated using the data from figure 9 . to possibly clip, the v dr m value has to be 206. 5 v. this is a reduction of the 22 0 v 2 5 c v dr m value by a factor of 206.5/220 = 0.94. figure 9 shows that a 0.94 reduction will occur at an ambient temperature of -3 2 c. in this example, the tisp3290h3 will allow normal equipment operation, even on an open-circuit line, provided that the minimum expected ambient temperature does not fall below -3 2 c . jesd51 thermal measurement metho d to standardise thermal measurements, the eia (electronic industries alliance) has created the jesd51 standard. part 2 of the standard (jesd51-2, 1995) describes the test environment. this is a 0.028 3 m 3 ( 1 f t 3 ) cube which contains the test pcb (printed circuit board) horizontally mounted at the centre. part 3 of the
11 march 1999 - revised october 2000 tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3sl tisp7250h3sl thru tisp7400h3sl triple bidirectional thyristor overvoltage protectors product information standard (jesd51-3, 1996) defines two test pcbs for surface mount components; one for packages smaller than 2 7 mm on a side and the other for packages up to 4 8 mm. the thermal measurements used the smaller 76. 2 mm x 114. 3 mm (3. 0 ? x 4. 5 ?) pcb. the jesd51-3 pcbs are designed to have low effective thermal conductivity (high thermal resistance) and represent a worse case condition. the pcbs used in the majority of applications will achieve lower values of thermal resistance and so can dissipate higher power levels than indicated by the jesd51 values .
tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3s l tisp7250h3sl thru tisp7400h3s l triple bidirectional thyristor overvoltage protector s 1 2 march 1999 - revised october 200 0 product information typical circuit s figure 12. protection modul e figure 13. isdn protectio n figure 14. line card ring/test protectio n protected equipment e.g. line card ai7xbk th3 th2 th1 tisp7xxxh3 r1a r1b ring wire tip wire f1a f1b r1a r1b ai7xbl signal d.c. th3 th2 th1 tisp7150h3 test relay ring relay slic relay test equip- ment ring generator s1a s1b r1a r1b ring wire tip wire th3 th2 th1 th4 th5 slic slic protection ring/test protection over- current protection s2a s2b s3a s3b v bat c1 220 nf ai7xbj tisp6xxxx, tisppblx, ?tisp6ntp2 coordin- ation resistance tisp7xxxh3
13 march 1999 - revised october 2000 tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3sl tisp7250h3sl thru tisp7400h3sl triple bidirectional thyristor overvoltage protectors product information mechanical dat a device symbolization cod e devices will be coded as below . devic e symbolization cod e tisp7070h3s l sp7070h 3 tisp7080h3s l sp7080h 3 tisp7095h3s l sp7095h 3 tisp7125h3s l sp7125h 3 tisp7135h3s l sp7135h 3 tisp7145h3s l sp7145h 3 tisp7165h3s l sp7165h 3 tisp7180h3s l sp7180h 3 tisp7200h3s l sp7200h 3 tisp7210h3s l sp7210h 3 tisp7220h3s l sp7220h 3 tisp7250h3s l sp7250h 3 tisp7290h3s l sp7290h 3 tisp7350h3s l sp7350h 3 tisp7400h3s l sp7400h 3
tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3s l tisp7250h3sl thru tisp7400h3s l triple bidirectional thyristor overvoltage protector s 1 4 march 1999 - revised october 200 0 product information mechanical dat a sl00 3 3-pin plastic single-in-line packag e this single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic co m - pound. the compound will withstand soldering temperature with no deformation, and circuit performance chara c - teristics will remain stable when operated in high humidity conditions. leads require no additional cleaning or processing when used in soldered assembly . all linear dimensions in millimeters and paranthetically in inches 2,54 (0.100) typical (see note a) 2 places 8,31 (0.327) max sl003 4,267 (0.168) min 1,854 (0.073 ) max 0,711 (0.028) 0,559 (0.022) 3 places 12,9 (0.492) max 6,60 (0.260) 6,10 (0.240) 2 1 3 0,356 (0.014) 0,203 (0.008) 3,40 (0.134) 3,20 (0.126) 9,75 (0.384) 9,25 (0.364) notes: a. each pin centreline is located within 0,25 (0.010) of its true longitudinal position. b. body molding flash of up to 0,15 (0.006) may occur in the package lead plane. mdxxcea index notch
15 march 1999 - revised october 2000 tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3sl tisp7250h3sl thru tisp7400h3sl triple bidirectional thyristor overvoltage protectors product information important notic e power innovations limited (pi) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current . pi warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with pi's standard warranty. testing and other quality control techniques are utilized to the extent pi deems necessary to support th is warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements . pi assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of pi covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. pi semiconductor products are not designed, intended, authorised, or warranted to be suitable for use in life-support applications, devices or systems . copyright ? 2000, power innovations limite d

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