+v (1 ) (2 ) (4 ) (5) (6) (7) (8) in Cv in +v ou t Cv ou t common pw m controller reference & e rror am p on /o ff contro l tr im opto is olat io n figure 1. simplifed schematic features dual output a-series, bwr models high-reliability, 2" x 2" 15-20 watt, dc/dc converters for your mid-range power requirements, its hard to beat the combination of low cost, proven reliability and outstanding electrical performance offered by the 15-20w, dual-output models of c&ds new a-series dc/dc converters. these highly effcient, rugged converters combine straightforward circuit topologies, the newest components, proven smt-on-pcb construction methods, and highly repeat - able automatic-assembly techniques. their superior durability is substantiated by a rigorous in-house qualifcation program that includes halt (highly accelerated life testing). the ultra-wide input voltage ranges of the a-series duals (4.7-7.5v for "d5a" models, 9-36v for "d12a" models and 18-75v for "d48a" models) make them excel - lent candidates for battery-powered systems or for distributed power architectures. their 5, 12 or 15 volt outputs cover virtually all standard applications. these popular power converters are fully isolated (1500vdc guaranteed) and display excellent line and load regulation (with specs as low as 0.3% max. for line and 0.5% max. for load). they are completely i/o protected (input overvoltage shutdown and reverse-polarity protection, output current limiting and overvoltage protection) and contain input (pi type) and output fltering to reduce noise. they require no external components and offer true "plug-and-play" convenience. these extremely reliable, cost-effective power converters are housed in standard 2" x 2" x 0.45" metal packages coated with electrically non-conductive materials. they offer industry-standard pinouts and are ideally suited for high-volume com - puter, telecom/datacom, instrumentation and ate applications. low cost! highly reliable! proven smt-on-pcb construction qual tested; halt tested; emc tested designed to meet ul/ en60950, basic insulation (48v in models) mark available (48v in models) output voltages: 5, 12 or 15 volts ultra-wide input voltage ranges: 4.7-7.5v, 9-36v or 18-75v small packages, 2" x 2" x 0.45" industry-standard pinouts fully isolated, 1500vdc guaranteed guaranteed effciencies to 82% C40 to +100c operating temperature modifcations and customs for oems a - s e r i e s www.cd4power.com $ for full details go to www.cd4power.com/rohs typical topology is shown.
1 5 - 2 0 w , d u a l o u t p u t d c / d c c o n v e r t e r s a series bwr-5/1500-d5a 5 1500 50 100 0.5% 1.0% 5 4.7-7.5 75/3750 79% 80% c4, p7 bwr-5/1700-d12a 5 1700 75 100 0.3% 0.5% 24 9-36 15/753 80.5% 83% c4, p7 bwr-5/1700-d48a 5 1700 75 100 0.3% 0.5% 48 18-75 15/377 81% 83% c4, p7 bwr-12/625-d5a 12 625 75 120 0.5% 1.0% 5 4.7-7.5 75/3750 79% 81% c4, p7 bwr-12/830-d12a 12 830 75 100 0.3% 0.5% 24 9-36 30/1000 81.5% 83% c4, p7 bwr-12/830-d48a 12 830 75 100 0.4% 0.5% 48 18-75 15/510 81% 83% c4, p7 bwr-15/500-d5a 15 500 75 150 0.5% 1.0% 5 4.7-7.5 75/3659 80% 82% c4, p7 bwr-15/670-d12a 15 670 75 100 0.3% 0.5% 24 9-36 30/979 82% 83% c4, p7 bwr-15/670-d48a 15 670 75 100 0.3% 0.5% 48 18-75 15/484 82% 84% c4, p7 2 notes: for "d5a" and "d12a" models, the case is connected to pin 2 (Cv in ). for "d48a" models, the case is connected to pin 1 (+v in ). b o t t o m v ie w 1 .8 0 0 ( 4 5 .7 2 ) 0 .1 0 ( 2 .5 4 ) 2 .0 0 ( 5 0 .8 0 ) 8 5 6 7 0 .4 0 ( 1 0 .1 6 ) 0 .2 0 0 ( 5 .0 8 ) 0 .4 0 0 ( 1 0 .1 6 ) 0 .1 0 0 ( 2 .5 4 ) 1 2 4 m e t a l c a s e i n s u l a t e d b a s e 0 .0 4 0 0 .0 0 2 d ia . ( 1 .0 1 6 0 . 0 5 1 ) 2 .0 0 ( 5 0 . 8 0 ) 0 .2 0 m i n ( 5 .0 8 ) 0 .4 5 ( 1 1 .4 3 ) 1 .2 0 0 ( 3 0 .4 8 ) 3 e q . s p . @ 0 .4 0 0 ( 1 0 .1 6 ) dimensions are in inches (mm) case c4 ? typical at t a = +25c under nominal line voltage and full-load conditions unless otherwise noted. ? ripple/noise (r/n) measured over a 20mhz bandwidth. ? balanced loads, 20% to 100% load. ? nominal line voltage, no-load/full-load conditions. nominal output voltages: 5, 12 or 15 volts maximum output current in ma from each output input voltage range: d5 = 4.7-7.5 volts (5v nominal) d12 = 9-36 volts (24v nominal) d48 = 18-75 volts (48v nominal) wide range input output confguration: b = bipolar 12 b wr 830 d48 a - / - a-series high reliability performance specifcations and ordering guide ? i out (ma) r/n (mvp-p) ? load ? v out (volts) output package (case, pinout) effciency regulation (max.) line v in nom. (volts) range (volts) model input i in ? (ma) max. typ. typ. min. out put powe r (w atts ) ambi ent te m p erat ure ( c ) 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 a b bwr-5/ 1500- d5a c bwr-5/ 1700- d12a b bwr-5/ 1700- d48a b bwr-12 /625-d 5a c bwr-12 /830-d 12a a bwr-12 /830-d 48a a bwr-15 /500-d 5a c bwr-15 /670-d 12a a bwr-15 /670-d 48a a ?40 0 40 45 50 55 60 65 70 75 80 85 90 95 10 0 c p a r t n u m b e r s t r u c t u r e m e c h a n i c a l s p e c i f i c a t i o n s t e m p e r a t u r e d e r a t i n g i/o connections pin function p7 1 +input 2 Cinput 3 no pin 4 on/off control 5 +output 6 common 7 Coutput 8 trim www.cd4power.com - c rohs-6 compliant* * contact c&d technologies for availability
1 5 - 2 0 w , d u a l o u t p u t d c / d c c o n v e r t e r s a series absolute maximum ratings 3 floating outputs since these are isolated dc/dc converters, their outputs are "foating." any bwr model may be confgured to produce an output of 10v, 24v or 30v (for 5v, 12v or 15v models, respectively) by applying the load across the +output and Coutput pins (pins 5 and 7), with either output grounded. the common pin (pin 6) should be left open. minimum 20% loading is recommended under these conditions. the total output voltage span may be externally trimmed as described below. filtering and noise reduction all a-series bwr 15-20 watt dc/dc converters achieve their rated ripple and noise specifcations without the use of external input/output capacitors. in critical applications, input/output ripple and noise may be further reduced by installing electrolytic capacitors across the input terminals and/or low-esr tantalum or electrolytic capacitors across the output terminals. output capac - itors should be connected between their respective output pin (pin 5 or 7) and common (pin 6) as shown in figure 2. the caps should be located as close to the power converters as possible. typical values are listed in the tables below. in many applications, using values greater than those listed will yield better results. to reduce input ripple d5a models 47f, 16v d12a models 20f, 50v d48a models 20f, 100v to reduce output ripple 5v outputs 47f, 10v, low esr 9/12/15v outputs 22f, 20v, low esr in critical, space-sensitive applications, c&d may be able to tailor the internal input/output fltering of these units to meet your specifc requirements. con - tact our applications engineering group for additional details. performance/functional specifcations typical @ t a = +25c under nominal line voltage and full-load conditions, unless noted. ? ? these converters require a minimum 20% loading on each output to maintain specifed regulation. operation under no-load conditions will not damage these devices; however they may not meet all listed specifcations. ? application-specifc internal input/output fltering can be recommended and perhaps added internally upon request. contact c&d applications engineering for details. ? applying a voltage to the control pin when no input power is applied to the converter can cause permanent damage to the converter. ? "d48a" models have basic, "d5a" and "d12a" models have functional insulation. devices can be screened or modifed for higher guaranteed isolation voltages. contact c&d applications engineering for details. input input voltage range: d5a models 4.7-7.5 volts (5v nominal) d12a models 9-36 volts (24v nominal) d48a models 18-75 volts (48v nominal) input current see ordering guide input filter type ? pi overvoltage shutdown: d5a models 10 volts d12a models 40 volts d48a models 80 volts reverse-polarity protection yes (instantaneous, 10a maximum) on/off (sync.) control (pin 4) ? ttl high = off, low (or open) = on output v out accuracy (50% load): 5v outputs 1.5%, maximum 9/12/15v outputs 1%, maximum temperature coeffcient 0.02% per c ripple/noise (20mhz bw) ? see ordering guide line/load regulation see ordering guide effciency see ordering guide isolation voltage ? 1500vdc, minimum isolation capacitance 550pf current limiting auto-recovery overvoltage protection zener/transorb clamps, magnetic feedback dynamic characteristics transient response (50% load step) 200sec max. to 1.5% of fnal value switching frequency 165khz (15khz) environmental operating temperature (ambient) : without derating C40 to +50/55/60c (model dependent) with derating to +100c (see derating curves) storage temperature C40 to +105c flammability ul 94v-0 physical dimensions 2" x 2" x 0.45" (51 x 51 x 11.4mm) shielding 5-sided case connection: d5a and d12a models pin 2 (Cv in ) d48a models pin 1 (+v in ) case material corrosion resistant steel with non-conductive, epoxy-based, black enamel fnish and plastic baseplate pin material gold-plated copper alloy weight 2.7 ounces (75.6 grams) i nput voltage: d5a models 12 volts d12a models 44 volts d48a models 88 volts input reverse-polarity protection current must be <10a. brief duration only. fusing recommended. output overvoltage protection 5v outputs 6.8 volts, limited duration 12v outputs 15 volts, limited duration 15v outputs 18 volts, limited duration output current current limited. max. current and short-circuit duration are model dependent. storage temperature C40 to +105c lead temperature (soldering, 10 sec.) +300c these are stress ratings. exposure of devices to any of these conditions may adversely affect long-term reliability. proper operation under conditions other than those listed in the performance/functional specifcations table is not implied. t e c h n i c a l n o t e s www.cd4power.com
1 5 - 2 0 w , d u a l o u t p u t d c / d c c o n v e r t e r s a series 4 figure 3a. trim connections using a trimpot figure 2. using external capacitors to reduce input/output ripple/noise 20 k 5-10 turns 5 7 6 load load 8 +i n put Cinpu t trim c ommon Co utpu t +output 1 2 +i nput ?input +outpu t trim 1 2 5 7 8 load load commo n 6 ?o utpu t figure 3b. fixed-value trim down resistor +i nput ?input +outpu t trim 1 2 5 7 8 load load commo n 6 ?o utpu t figure 3c. fixed-value trim up resistor ?o utpu t +i n put ?inpu t +output 1 2 5 7 c ommon 6 c in c ou t c ou t + + + input fusing certain applications and/or safety agencies may require the installation of fuses at the inputs of power conversion components. for c&d a-series bwr 15-20 watt dc/dc converters, you should use slow-blow type fuses with values no greater than the following: v in range fuse value d5a 6a d12a 4a d48a 2a on/off control the on/off control pin (pin 4) may be used for remote on/off operation. a ttl logic high (+2 to +5 volts, 250a max.) applied to pin 4 disables the converter. a ttl logic low (0 to +0.8 volts, 70a max.), or no connection, enables the converter. control voltages should be referenced to pin 2 (Cinput). applying a voltage to the control pin when no input power is applied to the converter can cause permanent damage to the converter. synchronization in critical applications employing multiple switching dc/dc converters, it may be desirable to intentionally synchronize the switching of selected converters (so the system noise can be reduced with notch fltering) or to purposely desynchronize the converters (to lessen the current-carrying requirements on intermediate dc buses). for multiple a-series converters, an external clock can be applied to pin 4 (control) of each device. it should be a square wave with a maximum 1sec "high" duration and an amplitude between +2v and +5v (see on/off control) referenced to pin 2 (Cinput). the frequency of the synchronizing clock should be higher than that of any individual converter. therefore, it should be 185khz 5khz. output trimming the total output voltage span, from +output (pin 5) to Coutput (pin 7) may be trimmed 5% via a single external trimpot or fxed resistor. the trimpot should be connected as shown in figure 3a with its wiper connected to pin 8 (trim). a trimpot can be used to determine the value of a single fxed resistor which should be connected as shown in figures 3b and 3c. connect the resistor between pin 8 (trim) and pin 5 (+output) to trim "down" the output voltages. connect the resistor between pins 8 and 7 (Coutput) to trim "up" the output voltages. fixed resistors should be metal-flm types with absolute tcrs less than 100ppm/c to ensure stability. . www.cd4power.com
if youre designing with emc in mind, please note that all of c&ds bwr 15-20 watt a-series dc/dc converters have been characterized for radi - ated and conducted emissions in our new emi/emc laboratory. testing is conducted in an emco 5305 gtem test cell utilizing emco automated emc test software. radiated emissions are tested to the limits of fcc part 15, class b and cispr 22 (en 55022), class b. correlation to other specifca - tions can be supplied upon request. radiated emissions plots to fcc and cispr 22 for model bwr-5/1700-d48a appear below. published emc test reports are available for each model number. contact c&ds applications engineering department for more details. 5 bwr- 5/1700-d48a radiated em i ssions en 55022 class b, 10 meters c onverter out put = 5vdc @ 1.6a 80 70 60 50 40 30 20 10 0 ?10 ?20 frequency (m hz ) 100 1000 radi at ed em issi on s en 5 5022 cl ass b li mi t ra di ated em is sions (d bv/ m) 80 70 60 50 40 30 20 10 0 ?10 ?20 frequency (m hz ) 100 1000 fcc cl ass b li mi t bwr- 5/1700-d48a radiated em i ssions fcc part 15 class b, 3 meters c onverter out put = 5vdc @ 1.6a ra di ated em is sions (d bv/ m) radi at ed em issi on s c&ds world-class design, development and manufacturing team stands ready to work with you to deliver the exact power converter you need for your demanding, large volume, oem applications. and ... well do it on time and within budget! our experienced applications and design staffs; quick-turn prototype capa - bility; highly automated, smt assembly facilities; and in-line spc quality- control techniques combine to give us the unique ability to design and deliver any quantity of power converters to the highest standards of quality and reliability. we have compiled a large library of dc/dc designs that are currently used in a variety of telecom, medical, computer, railway, aerospace and industrial applications. we may already have the converter you need. contact us. our goal is to provide you the highest-quality, most cost-effective c u s t o m c a p a b i l i t i e s e m i r a d i a t e d e m i s s i o n s www.cd4power.com quality and reliability the a-series are the frst dc/dc converters to emerge from c&ds new, company-wide approach to designing and manufacturing the most reliable power converters available. the fve-pronged program draws our quality assurance function into all aspects of new-product design, development, characterization, qualifcation and manufacturing. design for reliability design for reliability is woven throughout our multi-phased, new-product- development process. design-for-reliability practices are fully documented and begin early in the new-product development cycle with the following goals: 1. to work from an approved components/vendors list ensuring the use of reliable components and the rigorous qualifcation of new components. 2. to design with safety margins by adhering to a strict set of derating guidelines and performing theoretical worst-case analyses. 3. to locate potential design weaknesses early in the product-development cycle by using extensive halt (highly accelerated life testing). 4. to prove that early design improvements are effective by employing a thorough fraca (failure reporting analysis and corrective action) system. halt testing the goal of the accelerated-stress techniques used by c&d is to force device maturity, in a short period of time, by exposing devices to excessive levels of "every stimulus of potential value." we use halt (highly accelerated life testing) repeatedly during the design and early manufacturing phases to detect potential electrical and mechanical design weaknesses that could result in possible future feld failures. during halt, prototype and pre-production dc/dc converters are subjected to progressively higher stress levels induced by thermal cycling, rate of temperature change, vibration, power cycling, product-specifc stresses (such as dc voltage variation) and combined environments. the stresses are not meant to simulate feld environments but to expose any weaknesses in a products electro/mechanical design and/or assembly processes. the goal of halt is to make products fail so that device weaknesses can be analyzed and strengthened as appropriate. applied stresses are continually stepped up until products eventually fail. after corrective actions and/or design changes, stresses are stepped up again and the cycle is repeated until the "fundamental limit of the technology" is determined.
1 5 - 2 0 w , d u a l o u t p u t d c / d c c o n v e r t e r s a series 1 5 - 2 0 w , d u a l o u t p u t d c / d c c o n v e r t e r s a series ds-0323a 05/14/07 ? 2007 c&d technologies, inc. c&d technologies, inc. makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. the descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. specifcations are subject to change without notice. c&d technologies, inc. 11 cabot boulevard, mansfeld, ma 02048-1151 u.s.a. tel: (508) 339-3000 (800) 233-2765 fax: (508) 339-6356 www.cd4power.com email: sales@cdtechno.com iso 9001 registered ? usa: tucson (az), tel: (800) 547 2537, email: sales@cdtechno.com canada: toronto, tel: (866) 740 1232, email: toronto@cdtechno.com uk: milton keynes, tel: +44 (0)1908 615232, email: mk@cdtechno.com france: montigny le bretonneux, tel: +33 (0)1 34 60 01 01, email: france@cdtechno.com germany: mnchen, tel: +49 (0)89-544334-0, email: ped.munich@cdtechno.com japan: tokyo, tel: 3-3779-1031, email: sales_tokyo@cdtechno.com osaka, tel: 6-6354-2025, email: sales_osaka@cdtechno.com website: www.cd4power.jp china: shanghai, tel: +86 215 027 3678, email: shanghai@cdtechno.com guangzhou, tel: +86 208 221 8066, email: guangzhou@cdtechno.com 6 c&d has invested in a qualmark ovs-1 halt tester capable of applying voltage and temperature extremes as well as 6-axis, linear and rotational, random vibration. a typical halt profle (shown above) consists of thermal cycling (C55 to +125c, 30c/minute) and simultaneous, gradually increas - ing, random longitudinal and rotational vibration up to 20gs with load cycling and applied-voltage extremes added as desired. many devices in c&ds new a-series could not be made to fail prior to reaching either the limits of the halt chamber or some previously known physical limit of the device. we also use the halt chamber and its ability to rapidly cool devices to verify their "cold-start" capabilities. qualifcation for each new product, electrical performance is verifed via a comprehensive characterization process and long-term reliability is confrmed via a rigorous qualifcation procedure. the qual procedure includes such strenuous tests as thermal shock and 500 hour life. qual testing is summarized below. in-line process controls and screening a combination of statistical sampling and 100% inspection techniques keeps our assembly line under constant control. parameters such as solder-paste thickness, component placement, cleanliness, etc. are statistically sampled, charted and fne tuned as necessary. visual inspections are performed by trained operators after pick-and-place, soldering and cleaning operations. units are 100% electrically tested prior to potting. all devices are temperature cycled, burned-in, hi-pot tested and fnal-electrical tested prior to external visual examination, packing and shipping. rapid response to problems c&d employs an outstanding corrective-action system to immediately address any detected shortcomings in either products or processes. when - ever our assembly, quality or engineering personnel spot a product/process problem, or if a product is returned with a potential defect, we immediately perform a detailed failure analysis and, if necessary, undertake corrective actions. over time, this system has helped refne our assembly operation to yield one of the lowest product defect rates in the industry. typical halt profle qualifcation test method/comments halt c&d in-house procedure high temperature storage max. rated temp., 1,000 hours thermal shock 10 cycles, C55 to +125c temperature/humidity +85c, 85% humidity, 48 hours lead integrity c&d in-house procedure life test +70c, 500 hours* marking permanency c&d in-house procedure end point electrical tests per product specifcation qualifcation testing * interim electrical test at 200 hours. 10 20 30 40 50 60 70 80 90 40 20 0 random vibration (g 's ) temperature ( c) t est ti me (m in utes) 100 80 60 40 20 0 C20 C40
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