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fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch ? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 rev. 1.1.0 february 2009 fsusb31 low-power, single-port, high-speed usb 2.0 (480mbps) switch features low on capacitance: 3.7pf (typical) low on resistance: 6.5 (typical) low power consumption: 1a (maximum) ? 10a maximum i cct over an expanded control voltage range: v in = 2.6v, v cc = 4.3v wide -3db bandwidth: > 720mhz 8kv i/o to gnd esd protection power-off protection when v cc = 0v, d+ / d- pins can tolerate up to 5.5v packaged in: ? 8-lead micropak? (1.6 x 1.6mm) ? 8-lead us8 ? 8-lead ultrathin mlp (1.2 x 1.4mm) applications cell phone, pda, digital camera, and notebook lcd monitor, tv, and set-top box related resources an-6022 using the fsusb30/31 to comply with usb 2.0 fault condition requirements description the fsusb31 is a low-power, single-port, high-speed usb 2.0 switch. this part is configured as a double-pole, single-throw switch and is opt imized for switching or iso- lating a high-speed (480mbps) source or a high-speed and full-speed (12mbps) source. the fsusb31 is com- patible with the requirements of usb2.0 and features an extremely low on capacitance (c on ) of 3.7pf. the wide bandwidth of this device (>720mhz) exceeds the band- width needed to pass the third harmonic, resulting in sig- nals with minimum edge and phase distortion. superior channel-to-channel crosstalk minimizes interference. the fsusb31 contains special circuitry on the d+ / d- pins that allows the device to withstand an over-voltage condition. this device is also designed to minimize cur- rent consumption even when the control voltage applied to the oe pin is lower than the supply voltage (v cc ). this feature is especially valuable for mobile applications, such as cell phones, allowing direct interface with the general-purpose i/os of the baseband processor. other applications include port isolation and switching in porta- ble cell phones, pdas, digital cameras, printers, and notebook computers. ordering information for fairchild?s definition of ?green? eco status, please visit: http://www.fairchildsemi.com /company/green/rohs_green.html . application diagram figure 1. typical application diagram part number package eco st atus package description fsusb31k8x mab08a green 8-lead us8, jedec mo-187, variation ca 3.1mm wide FSUSB31L8X mac08a rohs 8-lead micropak, 1.6mm wide fsusb31umx umlp08a green 8-lead, ultrathin molded leadless package (umlp), 1.2 x 1.4mm base band processor or fs usb controller hs usb controller v cc usb connector fsusb31 d+ d? oe micropak ? is a trademark of fairchild semiconductor corporation.
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 2 analog symbol figure 2. analog symbol connection diagrams figure 3. pin assignments for micropak figure 4. pin assignments for us8 figure 5. pin assignments for umlp pin descriptions truth table hsd+ d+ oe control hsd? d? 7 g 65 4 8 2 v cc 13 gnd oe hsd+ d+ nc hsd? d? v cc nc hsd? d? gnd oe hsd+ d+ 8 7 6 5 1 2 3 4 pin name description oe bus switch enable d+, d ? , hsd+, hsd ? data ports nc no connect oe function high disconnect low d+, d ? = hsd+, hsd-
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 3 absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be opera- ble above the recommended operating conditions and stressing the parts to these levels is not recommended. in addi- tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. note: 1.the input and output negative voltage ratings may be e xceeded if the input and output diode current ratings are observed. recommended oper ating conditions the recommended operating conditions table defines the conditions for actual dev ice operation. recommended operating conditions are specified to ensure optimal perfor mance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. note: 2. control input must be held high or low and it must not float. symbol parameter minimum maximum unit v cc supply voltage -0.5 5.5 v v s dc input voltage (1) -0.5 v cc v v in dc switch voltage (1) hsd -0.5 v cc v d + , d ? -0.5 v cc v i ik dc input diode current -50 ma i out dc output current 50 ma t stg storage temperature -65 +150 c esd human body model: jesd22-a114 all pins 7.5 kv i/o to gnd 8 kv symbol parameter mi nimum maximum unit v cc supply voltage 3.0 4.3 v v in control input voltage (2) 0 v cc v switch input voltage 0 v cc v t a operating temperature -40 +85 c
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 4 dc electrical characteristics all typical values are at 25c unless otherwise specified. notes : 3. measured by the voltage drop between dn, hsd, and dn pins at the indicated current through the switch. on resistance is determined by the lower of the voltage on the two ports. 4. guaranteed by characterization. ac electrical characteristics all typical values are for v cc = 3.3v are at 25c unl ess otherwise specified. note : 5. guaranteed by characterization. symbol parameter conditions v cc (v) t a = ? 40c to +85c unit min. typ. max. v ik clamp diode voltage i in = ? 18ma 3.0 -1.2 v v ih input voltage high 3.0 to 3.6 1.3 v 4.3 1.7 v il input voltage low 3.0 to 3.6 0.5 v 4.3 0.7 i in control input leakage v in = 0v to v cc 0 to v cc -1.0 1.0 a i oz off state leakage 0 hsd v cc 4.3 -2.0 2.0 a i off power off leakage current (d+, d?) v in = 0.0v to 4.3v, v cc = 0v 0-2.0 2.0 a r on switch on resistance (3) v in = 0.4v, i on = ? 8ma 3.0 6.5 10.0 r on delta r on (4) v in = 0.4v, i on = ? 8ma 3.0 0.35 r on flatness r on flatness (3) v in = 0.0v ? 1.0v, i on = ? 8ma 3.0 2.0 i cc quiescent supply current v in = 0.0v or v cc , i out = 0 4.3 1.0 a i cct increase in i cc current per control voltage and v cc levels v in = 2.6v, v cc = 4.3v 4.3 10.0 a symbol parameter conditions v cc (v) t a = ? 40c to +85c unit figure number min. typ. max. t on turn-on time, oe to output v in = 0.8v, r l = 50 , c l = 5pf 3.0 to 3.6 15.0 30.0 ns figure 13 t off turn-off time, oe to output v in = 0.8v, r l = 50 , c l = 5pf 3.0 to 3.6 12.0 25.0 ns figure 13 t pd propagation delay (5) r l = 50 , c l = 5pf 3.3 0.25 ns figure 11 figure 12 t bbm break-before-make r l = 50 , c l = 5pf, v in = 0.8v 3.0 to 3.6 2.0 6.5 ns figure 14 o irr off isolation (non-adjacent) r t = 50 , f = 240mhz 3.0 to 3.6 -35.0 db figure 17 xtalk non-adjacent channel crosstalk r t = 50 , f = 240mhz 3.0 to 3.6 -55.0 db figure 18 bw -3db bandwidth r t = 50 , c l = 0pf 3.0 to 3.6 720 mhz figure 16 r t = 50 , c l = 5pf 550
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 5 usb hi-speed related ac electrical characteristics note : 6. guaranteed by design. capacitance symbol parameter conditions v cc (v) t a = ? 40c to +85c unit figure number min. typ. max. t sk(o) channel-to-chan- nel skew (6) c l = 5pf 3.0 to 3.6 50.0 ps figure 11 figure 15 t sk(p) skew of opposite transitions of the same output (6) c l = 5pf 3.0 to 3.6 20.0 ps figure 11 figure 15 t j total jitter (6) r l = 50 , c l = 5pf, t r = t f = 500ps at 480 mbps (prbs = 2 15 ? 1) 3.0 to 3.6 200 ps symbol parameter conditions t a = ? 40c to +85c unit figure number min. typ. max. c in control pin input capacitance v cc = 0v 1.0 pf figure 20 c on on capacitance v cc = 3.3v, oe = 0v 3.7 pf figure 19 c off off capacitance v cc and oe = 3.3v 1.7 pf figure 20
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 6 typical characteristics figure 6. gain vs. frequency figure 7. off isolation figure 8. crosstalk -8 -7 -6 -5 -4 -3 -2 -1 0 1 10 100 1000 10000 frequency (mhz) 1 10 100 1000 frequency (mhz) gain (db) -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 off isolation (db) c l = 0pf v cc = 3.3v v cc = 3.3v 1 10 100 1000 frequency (mhz) -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 crosstalk (db) v cc = 3.3v
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 7 test diagrams figure 9. on resistance figure 10. off leakage figure 11. ac test circuit load figure 12. switch propagation delay waveforms (t pd ) figure 13. turn on / turn off waveform (t on / t off ) gnd hsd i on v on v in id n(off) v s = 0 or v cc fsusb31 nc a gnd gnd v in dn oe v s = 0 to v cc fsusb31 each switch port is tested separately. r on = v on / i on oe t rise = 500ps t plh hsd+, hsd? input: output: d+, d? t fall = 500ps v oh r l r s c l * hsd v in v oe d+, d? fsusb31 gnd 90% 50% 50% 90% 10% 10% 50% gnd gnd t phl 50% v ol 400mv 0v v out r l , r s , and c l are functions of the application environment (see ac electrical tables for specific values). *c l includes test fixture and stray capacitance. t rise = 2.5ns t on t off input ? oe output ? v out t fall = 2.5ns v oh 90% v cc /2 v cc /2 90% 10% 10% 90% 90% v ol v cc gnd
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 8 test diagrams (continued) figure 14. break-before-make (t bbm ) figure 15. switch skew tests figure 16. bandwidth t d t r = t f = 2.5ns (10?90%) r l s c l * hsdn hsdn v o control input d+, d? gnd control input 50% v cc 0v v out v out v cc v cc 0.9 x v out *c l includes test fixture and stray capacitance. t rise = 500ps t plh t phl input: output: d+, d? hsdn+ hsdn? t fall = 500ps v oh 90% 90% 50% 50% 10% 10% 50% 50% v ol 400mv t sk(p) = | t phl ? t plh | pulse skew, t sk(p) 0v t rise = 500ps t plh1 t phl1 output1: input: d+, d? output1: d2+, d2? hsd1+ hsd1? t fall = 500ps v oh 90% 90% 50% 50% 10% 10% 50% 50% v ol 400mv t sk(o) = | t plh1 ? t plh2 | or | t phl1 ? t phl2 | output skew, t sk(out) 0v t plh2 t phl2 v oh 50% 50% v ol r s v in fsusb31 gnd v oe network analyzer v out gnd v s gnd r t gnd gnd r s and r t are functions of the application environment (see ac electrical tables for specific values).
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 9 test diagrams (continued) figure 17. channel off isolation figure 18. non-adjacent ch annel-to-channel crosstalk figure 19. channel on capacitance f igure 20. channel off capacitance r t r s v in fsusb31 gnd network analyzer v out gnd v s gnd gnd off-isolation = 20 log (v out / v in ) r t gnd gnd v oe r t r s v in fsusb31 gnd network analyzer v out gnd nc v s gnd gnd r s and r t are functions of the application environment (50, 75 or 100 ). crosstalk = 20 log (v out / v in ) r t gnd gnd v oe fsusb31 dn capacitance meter f = 240mhz hsdn fsusb31 dn capacitance meter f = 240mhz v oe = 0 or v cc hsdn oe v oe = 0 or v cc oe
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 10 application guidance: meeting usb 2.0 vbus short requirements in section 7.1.1 of the usb 2. 0 specification, it notes that usb devices must be able to withstand a vbus short to d+ or d- when the usb devices is either powered off or powered on. the fsusb31 can be successfully config- ured to meet both these requirements. power-off protection for a vbus short circuit, the switch is expected to with- stand such a condition for at least 24 hours. the fsusb31 has specially designed circuitry which pre- vents unintended signal bleed through as well as guar- anteed system reliability duri ng a power-down, over- voltage condition. the protection has been added to the common pins (d+, d-). power-on protection the usb 2.0 specification also notes that the usb device should be capable of withstanding a vbus short during transmission of data. fairchild recommends add- ing a 100 series resister betw een the switch vcc pin and supply rail to protect against this case. this modifi- cation works by limiting curre nt flow back into the vcc rail during the over-voltage event so current remains within the safe operating range. in this application, the switch passes the full 5.25v input signal through to the selected output, while maintaining specified off isolation on the un-selected pins. d+ = 5.25v v cc = 3.6 v 100 ohms fsusb31 d- = 5.25v hsd+ hsd- figure 21. a 100 resistor in series with the v cc supply allows the fsusb31 to withstand a vbus short when powered up for more information, see applications note an-6022 ? using the fsusb30/fsusb31 to comply with usb 2.0 fault condition requirements at www.fairchildsemi.com .
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 11 physical dimensions figure 22. 8-lead us8, jedec mo-187, variation ca 3.1mm wide for micropak? tape and reel specificatio ns, please visit fairchild?s website: http://www.fairchildsemi.com/ms/ms/ms-522.pdf . package drawings are provided as a service to customers considering fairchil d components. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, wh ich covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 12 physical dimensions (continued) figure 23. 8-lead micropak, 1.6mm wide for micropak? tape and reel specificatio ns, please visit fairchild?s website: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf . package drawings are provided as a service to customers considering fairchil d components. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, wh ich covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . (0.09) (0.1) (0.2) 1.6 2x 0.05 0.00 1.6 2x c 0.05 c 4 3. drawing conforms to asme y.14m-1994 2. dimensions are in millimeters 1. package conforms to jedec mo-255 variation uaad bottom view 4. pin 1 flag, end of package offset mac08arev4 1 23 5 6 7 8 notes: 8x 0.25 0.35 3x 8x 1.0 4 0.5 8x 0.25 0.15 0.10 c a b 0.05 c 0.10 c top view index area b recommended landpattern a 0.10 c 0.55 max 0.05 c detail a 0.35 0.25 (0.15) (0.20) 0.35 0.25 detail a pin #1 terminal scale: 2x 5. drawing file name: mkt-mac08arev4
? 2006 fairchild semiconductor corporation www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0 13 physical dimensions (continued) figure 24. 8-lead, ultrathin molded leadless package (umlp), 1.2 x 1.4mm for micropak? tape and reel specificatio ns, please visit fairchild?s website: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf . package drawings are provided as a service to customers considering fairchil d components. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, wh ich covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . 1.20 1.4 5 2 0.35 0.25 7x (0.2) 0.15 0.25 seating plane 0.40 0.10 c a b 0.05 c 2x 2x 0.025 0.00 c 0.10 a c 0.10 a. does not conforms to jedec standard. c 0.05 b c 0.05 pin#1 ident 0.55 max c bottom view top view 8 1 6 4 notes: b. dimensions are in millimeters. c. dimensions and tolerances conforms to asme y14.5m, 1994. d. drawing file name : umlp08arev1 8x detail a detail: a scale : 2x 0.30 0.20 0.10 45 0.10 0.400 0.250 8x 0.350 7x 0.450 1.250 0.625 1.450 0.725
? 2006 fairchild semiconductor corporation 14 www.fairchildsemi.com fsusb31 ? low-power, si ngle-port, high-speed us b 2.0 (480mbps) switch fsusb31 rev. 1.1.0

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