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orderin g numbe r : ena1569a LA4809M monolithic linear ic stereo headphone amplifier overview LA4809M is a 2-channels power amplifier to drive the headphone with wide supply voltage range. to minimize the effects of power supply, the regulator circuit fo r control of the output power is built-in to enable setting of th e ou tpu t power value adequate for the headphone amplifier (2 types of set value available). this product also has the standby function, and is suitable as a driver for wide-ranging headphone. applications headphone driver for tv and audio equipment features ? 2-channels power amplifier built-in (maximum output power value changeable according to the setting) maximum output power a = 55mw standard (pin 10 : open) maximum output power b = 160mw standard (pin 10 : gnd) *v cc = 12v , r l = 16 , thd = 10% *change to another power value possible by adding the external parts ? regulator built-in : limited change of the output power va lue due to fluctuation of supply voltage high-ripple rejection ratio ? st andby function (also used for voice muting) : current drain at standby = 0.01 a standar d (v cc = 12v) ? ov erheat protection circuit built-in ? wide supply voltage range (differing according to the set value of maximum output power) : v cc = 3. 6v to 17v specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. o2809 sy 20091023-s00004 / o2109 sy pc no.a1569-1/15
LA4809M no.a1569-2/15 specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc max without signal 18 v allowable power dissipation pd max * mounted on a printed circuit board. 1.75 w maximum junction temperature tj max 150 c operating temperature topr -30 to +75 c storage temperature tstg -40 to +150 c * evaluation board of sanyo semiconductor : 50mm 50mm 0.8mm (glass epoxy double-side pcb) operating conditions at ta = 25 c parameter symbol conditions ratings unit recommended supply voltage v cc 12 v recommended load resistance r l 16 to 32 v cc op-1 mode-b (for p o ma x = 160mw) 6.2 to 17 v v cc op-2 mode-a (for p o ma x = 55mw) 4.2 to 17 v operating supply voltage range v cc op-3 * depending on the output power value when the external part is added 3.6 to 17 v * determine the supply voltage with due consider ation of the allowable power dissipation. * note that the supply voltage range is limited depending on the setting of the maximum output power value. electrical characteristics at ta = 25 c, v cc = 12v, r l = 16 , fin = 1khz, v3 = 2v, pin 10 : open ratings parameter symbol conditions min typ max unit quiescent current drain i cco p no signal 3.8 6.5 ma standby current drain i stby no signal, standby mode (v3 = 0.3v) 0.01 5 a maximum output power-a p o ma xa thd = 10%, mode-a 30 55 mw maximum output power-b p o ma xb thd = 10%, mode-b (pin 10 : gnd) 87 160 mw voltage gain vg vin = -20dbv 10.2 11.7 13.2 db channel balance chb vin = -20dbv -1.5 0 +1.5 db total harmonic distortion thd vin = -20dbv 0.15 0.7 % output noise voltage v n out rg = 620 , 20 to 20khz 18 50 vrms channel separation chsep vin = -15dbv 60 72 db mute attenuation level vmt vin = -10dbv, standby mode (v3 = 0.3v) -80 -88 dbv ripple rejection ratio svrr rg = 620 , fr = 100hz, vr = -10dbv 70 81 db pin 2 voltage-a v2a mode-a 2.1 v pin 2 voltage-b v2b mode-b (pin 10 : gnd) 3.1 v stby control high voltage vsbh (circuit power mode) 2 9 v stby control low voltage vsbl (c ircui t standby mode) 0 0.6 v * mode-a (pin 10 = open) : p o max = 55mw pin 2 voltage : v2 = 2.1v, internal regulator voltage : vreg = 2 v2 = 4.2v, amp operating reference voltage : vref = 1 v2 = 2.1v mode-b (pin 10 = gnd) : p o max = 160mw pin 2 voltage : v2 = 3.1v, internal regulator voltage : vreg = 2 v2 = 6.2v, amp operating reference voltage : vref = 1 v2 = 3.1v
LA4809M package dimensions unit : mm (typ) 3384 pd max -- ta 0 1.5 1.05 0.18 1.0 0.5 0.3 2.0 1.75 ? 30 ? 20 75 20 40 60 80 0 100 ambient temperature, ta -- c maximum power dissipation, pd max -- w independent ic sanyo evaluation board mounted on a specified board (evaluation board of sanyo semiconductor) : 50mm 50mm 0.8mm (glass epoxy double-side pcb) sanyo : mfp12s(225mil) 5.0 4.4 6.4 0.63 12 12 0.15 0.3 0.8 (0.5) 1.7 max (1.5) (2.6) (3.4) 0.05 top view side view side view bottom view evaluation board copper foil pattern diagram (dimensions : 50mm 50 mm 0.8mm) top layer (top view) bottom layer (top view) no.a1569-3/15
LA4809M block diagram and sample application circuit 7 8 9 11 12 6 5 4 2 10 3 1 + + vin1 in1 rf stby vrf vref = vrf out1 nc v cc reg in2 nc pls out2 nc gnd vin2 *output power limiter setting pin 10 open p o max = 55mw pin 10 gnd p o max = 160mw from cpu gnd v cc + - + - bias v test circuit diagram + 7 8 9 10 12 6 5 4 3 11 2 1 620 in1 rf stby out1 nc v cc in2 nc pls out2 nc gnd 0.1f 100f 1f v out 1 620 sg s11 0.1f load resistance 16 load resistance 16 + 100f v cc vstby 2.2f v out 2 s1 s12 no.a1569-4/15
LA4809M pin functions pin voltage (v) pin no. pin name mode-a mode-b description equivalent cir cuit 1 12 in1 in2 2.1 3.1 amplifier input pin. vref 45k v cc 1 12 v cc out 2 rf 2.1 3.1 reference voltage pin. 39a 26k 77k 54k pls-cnt stby-cnt v cc 2 v cc 1 2 vref vreg 3 stby applied applied standby control pin. (to which the external voltage is applied) 35k 45k v cc 3 v cc 4 9 out1 out2 2.1 3.1 amplifier output pin. 10k + - v cc in vref vreg 4 9 v cc 5 8 11 nc nc pin. 6 v cc applied applied power pin. (to which the external voltage is applied) 7 gnd gnd gnd gnd pin. 10 pls 0.69 gnd output power selection pin. v cc 22a 10k 10 v cc no.a1569-5/15
LA4809M cautions for use 1. input coupling capacitors (cin1, cin2) cin1 (cin2) is an input coupling capacitor, which is intended for dc cut. this capacitor forms a high pass filter togethe r with the internal resistance of 45k attenuating the bass frequency signal. set the capacitance value with due consideration of the cut-off frequency. note that the cut-off frequency is expressed as follows : 1ch ? fc 1 = 1/ (2 cin1 45000) 2ch ? fc 2 = 1/ (2 cin2 45000) this capacitor also affects the pop noise at a time of falling. note that setting the higher capacitance value causes delay o f the capacitor discharge rate, causing louder pop noise. 2. output coupling capacitors (cout1, cout2) cout1 (cout2) is an output coupling capacitor, which is in ten ded for dc cut. this capacitor forms a high pass filter together with the load impedance of r l , attenuating the bass frequency signal. set the capacitance value with due consideration of the cut-off frequency. normally, the chem ical capacitor is used. when setting the capacitance value, take into account the characteristics of the chemical capacitor, namely, the capacitance value of chemical capacitor tends to decrease at low temperature. note that the cut-off frequency is expressed as follows : 1ch ? fc 3 = 1/ (2 cout1 r l ) 2ch ? fc 4 = 1/ (2 cout2 r l ) this capacitor also affects the pop noise at a time of risi n g. note that setting the higher capacitance value causes louder pop noise. 3. power supply line capacitor (cv cc ) cv cc is in tended to stabilize the power supply line. arrange this capacitor as near to ic as possible and always use the ceramic capacitor with superior hi gh frequency characteristics. increase the capacitance value when the pow er supp ly line is relatively unstable. 4. pin 2 capacitor (crf) crf is a capacitor to determine the transient response characte ristics of the pin 2 voltage (r eference voltage) : vrf. at a time of rising, this is charged by the internal constant-current source (about 39 a). at a time of falling, this is discharged by the internal resistance (about 157k ). due attention must be paid because pop noise and the amplifier rise / fall time change depending on the transient response characteristics of pin 2 voltage . decreasing the capacitance value to shorten the response time, pop noise becomes louder. therefore, the use of the value shown below as the capacitance value is recommended. as this capacitor reduces the power supply ripple component, decrease in the capacitance value results in lowering of the ripple removal ratio. crf recommended values : 1 f to 3.3 f 5. voltage gain the voltage gain of amplifier is determined by the internal resistance and is fixed at about 11.7db. when the output lev el is to be changed, attempt attenuation with the resistor in the forward stage of input as shown in fig.1. to enhance the degree of attenuation, use two resistors as shown in fig.2 so as to reduce internal-resistor variation factors. though attenuation in the backward stage of output as shown in fig.3 is possible, this may cause decrease in the m aximum output power. no.a1569-6/15 (low attenuation degree) ( high attenuation degree) in out other ic LA4809M in out other ic LA4809M out LA4809M + fig.1 fig.2 fig.3 6. load capacitance when connecting a capacitor between the output pin and gn d for an anti-electric wave radiation measure, this capacitor may cause decrease in the phase margin of power amplifier, resulting in the oscillation phenomenon. when connecting this capacitor, pay attention to its capacitance value. recommended capacitance value : 560pf or less, or 0.01 f to 0.1 f
LA4809M 7. selection of the maximum output power value (handling of pin 10) this ic enables selection of two types of maximum output power value according to the handling method of pin 10. th e regulator circuit for output power control is built in, in which, by changing the voltage of pin 2, the regulator voltage : vreg is changed to enable selection of the maximum output power value. mode-a (p o max = 55mw) : pin 10 set to the open state pin 2 voltage : v2 = 2.1v, internal regulator voltage : vreg = 4.2v, amplifier operating reference voltage : vref = 2.1v mode-b (p o max = 160mw) : pin 10 connected to the gnd line pin 2 voltage : v2 = 3.1v, internal regulator voltage : vreg = 6.2v, amplifier operation reference voltage : vref = 3.1v when the maximum output power value is to be changed under cpu v cc from cpu 10k 22a pls 10 control, use the npn transistor as shown in fig.4, so that the pin 10 voltage approaches the gnd potential (0.1v or below) sufficiently. fi g.4 8. change of the maximum output power value (by handling pin 2) pin 2 voltage : v2 is determined from the constant-current source and internal resistance as shown in fig.5. operating ? m ode-a : 54k used mode-b : 80k (5 4k + 26k ) used not operating (at a time of falling) ? 157 k (54k + 26k + 77k ) used the internal regulator voltage and amplifier operating reference voltage are generated from this pin 2 voltage. regulator voltage : vreg = v2 2 amplifier operating reference voltage : vref = v2 1 accordingly, to change the maximum output power value, c onnect the resistance : rrf between pin 2 and gnd as shown in fig.5. this will cause change in the pin 2 voltage. note that, in view of circuit operation, the pin 2 voltage must be set to 1.6v or above. if the discharge constant is not to be changed, use the npn transistor to control the rrf connection as shown in fig.6. 39a 26k 77k 54k pls-cnt stby-cnt v cc rrf rf stby from cpu 2 crf crf rrf rf 2 3 fig.5 fi g.6 9. standby pin (pin 3) by controlling the standby pin, the mode can be changed over between standby and operation. though this control is possible directly by the cpu output port, the control may be exposed to adverse affect of digital noise from cpu. it is recommended therefore to in sert series resistance (1k or more). standby mode ? v3 = 0v to 0.6v operation mode ? v3 = 2v to 9v (for v cc = 9v or above), v3 = 2v to v cc (for v cc = less than 9v) continued on next page. no.a1569-7/15
LA4809M continued from preceding page. when the standby function is not to be used, pin 3 may be interlocked with power supply as shown in fig.7. however, due care must be taken in this case because such interlock makes the effectiveness of th e pop noise reduction circuit null, resulting in extremely large pop noise at a time of ri sing and falling. there are al so methods to reduce the pop noise by using two capacitors as shown in fig.8. if pop noise is to be suppressed sufficiently, cpu control of the standby pin is recommended. note that the approximate inrush current; i3 into the standby pin is calculated as follows : pin 3 inrush current (unit : a) : i3 = (5 v cc - 4) 10 -5 /rst no.a1569-8/15 v cc rst fig.7 fi g.8 10. operating power supply voltage range the applicable power supply voltage range varies depending on the setting conditions of the maximum output power v alue. use this range while taking into account the pin 2 voltage. as a guideline, the supply voltage at the lowest point to be used must be two times the pin 2 voltage. note that the minimum operating supply voltage must be 3.6v. mode-b ? v cc op = 6.2v to 17v mode-a ? v cc op = 4.2v to 17v at change of the output power va lue due to external resistance ? v cc op = 2 v2 to 17v (v2 ? pin 2 voltage) 11. handling of nc pins (pins 5, 8, and 11) nc pins are not connected to an yth ing internally and may be left in the open state. to enhance the heat sink effect as much as possible, connection of nc pi ns to the gnd line is recommended. in particular, pin 5 should be connected to the gnd line so as to protect pin 4 (the first output). if the pins 4 and 5 section and the pins 5 and 6 section are bridged with solder simultaneously, the output pin enters the po wering (short to power) state, allowing the large current to flow into the output pin, resulting in deterioration or damage of internal elements. risk of deterioration or dama ge may be reduced when pin 5 is connected to gnd. when the output pin voltage is about 0.7v or less, drive and power stages of the power amplifier circuit used becomes inoperable. in this context, the protection in case of ground fault is provided. 12. heat protective circuit the heat protective circuit is incorporate d in ic and can reduce the risk of damage/deterioration in case of abnormal heat generation due to certain reasons. th is protective circuit is activated when the junction temperature : ti of the chip in ic increases to about 160 c, shutting off current supply to the power amplifier. the signal is not output anymore. when the chip temperature lowers (to about 130 c), the circuit is automatically reset. note that this circuit is not always capable of preventing da mage/deterioration and should be handled with utmost care. in case of abnormal heating, turn off power supply immediately and identify the probable causes. 13. short-circuit between pins power on while leaving the pins in the short-circuit state may cause deterioration or damage. when installing ic to the su bstrate, check if pins are short-circuited with solder before turning power supply on. 14. load short-circuit leaving the loads in the short-circuit state over a long period of time may cause deterioration or damage. never sho rt-circuit loads. 15. maximum rating when the product is used near the maxi m um rating, even the smallest change in the conditions ma y cause exceeding of the maximum rating, possibly l eading to the fracture accident. take the suff icient fluctuation margin for the supply voltage and always use the product with in a range never exceeding the maximum ra ting. the package used for this ic has the low heat sink effect as a single unit. when the working supply voltage is high, solder the backside heat sink pad to ensure sufficient heat sink performance with copper foil of printed circuit board. v cc v cc rst 6 stby 3 v cc 6 stby + cst2 3 + cst1
LA4809M no.a1569-9/15 0.1 2 1 3 5 7 2 10 3 5 7 2 3 5 7 100 0.1 2 3 5 7 1 2 3 5 7 2 3 5 7 10 100 11 0 2 3 5 7 2 3 5 7 23 57 23 57 23 57 10 100 100 0 0.4 0.5 246 10 81 21 41 6 4567 18 3 8 output power, p o -- mw total harmonic distortion, thd - - % 20 50 40 30 60 20 25 30 35 70 60 80 100 120 140 160 180 46810121416 6 8 10 12 14 16 6 8 10 12 14 16 6 8 10 12 14 16 18 supply voltage, v cc -- v o p o -- v cc 15 0.1 0.2 0.3 0 0.1 0.2 0.3 0.4 40 41 8 supply voltage, v cc -- v o p o -- v cc thd -- v cc 30 40 50 70 60 80 90 100 110 41 8 supply voltage, v cc -- v output power, p o -- mw supply voltage, v cc -- v total harmonic distortion, thd -- % 41 8 supply voltage, v cc -- v output power, p o -- mw 1 1000 output power, p o -- mw total harmonic distortion, thd -- % thd -- p o supply voltage, v cc -- v thd -- v cc thd -- p o p o -- v cc p o -- v cc output power, p -- mw output power, p -- mw total harmonic distortion, thd - - % mode-a v cc = 12v fin = 1khz mode-b v cc = 12v fin = 1khz r l = 32 16 r l = 32 16 mode-a r l = 16 fin = 1khz v3 = 2v mode-a r l = 32 fin = 1khz v3 = 2v p o = 10mw fin = 1khz r l = 16 p o = 1mw fin = 1khz r l = 16 mode-b r l = 16 fin = 1khz v3 = 2v thd = 10% thd = 10% 1% 1% mode-b r l = 32 fin = 1khz v3 = 2v thd = 10% thd = 10% 1% 1% mode-a mode-b mode-b mode-a
LA4809M no.a1569-10/15 0.1 2 3 5 7 1 15 16 17 18 10 35 27 35 27 100 35 27 1k 35 27 10k 6 8 12 14 16 10 6 8 12 14 16 10 100k 0.01 0.1 1 0.1 1 23 10 7 523 100 7 5237 52 3 10 7 523 100 7 5237 5 1000 1 1000 frequency, f -- hz total harmonic distortion, thd - - % 0 5 10 15 0.4 20 11 11.5 12 12.5 13 10 7 100 3 25 7 1k 3 25 7 10k 3 25 7 3 25 100k input frequency, f in -- hz pd -- p o 0 0.8 1.2 2 3 5 7 2 3 5 7 2 3 5 7 2 3 5 7 0.001 0.01 1.6 11 0 23 57 23 57 100 23 57 57 10 23 57 100 23 57 23 1000 output power, p o -- mw/ch pd -- p o i cc -- p o 0 0.2 0.4 0.6 0.8 1.0 1 1000 output power, p o -- mw/ch power dissipation, pd -- w output power, p o -- mw/ch current drain, i cc -- a 41 8 supply voltage, v cc -- v voltage gain, vg -- db 41 8 supply voltage, v cc -- v output noise voltage, v no -- vrms thd -- f output power, p o -- mw/ch cc i cc -- p o v no -- v cc vg -- fin vg -- v cc v oltage gain, vg -- db power dissipation, pd - - w current drain, i -- a v cc = 12v p o = 10mw r l = 16 rg = 620 din audio filter r l = 32 16 mode-a mode-b v cc = 12v vin = -20dbv r l = 16 cout = 100f vin = -20dbv fin = 1khz cout = 100f r l = 32 16 v cc = 17v 12v 9v v cc = 17v 12v 9v 7v v cc = 12v fin = 1khz r l = 16 v cc = 12v fin = 1khz r l = 32 fin = 1khz r l = 16 fin = 1khz r l = 32
LA4809M no.a1569-11/15 50 60 70 80 90 60 65 70 75 80 10 35 27 35 27 100 35 27 1k 35 27 10k 12 14 16 10 86 100k 70 90 90 10 23 100 7 523 1k 7 523 10k 7 5237 51 97 51 3 100k 31 input frequency, fin -- hz 1 1 5 7 50 60 70 80 --90 --85 --80 90 --95 --90 --85 --80 --75 0.1 2 1 37 52 37 52 1k 357 2357 10k 23 57 23 57 10 capacitance, crf -- f vmt -- v cc --95 75 80 85 40 60 50 70 80 --75 46810 16 12 14 --20 --25 --10 --5 --15 18 supply voltage, v cc -- v vmt -- vin svrr -- v cc -- 11 0 --100 --90 --80 --70 --60 --30 0 input voltage, vin -- dbv mute attenuation level, vmt -- dbv supply voltage, v cc -- v ripple rejection ratio, svrr -- db 10 100 100k input frequency, fin -- hz mute attenuation level, vmt -- dbv 41 8 supply voltage, v cc -- v channel separation, chsep -- db chsep -- fin input frequency, fin -- hz svrr -- fin chsep -- v cc chsep -- crf vmt -- fin channel separation, chsep - - db channel separation, chsep - - db mute attenuation level, vmt -- dbv ripple rejection ratio, svrr - - db vin = -10dbv frin = 100hz rg = 620 r l = 16 v cc = 12v f = 1khz v3 = 0.3v v cc = 12v vin = -15dbv rg = 620 sep = vin-vout vin = -15dbv fin = 1khz rg = 620 r l = 16 sep = vin-vout r l = 32 16 r l = 32 16 v cc = 12v vin = -15dbv fin = 1khz rg = 620 r l = 16 sep = vin-vout v cc = 12v vin = -10dbv r l = 16 v3 = 0.3v r l = 32 16 vin = -10dbv fin = 1khz rg = 620 v3 = 0.3v r l = 32 r l = 32 16 16 v cc = 12v vin = -10dbv rg = 620 r l = 16 din audio filter mode-a mode-b mode-a mode-b
LA4809M 50 60 70 80 90 100 10 2 3 5 7 100 2 3 5 7 2 3 5 7 1000 10000 0.1 3 257 3 257 1 3 257 3 257 1 10 0 4 21 8 0 capacitance, crf -- f ripple rejection ratio, svrr -- db 10 2 3 5 7 2 3 5 7 100 80 60 40 20 100 120 1000 10 2 3 5 7 100 2 3 5 7 2 3 5 7 1000 10000 0.1 10 capacitance, crf -- f on time -- ms p o max -- rrf 0 0.4 1 2 3 10 2 4 6 8 140 100 1000 resistance, rrf -- k maximum output power, p o max -- mw i cco p -- v cc v2 -- v3 2 3 7 4 5 6 21 supply voltage, v cc -- v quiescent current drain, i cco p -- ma pin 3 control voltage, v3 -- v pin 2 control voltage, v2 -- v 0.1 10 capacitance, crf -- f off time -- ms 0.1 10 capacitance, crf -- f rise time -- ms svrr -- crf supply voltage, v cc -- v standby current drain, i stby -- na i stby -- v cc rise time -- crf on time -- crf off time -- crf 3 8 v cc = 12v vrin = -10dbv fr = 100hz rg = 620 r l = 16 din audio filter v cc = 12v r l = 16 on time of amplifier v cc = 12v r l = 16 off time of amplifier v cc = 12v r l = 16 thd = 10% v3 = 2v no load no signal v3 = 0.3v no load no signal v cc = 12v v cc = 12v r l = 16w rise time ? vrf 0.7 rise time of rf voltage 23 1 7 52 37 5 23 1 7 52 37 5 3 25 7 46 14 1210 81 6 46 14 1210 81 1.5 1 0.5 2 2.5 6 mode-a mode-b mode-a mode-b mode-a mode-b mode-a mode-b mode-a mode-b mode-a mode-b no.a1569-12/15
LA4809M no.a1569-13/15 10 2 7 3 100 5 2 7 3 5 1000 0.1 2 3 5 7 1 --50 0 --25 50 75 25 100 70 5 --50 100 --50 100 ambient temperature, ta -- c maximum output power, p o -- 5 0 5 10 70 80 15 0 10 20 30 40 --50 100 ambient temperature, ta -- c chsep -- ta 60 2 3 4 100 80 90 90 --50 100 ambient temperature, ta -- c vmt -- ta i cco p -- ta --100 --95 --85 --90 --50 100 ambient temperature, ta -- c mute attenuation level, vmt -- dbv ambient temperature, ta -- c quiescent current drain, i cco p -- ma --50 100 ambient temperature, ta -- c output noise voltage, v no -- v --50 100 ambient temperature, ta -- c total harmonic distortion, thd -- % p o max -- ta ambient temperature, ta -- c svrr -- ta thd -- ta vg -- ta v no -- ta max - - mw v oltage gain, vg -- db channel separation, chsep - - db ripple rejection ratio, svrr - - db v cc = 12v r l = 16 f = 1khz thd = 10% v cc = 12v r l = 16 f = 1khz vin = -20dbv v cc = 12v vin = -10dbv frin = 100hz r l = 16 v cc = 5v vin = -15dbv f = 1khz r l = 16 v cc = 12v vin = -10dbv f = 1khz v3 = 0.3v r l = 16 v cc = 12v no load no signal mode-a v cc = 12v r l = 16 rg = 620 din audio filter v cc = 12v r l = 16w f = 1khz p o = 10mw --25 25 05 0 7 5 --25 25 05 0 7 5 --25 25 05 0 7 5 --25 25 05 0 7 5 --25 25 05 0 7 5 --25 25 05 0 7 5 --25 25 05 0 7 5 mode-b mode-a influence of output capacitors discounted cout = 100f
LA4809M no.a1569-14/15 0.1 1 2 3 5 7 10 2 3 5 7 2 3 5 7 100 1 1.2 1.4 1.6 1.8 2 --50 100 ambient temperature, ta -- c ? t ransient response characteristics (rising characteristics) standby current drain, i stby --50 100 ambient temperature, ta -- c pin 3 control voltage, v3cnt -- v i stby -- ta v3cnt -- ta v cc = 12v no load no signal --25 25 0 50 75 --25 25 05 0 7 5 - - na v cc = 16v 12v mode-a mode-b 50ms/div 50ms/div 50ms/div 50ms/div mode-a (with no signal) mode-a (with signal) mode-b (with no signal) mode-b (with signal) load end : 20mv/div output pin : 1v/div pin 3 : 5v/div load end : 20mv/div output pin : 1v/div pin 3 : 5v/div load end : 20mv/div output pin : 1v/div pin 3 : 5v/div load end : 20mv/div output pin : 1v/div pin 3 : 5v/div
LA4809M ? transient response characteristics (falling characteristics) 100ms/div 100ms/div 100ms/div 100ms/div mode-a (with no signal) mode-a (with signal) mode-b (with no signal) mode-b (with signal) load end : 20mv/div output pin : 1v/div pin 3 : 5v/div load end : 20mv/div output pin : 1v/div pin 3 : 5v/div load end : 20mv/div output pin : 1v/div pin 3 : 5v/div load end : 20mv/div output pin : 1v/div pin 3 : 5v/div sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. to change without notice. this catalog provides information as of october, 2009. specif ications and information herein are subject ps no.a1569-15/15

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