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| Datasheet File OCR Text: |
| geometry process details principal device types 2n7002 gross die per 5 inch wafer 33,500 process CP324 small signal mosfet transistor n- channel enhancement-mode transistor chip process epitaxial planar die size 21.65 x 21.65 mils die thickness 9.0 mils gate bonding pad area 5.5 x 5.5 mils source bonding pad area 5.9 x 13.8 mils top side metalization al - 30,000? back side metalization au - 12,000? backside drain www.centralsemi.com r3 (22-march 2010)
process CP324 typical electrical characteristics www.centralsemi.com r3 (22-march 2010) |
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