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vitesse semiconductor corporation page 1 3/29/00 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 vitesse semiconductor corporation datasheet v sc8074 10gb/s 16-bit demultiplexer for sts-192 and stm-64 applications g52280-0, rev. 4.0 features typical system block diagram general description the vsc8074 accepts a differential 10gb/s serial input data stream ( di ). using a 10ghz clock input ( clki ), the high-speed data stream is demultiplexed into 16 differential 622mb/s parallel outputs ( q0-q15 ). in addition to the data outputs, a differential 622mhz clock output ( clk16o ) is provided. the device oper- ates using a C5.2v power supply and is packaged in a thermally-enhanced, standard plastic package. functional block diagram ? performs 1:16 demux between 10gb/s high- speed signal and 16 622mb/s low-speed signals ? fully differential low-speed interface ? industry standard C5.2v power supply ? 50 w output drive capability ? internal input terminations ? industry-standard 80-pin pqfp package ? proven e/d mode gaas technology ? supports sts-192 sonet applications frame processor pu pd d0 - d15 q0 - q15 dout clk16i frame processor e/o o/e vsc8073 vsc8074 clki clk16o di clki clk16o 1:16 demultiplexer timing generator q0+ q0 q1+ q1 q15+ q15 clk16o+ clk16o di+ di clki clki/16 clki/2 q d
vitesse semiconductor corporation 10gb/s 16-bit demultiplexer for datasheet sts-192 and stm-64 applications vsc807 4 page 2 vitesse semiconductor corporation 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 3/29/00 g52280-0, rev. 4.0 functional description low-speed interface the deserialized data outputs ( q0-q15 ) and divided clock ( clk16o ) are ecl-compatible outputs and should be terminated with 50 w resistors to v tt . these low-speed interfaces are realized using ecl levels as defined in table 2. the recommended load configuration for the outputs is 50 w . the internal schematic for the low speed outputs is shown in figure 1. figure 1: low-speed ecl- output driverr high-speed interface serial data inputs ( di ) and bit rate clocks ( clki ) are internally terminated with 50 w resistors to v cc . the internal input receiver and termination schemes for the data and clock inputs are shown in figures 2 and 3, respectively. the high-speed differential data in ( di ) requirements appear in table 3. the high-speed clock input ( clki ) requirements appear in table 4. d d v cc qn q
vitesse semiconductor corporation page 3 3/29/00 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 vitesse semiconductor corporation datasheet v sc8074 10gb/s 16-bit demultiplexer for sts-192 and stm-64 applications g52280-0, rev. 4.0 figure 2: high-speed data input receiver figure 3: high-speed clock input receiver power supply the device is typically operated from a single C5.2v supply (v ee ). v cc is typically held at ground poten- tial. decoupling of the power supply is a critical element in maintaining proper operation of the part. it is rec- ommended that v cc be decoupled using a 0.1f and a 0.01f capacitor placed in parallel on each v cc pin as close to the package as possible. if room permits, a 0.001f capacitor should also be placed in parallel with the 0.1f and 0.01f capacitors previously mentioned. recommended capacitors are low-inductance, ceramic smt x7r devices. a 0603 package should be used for the 0.1f capacitor; the 0.01f and 0.001f capacitors can be either 0603 or 0403 packages. v ee 1ma 1ma v cc 50 w di+ di 50 w v ee v cc 50 w clki
vitesse semiconductor corporation 10gb/s 16-bit demultiplexer for datasheet sts-192 and stm-64 applications vsc807 4 page 4 vitesse semiconductor corporation 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 3/29/00 g52280-0, rev. 4.0 table 1: ac timing characteristics (over recommended operating conditions) figure 4: vsc8074 ac timing waveforms parameter description min typ max units conditions t clk16or , t clk16of clk16o rise and fall times 200 350 ps see figure 7, 20% to 80% t clki high-speed input clock period 100.46 ps t lclk low-speed clock period 1607 ps dc hsclk duty cycle of high-speed clock in 40 60 % dc lsclk duty cycle of low-speed clock in 40 60 % tdir, tdif serial data rise and fall times 30 35 ps see figure 7, 20% to 80% t qr, t qf parallel data out rise and fall times 300 ps see figure 7 t qs output data valid time before clk16o 300 ps see figure 4 t qh output data valid time after clk16o 300 ps see figure 4 t pm phase margin 150 180 degrees at (2 31 C 1) prbs. see figure 6. d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d12 d13 d14 d15 t qh t qs 16 bit times di clk16o q0 - q15
vitesse semiconductor corporation page 5 3/29/00 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 vitesse semiconductor corporation datasheet v sc8074 10gb/s 16-bit demultiplexer for sts-192 and stm-64 applications g52280-0, rev. 4.0 figure 5: input timing figure 6: data input sensitivity vs. phase margin figure 7: parametric measurement information t pm rising edge of clk can occur within this period rising edge is the active edge t clk (360 ) di clki 500mv amplitude phase v floor t opt t pm z 0 = 50 w signal pin output rise and fall times ecl output load serial output load parametric test load circuit z 0 = 50 w z 0 = 50 w 50 w v tt t f 80% 50% 20% t r v cc 50 w 50 w v cc
vitesse semiconductor corporation 10gb/s 16-bit demultiplexer for datasheet sts-192 and stm-64 applications vsc807 4 page 6 vitesse semiconductor corporation 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 3/29/00 g52280-0, rev. 4.0 dc characteristics (over recommended operating conditions) table 2: ecl inputs/outputs table 3: high-speed data inputs table 4: high-speed clock inputs table 5: power dissipation parameter description min typ max units conditions v oh output high voltage C1100 C700 mv measure into 50 w load. see figure 7. v ol output low voltage -2v C1620 mv 50 w to v tt load parameter description min typ max units conditions v floor differential data input 500 mv at t pm = t opt. see figure 6. 200 mv at minimum t pm . see figure 6. v in input voltage C1.8 C0.5 0.5 v r term termination resistor 40 50 60 w parameter description min typ max units conditions v in input swing, single-ended 500 mv peak-to-peak r indc dc value of clki C1.8 +1.8 v r term termination resistor 40 50 60 w parameter description min typ max units conditions i ee supply current 600 tbd ma outputs open p d power dissipation 3.5 w
vitesse semiconductor corporation page 7 3/29/00 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 vitesse semiconductor corporation datasheet v sc8074 10gb/s 16-bit demultiplexer for sts-192 and stm-64 applications g52280-0, rev. 4.0 absolute maximum ratings (1) ecl power supply voltage, ( v ee ) ............................................................................................... C7.0v to +0.7v dc input voltage (low-speed inputs, q0-q15).......................................................................... C 2.5v t o +0.5v input voltage, clki (2) ................................................................................................................... C2.8v to +2. 8v input voltage di .............................................................................................................. ............. C1.8v to +0.5v case temperature under bias .................................................................................................... ... C55 o to + 125 o c storage temperature............................................................................................................ ........ C65c to +150c recommended operating conditions power supply voltage ( v ee ) .................................................................................................................C5.2v 5% operating case temperature range ( t ) (3) ............................................................................................ 0 o to 85 o c notes: (1) caution: stresses listed under absolute maximum ratings may be applied to devices one at a time without causing permanent damage. functionality at or exceeding the values listed is not implied. exposure to these values for extended periods may affect device reliability. (2) static voltage on clki must be within C1.8v to +1.8v. (3) lower limit is ambient temperature and upper limit is case temperature.
vitesse semiconductor corporation 10gb/s 16-bit demultiplexer for datasheet sts-192 and stm-64 applications vsc807 4 page 8 vitesse semiconductor corporation 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 3/29/00 g52280-0, rev. 4.0 package pin descriptions figure 8: pin diagram 79 77 75 73 71 69 67 65 63 61 1 3 5 7 9 11 13 15 17 19 v ee clk16o+ clk16o v cc q0 q0+ v ee q1 q1+ q2 q2+ v cc q3 q3+ v ee q4 q4+ q5 q5+ v ee v ee nc v cc v ee v cc q15+ q15 v cc q14+ q14 v ee q13+ q13 v cc q12+ q12 v ee nc v cc nc v ee q11+ q11 v cc q10+ q10 v ee q9+ q9 v cc q8+ q8 v ee q7+ q7 v cc q6+ q6 v ee v cc 21 23 25 27 29 31 33 35 37 39 nc nc nc nc v cc v ee v cc clki v cc v cc v cc din din+ v cc nc v ee v cc nc nc nc 59 57 55 53 51 49 47 45 43 41 top view
vitesse semiconductor corporation page 9 3/29/00 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 vitesse semiconductor corporation datasheet v sc8074 10gb/s 16-bit demultiplexer for sts-192 and stm-64 applications g52280-0, rev. 4.0 table 6: pin identification pin i/o pin description 68, 69 di inputhigh-speed differential: serial data input stream. these inputs are internally terminated. 73 clki inputhigh speed clock: bit rate clock input. this clock is terminated with 50 w resistors to v cc , and is ac-coupled. 6, 7, 9, 10, 12, 13, 15, 16, 22, 23, 25, 26, 28, 29, 31, 32, 34, 35, 37, 38, 42-45, 47, 48, 50-53, 55, 56 q0-q15 outputecl differential: deserialized parallel data outputs. these outputs are updated at 1/16 of the bit rate. 58, 59 clk16o outputecl differential: bit rate clock divided by 16. 3, 5, 8, 14, 19, 24, 30, 36, 40, 49, 57, 64, 67, 70-72, 74, 76 v cc ground 1, 4, 11, 17, 21, 27, 33, 39, 41, 46, 54, 60, 65, 75 v ee power supply: C5.2 nominal. 2, 18, 20, 61-63, 66, 77-80 nc do not connect, leave open. table 7: pin descriptions pin number pin name i/o level description 1v ee i C5.2v nom power supply at C5.2v nominal 2 nc na na do not connect, leave open. 3v cc i gnd ground 4v ee i C5.2v nom power supply at C5.2v nominal 5v cc i gnd ground 6 q15+ o ecl low-speed differential parallel data 7 q15C o ecl low-speed differential parallel data 8v cc i gnd ground 9 q14+ o ecl low-speed differential parallel data 10 q14C o ecl low-speed differential parallel data 11 v ee i C5.2v nom power supply at C5.2v nominal 12 q13+ o ecl low-speed differential parallel data 13 q13C o ecl low-speed differential parallel data 14 v cc i gnd ground 15 q12+ o ecl low-speed differential parallel data 16 q12C o ecl low-speed differential parallel data 17 v ee i C5.2v nom power supply at C5.2v nominal
vitesse semiconductor corporation 10gb/s 16-bit demultiplexer for datasheet sts-192 and stm-64 applications vsc807 4 page 10 vitesse semiconductor corporation 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 3/29/00 g52280-0, rev. 4.0 18 nc na na do not connect, leave open. 19 v cc i gnd ground 20 nc na na do not connect, leave open. 21 v ee i C5.2v nom power supply at C5.2v nominal 22 q11+ o ecl low-speed differential parallel data 23 q11C o ecl low-speed differential parallel data 24 v cc i gnd ground 25 q10+ o ecl low-speed differential parallel data 26 q10C o ecl low-speed differential parallel data 27 v ee i C5.2v nom power supply at C5.2v nominal 28 q9+ o ecl low-speed differential parallel data 29 q9C o ecl low-speed differential parallel data 30 v cc i gnd ground 31 q8+ o ecl low-speed differential parallel data 32 q8C o ecl low-speed differential parallel data 33 v ee i C5.2v nom power supply at C5.2v nominal 34 q7+ o ecl low-speed differential parallel data 35 q7C o ecl low-speed differential parallel data 36 v cc i gnd ground 37 q6+ o ecl low-speed differential parallel data 38 q6C o ecl low-speed differential parallel data 39 v ee i C5.2v nom power supply at C5.2v nominal 40 v cc i gnd ground 41 v ee i C5.2v nom power supply at C5.2v nominal 42 q5+ o ecl low-speed differential parallel data 43 q5C o ecl low-speed differential parallel data 44 q4+ o ecl low-speed differential parallel data 45 q4C o ecl low-speed differential parallel data 46 v ee i C5.2v nom power supply at C5.2v nominal 47 q3+ o ecl low-speed differential parallel data 48 q3C o ecl low-speed differential parallel data 49 v cc i gnd ground 50 q2+ o ecl low-speed differential parallel data 51 q2+ o ecl low-speed differential parallel data 52 q1+ o ecl low-speed differential parallel data 53 q1C o ecl low-speed differential parallel data table 7: pin descriptions pin number pin name i/o level description
vitesse semiconductor corporation page 11 3/29/00 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 vitesse semiconductor corporation datasheet v sc8074 10gb/s 16-bit demultiplexer for sts-192 and stm-64 applications g52280-0, rev. 4.0 54 v ee i C5.2v nom power supply at C5.2v nominal 55 q0+ o ecl low-speed differential parallel data 56 q0C o ecl low-speed differential parallel data 57 v cc i gnd ground 58 clk16oC o ecl low-speed differential parallel data 59 clk16o+ o ecl low-speed differential parallel data 60 v ee i C5.2v nom power supply at C5.2v nominal 61 nc na na do not connect, leave open. 62 nc na na do not connect, leave open. 63 nc na na do not connect, leave open. 64 v cc i gnd ground 65 v ee i C5.2v nom power supply at C5.2v nominal 66 nc na na do not connect, leave open. 67 v cc i gnd ground 68 di+ i hs high-speed differential clock input 69 diC i hs high-speed differential clock input 70 v cc i gnd ground 71 v cc i gnd ground 72 v cc i gnd ground 73 clki i hs high-speed single-ended clock input 74 v cc i gnd ground 75 v ee i C5.2v nom power supply at C5.2v nominal 76 v cc i gnd ground 77 nc na na do not connect, leave open. 78 nc na na do not connect, leave open. 79 nc na na do not connect, leave open. 80 nc na na do not connect, leave open. table 7: pin descriptions pin number pin name i/o level description
vitesse semiconductor corporation 10gb/s 16-bit demultiplexer for datasheet sts-192 and stm-64 applications vsc807 4 page 12 vitesse semiconductor corporation 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 3/29/00 g52280-0, rev. 4.0 package information 80 f g h i 61 21 1 20 60 41 40 0.30 rad. typ 0.20 rad. typ 0.25 0.17 max 0? e 8? standoff 0.25 max k 10? typ exposed heatsink 6.85 0.50 dia heatsink intrusion 0.0127 max 10? typ notes: drawing not scale. all units in mm unless otherwise noted. d a 0.102 max lea d coplanarity e j a 80-pin pqfp package drawing
vitesse semiconductor corporation page 13 3/29/00 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 vitesse semiconductor corporation datasheet v sc8074 10gb/s 16-bit demultiplexer for sts-192 and stm-64 applications g52280-0, rev. 4.0 package thermal conditions this package has been enhanced with a copper heat slug to provide a low thermal resistance path from the die to the exposed surface of the heat spreader. refer to table 8 for thermal resistance. table 8: thermal resistance thermal resistance with airflow table 9 shows the thermal resistance with airflow. this thermal resistance value reflects all the thermal paths including through the leads in an environment where the leads are exposed. the temperature difference between the ambient airflow temperature and the case temperature should be the worst-case power of the device multiplied by the thermal resistance. table 9: thermal resistance with airflow maximum ambient temperature without heatsink the worst-case ambient temperature without the use of a heatsink is given by: t a(max) = t c(max) C p (max) q ca where, q ca = theta case-to-ambient at appropriate airflow t a (max) = ambient air temperature t c(max) = case temperature (85c) p (max) = power (4.0w) symbol description c/w q jc thermal resistance from junction-to-case. 2.2 q ca thermal resistance from case-to-ambient with no airflow, including conduction through the leads. 25.8 q ja thermal resistance from junction-to-ambient 28 airflow (lfpm) q ca ( o c/w ) 100 24 200 21 400 19 600 17
vitesse semiconductor corporation 10gb/s 16-bit demultiplexer for datasheet sts-192 and stm-64 applications vsc807 4 page 14 vitesse semiconductor corporation 741 calle plano, camarillo, ca 93012 ? 805/388-3700 ? fax: 805/987-5896 3/29/00 g52280-0, rev. 4.0 ordering information the order number for this product is formed by a combination of the device number, and package type. notice vitesse semiconductor corporation reserves the right to make changes in its products specifications or other information at any time without prior notice. therefore the reader is cautioned to confirm that this datasheet is current prior to placing orders. the company assumes no responsibility for any circuitry described other than circuitry entirely embodied in a vitesse product. warning vitesse semiconductor corporations product are not intended for use in life support appliances, devices or systems. vsc80xx xx device type vsc8074: 1:16 demux package rb 80-pin pqfp

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