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  linear integrated system s ? 4042 clipper court ? fremont, ca 94538 ? tel: 510 490-9160 ? fax: 510 353-0261 features high switching speed t on = 2.0ns low on resistance r ds(on) = 5 ? low gate node capacitance c = 25pf low gate leakage capacitance i g(on) = 0.05a absolute maximum ratings 1 @ 25 c (unless otherwise stated) maximum temperatures storage temperature -55 to +150 c operating junction temperature -55 to +125 c maximum power dissipation continuous power dissipation 2 p d = 300mw maximum currents pulsed drain current 3 i ds = 1a continuous drain current 2 i ds = 200ma maximum voltages v dso drain to source +25v sst823 +22.5v sst823 +15v v sb source to body sst824 +25v v sdo source to drain sst824 +20v v gb gate to body +30v sst823 +22.5v v gs gate to source 22.5v v db drain to body sst824 +30v v gd gate to drain 22.5v electrical characteristics @ 25 c (unless otherwise stated) symbol characteristic min typ max units conditions breakdown voltage 25 i d = 10a, v gs = v bs = 0 bv ds drain to source 15 v i d = 100na, v gs = v bs = -5v breakdown voltage sst823 15 bv sd source to drain sst824 20 v i s = 100na, v gd = v bd = -5v breakdown voltage sst823 22.5 bv db drain to body sst824 25 v i d = 100na, v gb = 0, source open breakdown voltage sst823 22.5 bv sb source to body sst824 25 v i s = 100na, v gb = 0, drain open v gs(off) cutoff voltage gate to source 0.1 2 v v ds = v gs , v sb = 0v, i d = 10a 7.5 v gs = 5.0v, i d = 50ma, v sb = 0 r ds(on) on resistance drain to source 4 5.0 ? v gs = 10v, i d = 500ma, v sb = 0 g fs forward transconductance 4 100 120 mmho v ds = 15v, i d = 200ma i d(off) leakage current drain node 100 na v gs = v bs = -5v, v ds = 15v i s(off) leakage current source node 100 na v gd = v bd = -5v, v ds = 15v i g(off) leakage current gate node (off) 100 na v gb = 0v, v gs = v gd = -22.5v i g(on) leakage current gate node (on) 10 a v gb = 30v, v gs = v gd = 22.5v sst823 sst824 high speed n-channel lateral dmos switch zener protected linear integrated system s 1. body 2. source 3. drain 4. gate
linear integrated system s ? 4042 clipper court ? fremont, ca 94538 ? tel: 510 490-9160 ? fax: 510 353-0261 notes 1. absolute maximum ratings are limiting values above which serviceability may be impaired. 2. for sot143 package only. 3. pulsed @ 80 s, 1% duty cycle. 4. see test conditions in electr ical characteristics section. 5. see switching characteristic s and test circuit for detail. information furnished by linear integrated systems is believed to be accurate and reliable. ho wever, no responsibility is assu med for its use; nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication o r otherwise under any patent or patent rights of linear integrated systems. electrical characteristics cont. symbol characteristic min typ max units conditions c (gs+gd+gb) capacitance gate node 25 30 pf c (gd+db) capacitance drain node 13 15 pf c (gs+sb) capacitance source node 35 40 pf c dg capacitance reverse transfer 3 5 pf v ds = 10v, v gs = v bs = -15v, f = 1mhz t on turn on time 5 2.0 3.0 ns v dd = 10v, v g(on) = 10v, t off turn off time 5 3.0 4.0 ns r l = 133 ? , r g = 51 ? switching characteristics t d(on) t r t off v gg v dd r l typ typ typ 5v 100 ? <1ns 1ns 3ns 10v 200 ? <1ns 1ns 3ns 5v 20v 300 ? <1ns 1ns 3ns 5v 67 ? <1ns 1ns 3ns 10v 133 ? <1ns 1ns 3ns 10v 20v 270 ? <1ns 1ns 3ns input pulse td, tr < 1ns pulse width = 10ns rep rate = 1mhz sampling scope t r < 360 ps r in = 1m ? c in = 2.0pf 51 ? r l 510 ? v in v out to scope v gg v dd to scope test circuit t d(on) 90% 50% 10% 90% 50% 10% t r t off 0v 0 v + v dd v gg v in v out switching waveforms sst823 sst211 1 k ? r b * 1 k ? -15v -15v 15v analog output 7.5v analog input 7.5v 15v v c r b * optional current limiting resistor v c 0 5v driver switch driver / switch application package option to-72 pin layout


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