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81004tn (ot) no. 7665-1/27 overview the LC75827E and lc75827w are 1/3, 1/4 duty general- purpose lcd drivers that can be used for frequency display in electronic tuners under the control of a microcontroller. in addition to being able to directly drive up to 200 lcd segments, the LC75827E and lc75827w can also control up to 12 general-purpose output ports. the LC75827E/w uses separate power supplies for the lcd driver block and the logic block. this allows the lcd driver block supply voltage to be set to any level in the 2.7 to 6.0 v range independently of the logic block supply voltage. features ? either 1/3 or 1/4 duty can be selected with the serial control data. ? either 1/2 or 1/3 bias can be selected with the serial control data. ? up to 153 segments can be driven in 1/3 duty drive and up to 200 segments can be driven in 1/4 duty drive. ? serial data input supports ccb* format communication with the system controller. ? serial data control of the power-saving mode based backup function and all the segments forced off function ? serial data control of switching between the segment output port and general-purpose output port functions ? the frame frequency of the common and segment output waveforms can be controlled with the serial control data. ? either rc oscillation or external clock mode can be selected with the serial control data. ? high generality, since display data is displayed directly without decoder intervention. ? independent v lcd for the lcd driver block (v lcd can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage.) ? the inh pin can force the display to the off state. ? ccb is a trademark of sanyo electric co., ltd. ? ccb is sanyos original bus format and all the bus addresses are controlled by sanyo. cmos lsi ordering number : enn7665 1/3, 1/4 duty general-purpose lcd driver LC75827E, 75827w sanyo electric co.,ltd. semiconductor company tokyo office tokyo bldg., 1-10, 1 chome, ueno, taito-ku, tokyo, 110-8534 japan any and all sanyo products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircrafts control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo representative nearest you before using any sanyo products described or contained herein in such applications. sanyo assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo products described or contained herein.
no. 7665- 2 /27 LC75827E, 75827w 14.0 17.2 14.0 17.2 0.15 0.35 0.8 (2.7) 3.0max 0.1 0.8 (1.0) 1 16 17 32 33 48 49 64 sanyo: qip64e (14 14) [LC75827E] 10.0 10.0 12.0 12.0 0.15 0.5 (1.5) 0.1 1.7max 0.18 (0.5) (1.25) 1 16 17 32 33 48 49 64 sanyo: sqfp64 (10 10) [lc75827w] p ac ka g e dimensions unit: mm 3159a-qip64e unit: mm 3190a-sqfp64 specifications absolute maximum ratings at ta = 25 c, v ss = 0 v parameter symbol conditions ratings unit maximum supply voltage v dd max v dd C0.3 to +7.0 v v lcd max v lcd C0.3 to +7.0 v in 1 ce, cl, di, inh C0.3 to +7.0 input voltage v in 2 osc C0.3 to v dd + 0.3 v v in 3 v lcd 1, v lcd 2 C0.3 to v lcd + 0.3 output voltage v out 1 osc C0.3 to v dd + 0.3 v v out 2 s1 to s51, com1 to com4, p1 to p12 C0.3 to v lcd + 0.3 i out 1 s1 to s51 300 a output current i out 2 com1 to com4 3 ma i out 3 p1 to p12 5 allowable power dissipation pd max ta = 85 c 200 mw operating temperature topr C40 to +85 c storage temperature tstg C55 to +125 c
no. 7665- 3 /27 LC75827E, 75827w pin assignment s51/co m4 s46 s47 s31 s30 s29 s28 s27 s49 s50 com3 com2 com1 v dd v lcd v lcd 1 v lcd 2 v ss osc inh ce cl di s26 s25 s24 s23 s22 s21 s20 s19 s18 s17 s44 s45 s42 s43 s38 s39 s36 s37 s40 s41 s34 s35 s15 s16 s33 s13 s14 p11/s11 p12/s12 p8/s8 p9/s9 p10/s10 p6/s6 p7/s7 p4/s4 p5/s5 p1/s1 p2/s2 p3/s3 s32 s48 lc758 2 7 e (qip64e) lc75827w (sqfp64) 33 48 32 49 17 64 16 1 top view parameter symbol conditions ratings unit min typ max supply voltage v dd v dd 2.7 6.0 v v lcd v lcd 2.7 6.0 input voltage v lcd 1 v lcd 1 2/3 v lcd v lcd v v lcd 2 v lcd 2 1/3 v lcd v lcd input high level voltage v ih 1 ce, cl, di, inh 0.8 v dd 6.0 v v ih 2 osc: external clock mode 0.7 v dd v dd input low level voltage v il 1 ce, cl, di, inh 0 0.2 v dd v v il 2 osc: external clock mode 0 0.3 v dd recommended external r osc osc: rc oscillation mode 39 k resistance recommended external c osc osc: rc oscillation mode 1000 pf capacitance guaranteed oscillation range f osc osc: rc oscillation mode 19 38 76 khz external clock frequency f ck osc: external clock mode figure 4 19 38 76 khz external clock duty d ck osc: external clock mode figure 4 30 50 70 % data setup time t ds cl, di: figure 2, 3 160 ns data hold time t dh cl, di: figure 2, 3 160 ns ce wait time t cp ce, cl: figure 2, 3 160 ns ce setup time t cs ce, cl: figure 2, 3 160 ns ce hold time t ch ce, cl: figure 2, 3 160 ns high level clock pulse width t ?h cl: figure 2, 3 160 ns low level clock pulse width t ?l cl: figure 2, 3 160 ns rise time t r ce, cl, di: figure 2, 3 160 ns fall time t f ce, cl, di: figure 2, 3 160 ns inh switching time t c inh, ce: figure 5, 6 10 s allowable operating ranges at ta = C40 to +85 c, v ss = 0 v
electrical characteristics for the allowable operating ranges note: * 1 excluding the bias voltage generation divider resistors built in the v lcd 1 and v lcd 2. (see figure 1.) no. 7665- 4 /27 LC75827E, 75827w parameter symbol conditions ratings unit min typ max hysteresis v h ce, cl, di, inh 0.1 v dd v input high level current i ih 1 ce, cl, di, inh: v i = 6.0 v 5.0 a i ih 2 osc: v i = v dd , external clock mode 5.0 input low level current i il 1 ce, cl, di, inh: v i = 0 v C5.0 a i il 2 osc: v i = 0 v, external clock mode C5.0 v oh 1 s1 to s51: i o = C20 a v lcd C 0.9 output high level voltage v oh 2 com1 to com4: i o = C100 a v lcd C 0.9 v v oh 3 p1 to p12: i o = C1 ma v lcd C 0.9 v ol 1 s1 to s51: i o = 20 a 0.9 output low level voltage v ol 2 com1 to com4: i o = 100 a 0.9 v v ol 3 p1 to p12: i o = 1 ma 0.9 v mid 1 com1 to com4: 1/2 bias, i o = 100 a 1/2 v lcd C 0.9 1/2 v lcd + 0.9 v mid 2 s1 to s51: 1/3 bias, i o = 20 a 2/3 v lcd C 0.9 2/3 v lcd + 0.9 output middle level voltage * 1 v mid 3 s1 to s51: 1/3 bias, i o = 20 a 1/3 v lcd C 0.9 1/3 v lcd + 0.9 v v mid 4 com1 to com4: 1/3 bias, i o = 100 a 2/3 v lcd C 0.9 2/3 v lcd + 0.9 v mid 5 com1 to com4: 1/3 bias, i o = 100 a 1/3 v lcd C 0.9 1/3 v lcd + 0.9 oscillator frequency f osc osc: r osc = 39 k , c osc = 1000 pf 30.4 38 45.6 khz i dd 1 v dd : power-saving mode 5 i dd 2 v dd : v dd = 6.0 v, outputs open, f osc = 38 khz 250 500 i lcd 1 v lcd : power-saving mode 5 a current drain i lcd 2 v lcd : v lcd = 6.0 v, outputs open, 1/2 bias, 100 200 f osc = 38 khz i lcd 3 v lcd : v lcd = 6.0 v, outputs open, 1/3 bias, 60 120 f osc = 38 khz v ss to the common segment drivers v lcd 2 v lcd 1 except these resistors v lcd figure 1
no. 7665- 5 /27 LC75827E, 75827w tds v il 1 v il 1 v il 1 v ih 1 50% v ih 1 v ih 1 tch tcs tcp tdh tr t f t l t h ce cl di tds v il 1 v il 1 v il 1 v ih 1 v ih 1 50% v ih 1 tch tcs tcp tdh tr tf t h t l ce cl di 1. when cl is stopped at the low level 2. when cl is stopped at the high level figure 2 figure 3 v ih 2 v il 2 osc t ck l t ck h f ck = 1 t ck h + t ck l [hz] d ck = t ck h t ck h + t ck l 100[%] 50% 3. osc pin clock timing in external clock mode figure 4
no. 7665- 6 /27 LC75827E, 75827w block diagram s1/p1 s2/p2 s12/p12 s13 s49 ce cl di s50 com4/s51 com3 com2 com1 v ss v lcd 2 v lcd 1 v lcd v dd inh osc shift register segment driver & latch address detector clock generator common driver
no. 7665- 7 /27 LC75827E, 75827w pin pin no. function active i/o handling when unused s1/p1 to s12/p12 s13 to s50 com1 to com3 com4/s51 osc ce cl di inh v lcd 1 v lcd 2 v dd v lcd 1 to 12 13 to 50 54 to 52 51 60 62 63 64 61 57 58 55 56 segment outputs for displaying the display data transferred by serial data input. the pins s1/p1 to s12/p12 can be used as general-purpose output ports when so set up by the control data. common driver outputs. the frame frequency is f o hz. the com4/s51 can be used for segment output in 1/3 duty. oscillator connection. an oscillator circuit is formed by connecting an external resistor and capacitor to this pin. this pin can be used as the external clock input pin if external clock mode is selected with the control data. serial data transfer inputs. these pins are connected to the control microprocessor. ce: chip enable cl: synchronization clock di: transfer data display off control input ? inh = low (v ss ) ........ off s1/p1 to s12/p12 = low (v ss ) (these pins are forcibly set to the segment output port function and fixed at the v ss level.) s13 to s50 = low (v ss ) com1 to com3 = low (v ss ) com4/s51 = low (v ss ) osc = z (high impedance) ? inh = high (v dd ) ...... on note that serial data transfers can be performed when the display is forced off by this pin. used to apply the lcd drive 2/3 bias voltage externally. this pin must be connected to v lcd 2 when 1/2 bias drive is used. used to apply the lcd drive 1/3 bias voltage externally. this pin must be connected to v lcd 1 when 1/2 bias drive is used. logic block power supply. provide a voltage in the range 2.7 to 6.0 v. lcd driver block power supply. provide a voltage in the range 2.7 to 6.0 v. h l o o i/o i i i i i i open open v dd gnd gnd open open v ss 59 ground pin. connect to ground. pin functions
no. 7665- 8 /27 LC75827E, 75827w b1 b0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 p0 p1 p2 p3 dr dt fc1 fc0 fc2 oc sc bu 0 0 d1 d2 d50 ccb address 8 bits display data 51 bits control data 19 bits dd 2 bits di cl ce b3 b2 a1 a0 a3 a2 d51 b1 b0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 d52 d53 d101 ccb address 8 bits display data 51 bits fixed data 19 bits dd 2 bits b3 b2 a1 a0 a3 a2 d102 b1 b0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 d103 d104 d152 ccb address 8 bits display data 51 bits fixed data 19 bits dd 2 bits b3 b2 a1 a0 a3 a2 d153 note: dd direction data. serial data transfer format 1. 1/3 duty ? when cl is stopped at the low level
- when cl is stopped at the high level ? ccb address ............... 41h ? d1 to d153 ................. display data ? p0 to p3 ...................... segment output port/general-purpose output port switching control data ? dr .............................. 1/2 bias drive or 1/3 bias drive switching control data ? dt .............................. 1/3 duty drive or 1/4 duty drive switching control data ? fc0 to fc2 ................. common and segment output waveforms frame frequency setting control data ? oc .............................. switches between rc oscillation mode and external clock mode ? sc ............................... segments on/off control data ? bu .............................. normal mode/power-saving mode control data no. 7665- 9 /27 LC75827E, 75827w di cl ce note: dd direction data. b1 b0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 p0 p1 p2 p3 dr dt fc1 fc0 fc2 oc sc bu 0 0 d1 d2 d50 ccb address 8 bits display data 51 bits control data 19 bits dd 2 bits b3 b2 a1 a0 a3 a2 d51 b1 b0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 d52 d53 d101 ccb address 8 bits display data 51 bits fixed data 19 bits dd 2 bits b3 b2 a1 a0 a3 a2 d102 b1 b0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 d103 d104 d152 ccb address 8 bits display data 51 bits fixed data 19 bits dd 2 bits b3 b2 a1 a0 a3 a2 d153
no. 7665- 10 /27 LC75827E, 75827w note: dd direction data. b1 b0 b3 b2 a1 a0 a3 a2 ccb address 8 bits di cl ce b1 b0 d2 d1 0 1 d50 p2 p1 0 0 0 1 0 0 b3 b2 a1 a0 a3 a2 d51 0 0 0 0 0 0 p0 sc oc dt dr 0 0 bu p3 fc2 fc0 fc1 d52 d47 d48 d49 d54 d53 0 1 d102 0 0 0 0 0 1 0 0 d103 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 d104 d99 d100 d101 d106 d105 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 d151 d152 0 d154 d153 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 d199 d200 0 b1 b0 b3 b2 a1 a0 a3 a2 b1 b0 b3 b2 a1 a0 a3 a2 display data 52 bits control data 18 bits dd 2 bits ccb address 8 bits display data 52 bits fixed data 18 bits dd 2 bits ccb address 8 bits display data 48 bits fixed data 22 bits dd 2 bits ccb address 8 bits display data 48 bits fixed data 22 bits dd 2 bits 2. 1/4 duty ? when cl is stopped at the low level
no. 7665- 11 /27 LC75827E, 75827w - when cl is stopped at the high level ? ccb address ............... 41h ? d1 to d200 ................. display data ? p0 to p3 ...................... segment output port/general-purpose output port switching control data ? dr .............................. 1/2 bias drive or 1/3 bias drive switching control data ? dt .............................. 1/3 duty drive or 1/4 duty drive switching control data ? fc0 to fc2 ................. common and segment output waveforms frame frequency setting control data ? oc .............................. switches between rc oscillation mode and external clock mode ? sc ............................... segments on/off control data ? bu .............................. normal mode/power-saving mode control data note: dd direction data. di cl ce ccb address 8 bits b1 b0 d2 d1 0 1 d50 p2 p1 0 0 0 1 0 0 b3 b2 a1 a0 a3 a2 d51 0 0 0 0 0 0 p0 sc oc dt dr 0 0 bu p3 fc2 fc0 fc1 d52 d47 d48 d49 display data 52 bits control data 18 bits dd 2 bits d54 d53 0 1 d102 0 0 0 0 0 1 0 0 d103 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 d104 d99 d100 d101 b1 b0 b3 b2 a1 a0 a3 a2 ccb address 8 bits display data 52 bits fixed data 18 bits b1 b0 b3 b2 a1 a0 a3 a2 d106 d105 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 d151 d152 0 ccb address 8 bits display data 48 bits fixed data 22 bits d154 d153 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 d199 d200 0 b1 b0 b3 b2 a1 a0 a3 a2 ccb address 8 bits display data 48 bits fixed data 22 bits dd 2 bits dd 2 bits dd 2 bits
serial data transfer example 1. 1/3 duty ? when 103 or more segments are used all 216 bits of serial data must be sent. - when fewer than 103 segments are used either 72 or 144 bits of serial data may be sent, depending on the number of segments used. however, the serial data shown below (the d1 to d51 display data and the control data) must be sent. no. 7665- 12 /27 LC75827E, 75827w 72 bits 8 bits d2 d47 d1 1 0 0 0 0 0 1 0 b0 b1 b2 b3 a0 b0 b1 b2 b3 a0 b0 b1 b2 b3 a0 d48 d49 d50 d51 0 0 0 0 0 0 0 p0 p1 p2 p3 dr dt fc0 fc1 fc2 oc sc bu 0 0 d53 d98 d52 1 0 0 0 0 0 1 0 d99 d100 d101 d102 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 d104 d149 d103 1 0 0 0 0 0 1 0 d150 d151 d152 d153 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 a1 a2 a3 a1 a2 a3 a1 a2 a3 72 bits 8 bits d2 d47 d1 1 0 0 0 0 0 1 0 b0 b1 b2 b3 a0 d48 d49 d50 d51 0 0 0 0 0 0 0 p0 p1 p2 p3 dr dt fc0 fc1 fc2 oc sc bu 0 0 a1 a2 a3 2. 1/4 duty ? when 153 or more segments are used all 288 bits of serial data must be sent. 72 bits 8 bits d2 d47 d1 1 0 0 0 0 0 1 0 b0 b1 b2 b3 a0 b0 b1 b2 b3 a0 b0 b1 b2 b3 a0 d48 d49 d50 d51 d52 0 0 0 0 0 0 p0 p1 p2 p3 dr dt fc0 fc1 fc2 oc sc bu 0 0 d54 d99 d53 1 0 0 0 0 0 1 0 d100 d101 d102 d103 d104 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 d106 d151 d105 1 0 0 0 0 0 1 0 d152 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 d154 d199 d153 1 0 0 0 0 0 1 0 d200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 b0 b1 b2 b3 a0 a1 a2 a3 a1 a2 a3 a1 a2 a3 a1 a2 a3 - when fewer than 153 segments are used either 72, 144, or 216 bits of serial data may be sent, depending on the number of segments used. however, the serial data shown below (the d1 to d52 display data and the control data) must be sent. 72 bits 8 bits d2 d47 d1 1 0 0 0 0 0 1 0 b0 b1 b2 b3 a0 d48 d49 d50 d51 d52 0 0 0 0 0 0 p0 p1 p2 p3 dr dt fc0 fc1 fc2 oc sc bu 0 0 a1 a2 a3
control data functions 1. p0 to p3: segment output port/general-purpose output port switching control data these control data bits switch the s1/p1 to s12/p12 output pins between their segment output port and general- purpose output port functions. note: sn (n = 1 to 12): segment output ports pn (n = 1 to 12): general-purpose output ports also note that when the general-purpose output port function is selected, the output pins and the display data will have the correspondences listed in the tables below. for example, when 1/4 duty drive scheme is used, if the general-purpose output port function is selected for the s4/p4 output pin, that output pin will output a high level (v lcd ) when the display data d13 is 1, and a low level (v ss ) when d13 is 0. no. 7665- 13 /27 LC75827E, 75827w output pin corresponding display data 1/3 duty 1/4 duty s1/p1 d1 d1 s2/p2 d4 d5 s3/p3 d7 d9 s4/p4 d10 d13 s5/p5 d13 d17 s6/p6 d16 d21 s7/p7 d19 d25 s8/p8 d22 d29 s9/p9 d25 d33 s10/p10 d28 d37 s11/p11 d31 d41 s12/p12 d34 d45 control data output pin state p0 p1 p2 p3 s1/p1 s2/p2 s3/p3 s4/p4 s5/p5 s6/p6 s7/p7 s8/p8 s9/p9 s10/p10 s11/p11 s12/p12 0 0 0 0 s1 s2 s3 s4 s5 s6 s7 s8 s9 s10 s11 s12 0 0 0 1 p1 s2 s3 s4 s5 s6 s7 s8 s9 s10 s11 s12 0 0 1 0 p1 p2 s3 s4 s5 s6 s7 s8 s9 s10 s11 s12 0 0 1 1 p1 p2 p3 s4 s5 s6 s7 s8 s9 s10 s11 s12 0 1 0 0 p1 p2 p3 p4 s5 s6 s7 s8 s9 s10 s11 s12 0 1 0 1 p1 p2 p3 p4 p5 s6 s7 s8 s9 s10 s11 s12 0 1 1 0 p1 p2 p3 p4 p5 p6 s7 s8 s9 s10 s11 s12 0 1 1 1 p1 p2 p3 p4 p5 p6 p7 s8 s9 s10 s11 s12 1 0 0 0 p1 p2 p3 p4 p5 p6 p7 p8 s9 s10 s11 s12 1 0 0 1 p1 p2 p3 p4 p5 p6 p7 p8 p9 s10 s11 s12 1 0 1 0 p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 s11 s12 1 0 1 1 p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 s12 1 1 0 0 p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
2. dr: 1/2 bias drive or 1/3 bias drive switching control data this control data bit selects either 1/2 bias drive or 1/3 bias drive. 6. sc: segments on/off control data this control data bit controls the on/off state of the segments. however, note that when the segments are turned off by setting sc to 1, the segments are turned off by outputting segment off waveforms from the segment output pins. 7. bu: normal mode/power-saving mode control data this control data bit selects either normal mode or power-saving mode. no. 7665- 14 /27 LC75827E, 75827w dr bias drive scheme 0 1/3 bias drive 1 1/2 bias drive 3. dt: 1/3 duty drive or 1/4 duty drive switching control data this control data bit selects either 1/3 duty drive or 1/4 duty drive. note: com4: common output s51: segment output note: an external resistor, rosc, and an external capacitor, cosc, must be connected to the osc pin if rc oscillation mode is s elected. dt duty drive scheme output pin (com4/s51) state 0 1/4 duty drive com4 1 1/3 duty drive s51 4. fc0 to fc2: common and segment output waveforms frame frequency setting control data these control data bits set the frame frequency for common and segment output waveforms. control data frame frequency fo [hz] fc0 fc1 fc2 0 0 0 fosc/768, f ck /768 0 0 1 fosc/576, f ck /576 0 1 0 fosc/384, f ck /384 0 1 1 fosc/288, f ck /288 1 0 0 fosc/192, f ck /192 sc display state 0 on 1 off 5. oc: switches between rc oscillation mode and external clock mode. this control data bit selects the osc pin function (rc oscillation mode or external clock mode). oc osc pin function 0 rc oscillation mode 1 external clock mode bu mode 0 normal mode power-saving mode [in rc oscillation mode (oc = 0), the osc pin oscillator is stopped, and in external clock mode (oc = 1), acceptance of the ext ernal 1 clock signal is stopped. in this mode the common and segment output pins go to the v ss levels. however, the s1/p1 to s12/p12 output pins that are set to be general-purpose output ports by the control data p0 to p3 can be used as general-purpose output ports.]
display data to segment output pin correspondence 1. 1/3 duty note: this applies to the case where the s1/p1 to s12/p12, and com4/s51 output pins are set to be segment output ports. for example, the table below lists the segment output states for the s21 output pin. no. 7665- 15 /27 LC75827E, 75827w segment output pin com1 com2 com3 s1/p1 d1 d2 d3 s2/p2 d4 d5 d6 s3/p3 d7 d8 d9 s4/p4 d10 d11 d12 s5/p5 d13 d14 d15 s6/p6 d16 d17 d18 s7/p7 d19 d20 d21 s8/p8 d22 d23 d24 s9/p9 d25 d26 d27 s10/p10 d28 d29 d30 s11/p11 d31 d32 d33 s12/p12 d34 d35 d36 s13 d37 d38 d39 s14 d40 d41 d42 s15 d43 d44 d45 s16 d46 d47 d48 s17 d49 d50 d51 s18 d52 d53 d54 s19 d55 d56 d57 s20 d58 d59 d60 s21 d61 d62 d63 s22 d64 d65 d66 s23 d67 d68 d69 s24 d70 d71 d72 s25 d73 d74 d75 s26 d76 d77 d78 segment output pin com1 com2 com3 s27 d79 d80 d81 s28 d82 d83 d84 s29 d85 d86 d87 s30 d88 d89 d90 s31 d91 d92 d93 s32 d94 d95 d96 s33 d97 d98 d99 s34 d100 d101 d102 s35 d103 d104 d105 s36 d106 d107 d108 s37 d109 d110 d111 s38 d112 d113 d114 s39 d115 d116 d117 s40 d118 d119 d120 s41 d121 d122 d123 s42 d124 d125 d126 s43 d127 d128 d129 s44 d130 d131 d132 s45 d133 d134 d135 s46 d136 d137 d138 s47 d139 d140 d141 s48 d142 d143 d144 s49 d145 d146 d147 s50 d148 d149 d150 com4/s51 d151 d152 d153 display data segment output pin (s21) state d61 d62 d63 0 0 0 the lcd segments corresponding to com1, com2, and com3 are off. 0 0 1 the lcd segment corresponding to com3 is on. 0 1 0 the lcd segment corresponding to com2 is on. 0 1 1 the lcd segments corresponding to com2 and com3 are on. 1 0 0 the lcd segment corresponding to com1 is on. 1 0 1 the lcd segments corresponding to com1 and com3 are on. 1 1 0 the lcd segments corresponding to com1 and com2 are on. 1 1 1 the lcd segments corresponding to com1, com2, and com3 are on.
no. 7665- 16 /27 LC75827E, 75827w 2. 1/4 duty segment output pin com1 com2 com3 com4 s1/p1 d1 d2 d3 d4 s2/p2 d5 d6 d7 d8 s3/p3 d9 d10 d11 d12 s4/p4 d13 d14 d15 d16 s5/p5 d17 d18 d19 d20 s6/p6 d21 d22 d23 d24 s7/p7 d25 d26 d27 d28 s8/p8 d29 d30 d31 d32 s9/p9 d33 d34 d35 d36 s10/p10 d37 d38 d39 d40 s11/p11 d41 d42 d43 d44 s12/p12 d45 d46 d47 d48 s13 d49 d50 d51 d52 s14 d53 d54 d55 d56 s15 d57 d58 d59 d60 s16 d61 d62 d63 d64 s17 d65 d66 d67 d68 s18 d69 d70 d71 d72 s19 d73 d74 d75 d76 s20 d77 d78 d79 d80 s21 d81 d82 d83 d84 s22 d85 d86 d87 d88 s23 d89 d90 d91 d92 s24 d93 d94 d95 d96 s25 d97 d98 d99 d100 segment output pin com1 com2 com3 com4 s26 d101 d102 d103 d104 s27 d105 d106 d107 d108 s28 d109 d110 d111 d112 s29 d113 d114 d115 d116 s30 d117 d118 d119 d120 s31 d121 d122 d123 d124 s32 d125 d126 d127 d128 s33 d129 d130 d131 d132 s34 d133 d134 d135 d136 s35 d137 d138 d139 d140 s36 d141 d142 d143 d144 s37 d145 d146 d147 d148 s38 d149 d150 d151 d152 s39 d153 d154 d155 d156 s40 d157 d158 d159 d160 s41 d161 d162 d163 d164 s42 d165 d166 d167 d168 s43 d169 d170 d171 d172 s44 d173 d174 d175 d176 s45 d177 d178 d179 d180 s46 d181 d182 d183 d184 s47 d185 d186 d187 d188 s48 d189 d190 d191 d192 s49 d193 d194 d195 d196 s50 d197 d198 d199 d200 display data segment output pin (s21) state d81 d82 d83 d84 0 0 0 0 the lcd segments corresponding to com1, com2, com3, and com4 are off. 0 0 0 1 the lcd segment corresponding to com4 is on. 0 0 1 0 the lcd segment corresponding to com3 is on. 0 0 1 1 the lcd segments corresponding to com3 and com4 are on. 0 1 0 0 the lcd segment corresponding to com2 is on. 0 1 0 1 the lcd segments corresponding to com2 and com4 are on. 0 1 1 0 the lcd segments corresponding to com2 and com3 are on. 0 1 1 1 the lcd segments corresponding to com2, com3, and com4 are on. 1 0 0 0 the lcd segment corresponding to com1 is on. 1 0 0 1 the lcd segments corresponding to com1 and com4 are on. 1 0 1 0 the lcd segments corresponding to com1 and com3 are on. 1 0 1 1 the lcd segments corresponding to com1, com3, and com4 are on. 1 1 0 0 the lcd segments corresponding to com1 and com2 are on. 1 1 0 1 the lcd segments corresponding to com1, com2, and com4 are on. 1 1 1 0 the lcd segments corresponding to com1, com2, and com3 are on. 1 1 1 1 the lcd segments corresponding to com1, com2, com3, and com4 are on. note: this applies to the case where the s1/p1 to s12/p12 output pins are set to be segment output ports. for example, the table below lists the segment output states for the s21 output pin.
1/3 duty, 1/2 bias drive technique no. 7665- 17 /27 LC75827E, 75827w = fosc 768 fosc 576 fosc 288 fosc 192 fosc 384 f ck 768 when the control data fc0 = 0, fc1 = 0, and fc2 = 1: fo = = when the control data fc0 = 0, fc1 = 1, and fc2 = 0: fo = = when the control data fc0 = 0, fc1 = 1, and fc2 = 1: fo = = when the control data fc0 = 1, fc1 = 0, and fc2 = 0: fo = when the control data fc0 = 0, fc1 = 0, and fc2 = 0: fo = = f ck 576 f ck 288 f ck 192 f ck 384 com3 com2 com1 lcd driver output when all lcd segments corresponding to com1, com2, and com3 are on. lcd driver output when lcd segments corresponding to com2 and com3 are on. lcd driver output when lcd segments corresponding to com1 and com3 are on. lcd driver output when all lcd segments corresponding to com1, com2, and com3 are turned off. lcd driver output when only lcd segments corresponding to com1 are on. lcd driver output when only lcd segments corresponding to com2 are on. lcd driver output when only lcd segments corresponding to com3 are on. lcd driver output when lcd segments corresponding to com1 and com2 are on. vlcd1,vlcd2 0v vlcd fo [hz] vlcd1,vlcd2 0v vlcd vlcd1,vlcd2 0v vlcd vlcd1,vlcd2 0v vlcd vlcd1,vlcd2 0v vlcd vlcd1,vlcd2 0v vlcd vlcd1,vlcd2 0v vlcd vlcd1,vlcd2 0v vlcd vlcd1,vlcd2 0v vlcd vlcd1,vlcd2 0v vlcd vlcd1,vlcd2 0v vlcd
no. 7665- 18 /27 LC75827E, 75827w 1/3 duty, 1/3 bias drive technique com3 com2 com1 lcd driver output when all lcd segments corresponding to com1, com2, and com3 are on. lcd driver output when lcd segments corresponding to com2 and com3 are on. lcd driver output when lcd segments corresponding to com1 and com3 are on. lcd driver output when all lcd segments corresponding to com1, com2, and com3 are turned off. lcd driver output when only lcd segments corresponding to com1 are on. lcd driver output when only lcd segments corresponding to com2 are on. lcd driver output when only lcd segments corresponding to com3 are on. lcd driver output when lcd segments corresponding to com1 and com2 are on. fo [hz] vlcd2 vlcd1 vlcd 0v vlcd2 vlcd1 vlcd 0v vlcd2 vlcd1 vlcd 0v vlcd2 vlcd1 vlcd 0v vlcd2 vlcd1 vlcd 0v vlcd2 vlcd1 vlcd 0v vlcd2 vlcd1 vlcd 0v vlcd2 vlcd1 vlcd 0v vlcd2 vlcd1 vlcd 0v vlcd2 vlcd1 vlcd 0v vlcd2 vlcd1 vlcd 0v = fosc 768 fosc 576 fosc 288 fosc 192 fosc 384 f ck 768 when the control data fc0 = 0, fc1 = 0, and fc2 = 1: fo = = when the control data fc0 = 0, fc1 = 1, and fc2 = 0: fo = = when the control data fc0 = 0, fc1 = 1, and fc2 = 1: fo = = when the control data fc0 = 1, fc1 = 0, and fc2 = 0: fo = when the control data fc0 = 0, fc1 = 0, and fc2 = 0: fo = = f ck 576 f ck 288 f ck 192 f ck 384
no. 7665- 19 /27 LC75827E, 75827w 1/4 duty, 1/2 bias drive technique vlcd1,vlcd2 vlcd com3 com2 com1 com4 lcd driver output when all lcd segments corresponding to com1, com2, com3, and com4 are on. lcd driver output when lcd segments corresponding to com2 and com4 are on. lcd driver output when only lcd segments corresponding to com4 are on. lcd driver output when lcd segments corresponding to com1, com2, and com3 are on. lcd driver output when lcd segments corresponding to com2 and com3 are on. lcd driver output when lcd segments corresponding to com1 and com3 are on. lcd driver output when only lcd segments corresponding to com3 are on. lcd driver output when lcd segments corresponding to com1 and com2 are on. lcd driver output when only lcd segments corresponding to com2 are on. lcd driver output when only lcd segments corresponding to com1 are on. lcd driver output when all lcd segments corresponding to com1, com2, com3, and com4 are turned off. 0v fo [hz] vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v vlcd1,vlcd2 vlcd 0v = fosc 768 fosc 576 fosc 288 fosc 192 fosc 384 f ck 768 when the control data fc0 = 0, fc1 = 0, and fc2 = 1: fo = = when the control data fc0 = 0, fc1 = 1, and fc2 = 0: fo = = when the control data fc0 = 0, fc1 = 1, and fc2 = 1: fo = = when the control data fc0 = 1, fc1 = 0, and fc2 = 0: fo = when the control data fc0 = 0, fc1 = 0, and fc2 = 0: fo = = f ck 576 f ck 288 f ck 192 f ck 384
no. 7665- 20 /27 LC75827E, 75827w 1/4 duty, 1/3 bias drive technique vlcd1 vlcd2 fo [hz] vlcd vlcd1 vlcd2 vlcd com3 lcd driver output when all lcd segments corresponding to com1, com2, com3, and com4 are turned off. com2 com1 com4 lcd driver output when lcd segments corresponding to com2 and com4 are on. lcd driver output when only lcd segments corresponding to com4 are on. lcd driver output when all lcd segments corresponding to com1, com2, com3, and com4 are on. lcd driver output when lcd segments corresponding to com1, com2, and com3 are on. lcd driver output when lcd segments corresponding to com2 and com3 are on. lcd driver output when lcd segments corresponding to com1 and com3 are on. lcd driver output when only lcd segments corresponding to com3 are on. lcd driver output when lcd segments corresponding to com1 and com2 are on. lcd driver output when only lcd segments corresponding to com2 are on. lcd driver output when only lcd segments corresponding to com1 are on. 0v vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd vlcd1 vlcd2 vlcd 0v 0v 0v 0v 0v 0v 0v 0v 0v 0v 0v 0v 0v 0v = fosc 768 fosc 576 fosc 288 fosc 192 fosc 384 f ck 768 when the control data fc0 = 0, fc1 = 0, and fc2 = 1: fo = = when the control data fc0 = 0, fc1 = 1, and fc2 = 0: fo = = when the control data fc0 = 0, fc1 = 1, and fc2 = 1: fo = = when the control data fc0 = 1, fc1 = 0, and fc2 = 0: fo = when the control data fc0 = 0, fc1 = 0, and fc2 = 0: fo = = f ck 576 f ck 288 f ck 192 f ck 384
the inh pin and display control since the ic internal data (1/3 duty: the display data d1 to d153 and the control data, 1/4 duty: the display data d1 to d200 and the control data) is undefined when power is first applied, applications should set the inh pin low at the same time as power is applied to turn off the display (this sets the s1/p1 to s12/p12, s13 to s50, com1 to com3, and com4/s51 to the v ss level.) and during this period send serial data from the controller. the controller should then set the inh pin high after the data transfer has completed. this procedure prevents meaningless displays at power on. (see figures 5and 6.) notes on the power on/off sequences applications should observe the following sequences when turning the LC75827E and lc75827w power on and off. ? at power on: logic block power supply (v dd ) on ? lcd driver block power supply (v lcd ) on ? at power off: lcd driver block power supply (v lcd ) off ? logic block power supply (v dd ) off however, if the logic and lcd driver block use a shared power supply, then the power supplies can be turned on and off at the same time. no. 7665- 21 /27 LC75827E, 75827w note: t1 3 0 t2 > 0 t3 3 0 (t2 > t3) tc ......10 s min. t1 v dd t2 d1 to d51, p0 to p3, dr, dt, fc0 to fc2, oc, sc, bu internal data internal data (d52 to d102) internal data (d103 to d153) undefined v lcd ce inh undefined undefined defined defined defined undefined undefined undefined v il 1 tc v il 1 t3 display and control data transfer figure 5 1. 1/3 duty
no. 7665- 22 /27 LC75827E, 75827w 2. external clock mode (control data oc = 1) when external clock mode is selected, a current protection resistor, rg (4.7 to 47 k ) must be inserted between the external clock output pin (on the external oscillator) and the osc pin. the value of this resistor is determined by the allowable current capacity of the external clock output pin. note that the value must also be chosen so that the external clock waveform is not deformed significantly. t1 v dd t2 v lcd ce inh v il 1 tc v il 1 t3 note: t1 3 0 t2 > 0 t3 3 0 (t2 > t3) tc ......10 s min. undefined undefined undefined defined defined defined undefined undefined defined undefined undefined undefined display and control data transfer d1 to d52, p0 to p3, dr, dt, fc0 to fc2, oc, sc, bu internal data internal data (d53 to d104) internal data (d153 to d200) internal data (d105 to d152) figure 6 2. 1/4 duty osc cosc rosc os c external clock output pin external oscillator rg note: the allowable current rating of the external clock output pin must be greater than vdd/rg. notes on controller transfer of display data since the LC75827E and lc75827w accept the display data (d1 to d153) divided into three separate transfer operations when using 1/3 duty drive scheme and the data (d1 to d200) divided into four separate transfer operations when 1/4 duty drive, we recommend that applications transfer all of the display data within a period of less than 30 ms to prevent observable degradation of display quality. osc pin peripheral circuit 1. rc oscillation mode (control data oc = 0) when rc oscillation mode is selected, an external resistor, rosc, and an external capacitor, cosc, must be connected between the osc pin and ground.
no. 7665- 23 /27 LC75827E, 75827w c di cl ce inh vlcd2 vlcd1 from the controller vlcd vss com4/s51 s50 s49 s13 p12/s12 p2/s2 p1/s1 com3 com2 (p12) (p2) (p1) general-purpose output ports lcd panel (up to 153 segments) used for functions such as backlight control com1 osc * 2 c 3 0.047 f +5v * 3 +3v vdd c 10 k 3 r 3 1 k c 3 0.047 f +5v +3v r r di cl ce inh vlcd2 vlcd1 vlcd vss com4/s51 s50 s49 s13 p12/s12 p2/s2 p1/s1 com3 com2 (p12) (p2) (p1) com1 osc * 2 * 3 vdd from the controller general-purpose output ports lcd panel (up to 153 segments) used for functions such as backlight control sample application circuit 2 1/3 duty, 1/2 bias (for use with large panels) * 2 in rc oscillation mode, an external resistor, rosc, and an external capacitor, cosc, must be connected between the osc pin and ground. in external clock mode is selected, a current protection resistor, rg (4.7 to 47 k ) must be inserted between the external clock output pin (on the external oscillator) and the osc pin. (see the osc pin peripheral circuit section.) * 3 when a capacitor except the recommended external capacitance (cosc = 1000 pf) is connected the osc pin, we recommend that appli cations connect the osc pin with a capacitor in the range 220 to 2200 pf. * 2 in rc oscillation mode, an external resistor, rosc, and an external capacitor, cosc, must be connected between the osc pin and ground. in external clock mode is selected, a current protection resistor, rg (4.7 to 47 k ) must be inserted between the external clock output pin (on the external oscillator) and the osc pin. (see the osc pin peripheral circuit section.) * 3 when a capacitor except the recommended external capacitance (cosc = 1000 pf) is connected the osc pin, we recommend that appli cations connect the osc pin with a capacitor in the range 220 to 2200 pf. sample application circuit 1 1/3 duty, 1/2 bias (for use with normal panels)
no. 7665- 24 /27 LC75827E, 75827w c +5 v +3 v c (p12) (p2) (p1) di cl ce inh vlcd2 vlcd1 from the controller vlcd vss com4/s51 s50 s49 s13 p12/s12 p2/s2 p1/s1 com3 com2 general-purpose output ports lcd panel (up to 153 segments) used for functions such as backlight control com1 osc * 2 c 3 0.047 f * 3 vdd c +5 v +3 v r r r c (p12) (p2) (p1) di cl ce inh vlcd2 vlcd1 vlcd vss com4/s51 s50 s49 s13 p12/s12 p2/s2 p1/s1 com3 com2 com1 osc * 2 * 3 vdd from the controller general-purpose output ports lcd panel (up to 153 segments) used for functions such as backlight control 10 k 3 r 3 1 k c 3 0.047 f sample application circuit 4 1/3 duty, 1/3 bias (for use with larger panels) * 2 in rc oscillation mode, an external resistor, rosc, and an external capacitor, cosc, must be connected between the osc pin and ground. in external clock mode is selected, a current protection resistor, rg (4.7 to 47 k ) must be inserted between the external clock output pin (on the external oscillator) and the osc pin. (see the osc pin peripheral circuit section.) * 3 when a capacitor except the recommended external capacitance (cosc = 1000 pf) is connected the osc pin, we recommend that appli cations connect the osc pin with a capacitor in the range 220 to 2200 pf. * 2 in rc oscillation mode, an external resistor, rosc, and an external capacitor, cosc, must be connected between the osc pin and ground. in external clock mode is selected, a current protection resistor, rg (4.7 to 47 k ) must be inserted between the external clock output pin (on the external oscillator) and the osc pin. (see the osc pin peripheral circuit section.) * 3 when a capacitor except the recommended external capacitance (cosc = 1000 pf) is connected the osc pin, we recommend that appli cations connect the osc pin with a capacitor in the range 220 to 2200 pf. sample application circuit 3 1/3 duty, 1/3 bias (for use with normal panels)
no. 7665- 25 /27 LC75827E, 75827w c +5 v +3 v (p12) (p2) (p1) di cl ce inh vlcd2 vlcd1 from the controller vlcd vss s50 s49 s13 p12/s12 p2/s2 p1/s1 com3 s51/com4 com2 general-purpose output ports lcd panel (up to 200 segments) used for functions such as backlight control com1 osc * 2 c 3 0.047 f * 3 vdd c +5 v +3 v r r (p12) (p2) (p1) di cl ce inh vlcd2 vlcd1 vlcd vss s50 s49 s13 p12/s12 com3 com2 com1 osc * 2 * 3 vdd from the controller general-purpose output ports lcd panel (up to 200 segments) used for functions such as backlight control 10 k 3 r 3 1 k c 3 0.047 f p2/s2 p1/s1 s51/com4 sample application circuit 6 1/4 duty, 1/2 bias (for use with larger panels) * 2 in rc oscillation mode, an external resistor, rosc, and an external capacitor, cosc, must be connected between the osc pin and ground. in external clock mode is selected, a current protection resistor, rg (4.7 to 47 k ) must be inserted between the external clock output pin (on the external oscillator) and the osc pin. (see the osc pin peripheral circuit section.) * 3 when a capacitor except the recommended external capacitance (cosc = 1000 pf) is connected the osc pin, we recommend that appli cations connect the osc pin with a capacitor in the range 220 to 2200 pf. * 2 in rc oscillation mode, an external resistor, rosc, and an external capacitor, cosc, must be connected between the osc pin and ground. in external clock mode is selected, a current protection resistor, rg (4.7 to 47 k ) must be inserted between the external clock output pin (on the external oscillator) and the osc pin. (see the osc pin peripheral circuit section.) * 3 when a capacitor except the recommended external capacitance (cosc = 1000 pf) is connected the osc pin, we recommend that appli cations connect the osc pin with a capacitor in the range 220 to 2200 pf. sample application circuit 5 1/4 duty, 1/2 bias (for use with normal panels)
no. 7665- 26 /27 LC75827E, 75827w c +5v +3v c (p12) (p2) (p1) di cl ce inh vlcd2 vlcd1 from the controller vlcd vss s50 s49 s13 p12/s12 com3 com2 general-purpose output ports lcd panel (up to 200 segments) used for functions such as backlight control com1 osc * 2 c 3 0.047 f * 3 vdd p2/s2 p1/s1 s51/com4 c +5v +3v r r r c (p12) (p2) (p1) di cl ce inh vlcd2 vlcd1 vlcd vss s50 s49 s13 p12/s12 com3 com2 com1 osc * 2 * 3 vdd from the controller general-purpose output ports lcd panel (up to 200 segments) used for functions such as backlight control p2/s2 p1/s1 s51/com4 10 k 3 r 3 1 k c 3 0.047 f sample application circuit 8 1/4 duty, 1/3 bias (for use with larger panels) * 2 in rc oscillation mode, an external resistor, rosc, and an external capacitor, cosc, must be connected between the osc pin and ground. in external clock mode is selected, a current protection resistor, rg (4.7 to 47 k ) must be inserted between the external clock output pin (on the external oscillator) and the osc pin. (see the osc pin peripheral circuit section.) * 3 when a capacitor except the recommended external capacitance (cosc = 1000 pf) is connected the osc pin, we recommend that appli cations connect the osc pin with a capacitor in the range 220 to 2200 pf. * 2 in rc oscillation mode, an external resistor, rosc, and an external capacitor, cosc, must be connected between the osc pin and ground. in external clock mode is selected, a current protection resistor, rg (4.7 to 47 k ) must be inserted between the external clock output pin (on the external oscillator) and the osc pin. (see the osc pin peripheral circuit section.) * 3 when a capacitor except the recommended external capacitance (cosc = 1000 pf) is connected the osc pin, we recommend that appli cations connect the osc pin with a capacitor in the range 220 to 2200 pf. sample application circuit 7 1/4 duty, 1/3 bias (for use with normal panels)
ps no. 7665- 27 /27 LC75827E, 75827w this catalog provides information as of august, 2004. specifications and information herein are subject to change without notice. specifications of any and all sanyo products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customers products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customers products or equipment. sanyo electric co., ltd. strives to supply high-quality high-reliability products. however, any and all semiconductor products fail with some probability. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any and all sanyo products described or contained herein fall under strategic products (including services) controlled under the foreign exchange and foreign trade control law of japan, such products must not be exported without obtaining export license from the ministry of international trade and industry in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo electric co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the delivery specification for the sanyo product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. sanyo believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.

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