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low voltage supervisory circuits with watchdog and manual reset in 5-lead sot-23 adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to chan ge without notice. no license is granted by implication or otherwise under any patent or patent ri ghts of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2005 analog devices, inc. all rights reserved. features precision low voltage monitoring 9 reset threshold options: 1.58 v to 4.63 v 140 ms (min) reset timeout watchdog timer with 1.6 sec timeout manual reset input reset output stages push-pull active-low open-drain active-low push-pull active-high low power consumption (7 a) guaranteed reset output valid to v cc = 1 v power supply glitch immunity specified from ? 40c to +125c 5-lead sot-23 package applications microprocessor systems computers controllers intelligent instruments portable equipment functional block diagram adm6823 v cc v cc mr gnd wdi reset reset generator watchdog detector debounce v ref 04535-001 figure 1. general description the adm682x are supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. as well as providing power-on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period. a reset signal can also be asserted by means of an external push-button through a manual reset input. the parts feature different combinations of watchdog input and manual reset input and output stage configurations, as shown in table 1 . each part is available in nine reset threshold options, ranging from 1.58 v to 4.63 v. the reset and watchdog timeout periods are fixed at 140 ms (min) and 1.6 sec (typ), respectively. the adm682x are available in 5-lead sot-23 packages and typically consume only 7 a, making them suitable for use in low power, portable applications. table 1. selection table output stage part no. watchdog timer manual reset reset reset adm6821 yes yes - push-pull adm6822 yes yes open-drain - adm6823 yes yes push-pull - adm6824 yes - push-pull push-pull adm6825 - yes push-pull push-pull
adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 | page 2 of 12 table of contents specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 5 esd caution .................................................................................. 5 pin configurations and function descriptions ........................... 6 typical performance characteristics ............................................. 7 circuit description ........................................................................... 9 reset output ................................................................................. 9 manual reset input ...................................................................... 9 watchdo g input .............................................................................9 application information ................................................................ 10 watchdo g input cur rent ........................................................... 10 negative-going v cc transients ................................................ 10 ensuring reset valid to v cc = 0 v ........................................... 10 watchdog software considerations ......................................... 10 outline dimensions ....................................................................... 11 ordering guide .......................................................................... 11 revision history 6/05revision 0: initial version
adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 | page 3 of 12 specifications v cc = 4.5 v to 5.5 v for adm682_l/m; v cc = 2.7 v to 3.6 v for adm682_t/s/r; v cc = 2.1 v to 2.75 v for adm682_z/y; v cc = 1.53 v to 2.0 v for adm682_w/v; t a = C40c to +125c, unless otherwise noted. table 2. parameter min typ max unit test conditions/comments supply v cc operating voltage range 1 5.5 v supply current 10 20 a wdi and mr unconnected, v cc = 5.5 v 7 16 a wdi and mr unconnected, v cc = 3.6 v reset threshold voltage adm682xl 4.50 4.63 4.75 v adm682xm 4.25 4.38 4.50 v adm682xt 3.00 3.08 3.15 v adm682xs 2.85 2.93 3.00 v adm682xr 2.55 2.63 2.70 v adm682xz 2.25 2.32 2.38 v adm682xy 2.12 2.19 2.25 v adm682xw 1.62 1.67 1.71 v adm682xv 1.52 1.58 1.62 v reset threshold temperature coefficient 60 ppm/c reset threshold hysteresis 2 x v th mv v cc to reset delay 20 s v th ? v cc = 100 mv reset timeout period 140 200 280 ms reset output voltage v ol (push-pull or open-drain) 0.3 v v cc > = 1 v, i sink = 50 a 0.3 v v cc > = 1.2 v, i sink = 100 a 0.3 v v cc > = 2.55 v, i sink = 1.2 ma 0.4 v v cc > = 4.25 v, i sink = 3.2 ma v oh (push-pull only) 0.8 v cc v v cc > = 1.8 v, i source = 200 a 0.8 v cc v v cc > = 3.15 v, i source = 500 a 0.8 v cc v v cc > = 4.75 v, i source = 800 a reset output leakage current (open-drain only) 1 a reset not asserted reset output voltage (push-pull only) v oh 0.8 v cc v v cc > = 1 v, i source = 1 a 0.8 v cc v v cc > = 1.5 v, i source = 100 a 0.8 v cc v v cc > = 2.55 v, i source = 500 a 0.8 v cc v v cc > = 4.25 v, i source = 800 a v ol 0.3 v v cc > = 1.8 v, i sink = 500 a 0.3 v v cc > = 3.15 v, i sink = 1.2 ma 0.4 v v cc > = 4.75 v, i sink = 3.2 ma manual reset input (adm6821/adm6822/adm6823/adm6825) mr input threshold v il 0.3 v cc v v ih 0.7 v cc v mr input pulse width 1 s mr glitch rejection 100 ns mr to reset delay 200 ns mr pull-up resistance 25 50 75 k
adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 | page 4 of 12 parameter min typ max unit test conditions/comments watchdog input (adm6821/adm6822/adm6823/adm6824) watchdog timeout period 1.12 1.6 2.40 sec wdi pulse width 50 ns wdi input threshold v il 0.3 v cc v v ih 0.7 v cc v wdi input current 120 160 a v wdi = v cc ?20 ?15 a v wdi = 0
adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 | page 5 of 12 absolute maximum ratings t a = 25c, unless otherwise noted. table 3. parameter rating v cc ?0.3 v to +6 v output current (reset, reset ) 20 ma operating temperature range ?40c to +125c storage temperature range ?65c to +150c ja thermal impedance 170c/w soldering temperature sn/pb 240c, 30 sec pb-free 260c, 40 sec stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution esd (electrostatic discharge) sensiti ve device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge wi thout detection. although this product features proprietary esd protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 | page 6 of 12 pin configurations and function descriptions adm6821 top view (not to scale) reset 1 gnd 2 mr 3 v cc wdi 5 4 04535-002 figure 2. adm6821 pin configuration adm6822/ adm6823 top view (not to scale) reset 1 gnd 2 mr 3 v cc wdi 5 4 04535-003 figure 3. adm6822/adm6823 pin configuration adm6824 top view (not to scale) reset 1 gnd 2 reset 3 v cc wdi 5 4 04535-004 figure 4. adm6824 pin configuration adm6825 top view (not to scale) reset 1 gnd 2 reset 3 v cc mr 5 4 04535-005 figure 5. adm6825 pin configuration table 4. pin function descriptions pin no. name description 1 reset (adm6822/adm6823/adm6824/adm6825) active-low reset output. asserted whenever v cc is below the reset threshold, v th . open-drain output stage for the adm6822. push-pull output stage for the adm6823/adm6824/adm6825. reset (adm6821) active-high push-pull reset output. 2 gnd ground. 3 mr (adm6821/adm6822/adm6823) manual rese t input. this is an active-low inp ut, which, when forced low for at least 1 s, generates a reset. it fe atures a 50 k internal pull-up. reset (adm6824/adm6825) active-high push-pull reset output. 4 wdi (adm6821/adm6822/adm6823/adm6824) watchdog input. generates a reset if the voltage on the pin remains low or high for the duration of the watchdog timeout. the timer is cleared if a logic transition occurs on this pin or if a reset is generated. mr (adm6825) manual reset input. 5 v cc power supply voltage being monitored.
adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 | page 7 of 12 typical performance characteristics 04535-006 temperature (c) 120 ?40 ?20 0 20 40 60 80 100 i cc ( a) 10.0 9.5 7.5 7.0 6.5 9.0 8.5 8.0 6.0 5.5 5.0 4.5 4.0 3.5 v cc = 5v v cc = 3.3v v cc = 1.5v figure 6. supply current vs. temperature 04535-007 temperature (c) 120 ?40 0 ?20 40 20 100 8060 normalized reset timeout 1.20 1.15 1.10 1.05 0.95 1.00 0.90 0.85 0.80 figure 7. normalized reset timeout period vs. temperature 04535-008 temperature (c) 120 ?40 0 ?20 40 20 100 8060 v cc to reset delay ( s) 100 90 80 60 70 40 50 20 10 30 0 figure 8. v cc to reset output delay vs. temperature 04535-009 temperature (c) 120 ?40 0 ?20 40 20 100 8060 normalized watchdog timeout 1.20 1.15 1.10 1.05 1.00 0.95 0.90 figure 9. normalized watchdog timeout period vs. temperature 04535-010 temperature (c) 120 ?40 0 ?20 40 20 100 8060 normalized reset threshold 1.05 1.03 1.04 1.01 1.02 0.99 1.00 0.97 0.98 0.95 0.96 figure 10. normalized reset threshold vs. temperature 04535-011 reset threshold overdrive (mv) 1000 10 100 minimum pulse width ( s) 160 120 140 100 60 80 20 40 0 v cc = 4.63v v cc = 2.93v figure 11. maximum v cc transient duration vs. reset threshold overdrive
adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 | page 8 of 12 04535-017 i sink (ma) 7 0123456 v out (v) 0.20 0.15 0.10 0.05 0 v cc = 2.9v figure 12. voltage output low vs. i sink 04535-018 i source (ma) 1.0 0 0.2 0.4 0.6 0.8 v out (v) 2.92 2.90 2.88 2.86 2.84 2.82 v cc = 2.9v figure 13. voltage output high vs. i source
adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 | page 9 of 12 circuit description the adm682x provide microprocessor supply voltage supervision by controlling the microprocessors reset input. code execution errors are avoided during power-up, power- down, and brownout conditions by asserting a reset signal when the supply voltage is below a preset threshold. in addition, the adm682x allow supply voltage stabilization with a fixed timeout before the reset deasserts after the supply voltage rises above the threshold. problems with microprocessor code execution can be monitored and corrected with a watchdog timer (adm6821/ adm6822/adm6823/adm6824). when watchdog strobe instructions are included in microprocessor code, a watchdog timer detects if the microprocessor code breaks down or becomes stuck in an infinite loop. if this happens, the watchdog timer asserts a reset pulse, which restarts the microprocessor in a known state. if the user detects a problem with the systems operation, a manual reset input is available (adm6821/adm6822/ adm6823/adm6825) to reset the microprocessor by means of an external push-button, for example. reset output the adm6821 features an active-high push-pull reset output. the adm6822 features an active-low open-drain reset output, while the adm6823 features an active-low push-pull output. the adm6824/adm6825 feature dual active-low and active- high push-pull reset outputs. for active-low and active-high outputs, the reset signal is guaranteed to be logic low and logic high, respectively, for v cc down to 1 v. the reset output is asserted when v cc is below the reset threshold (v th ), when mr is driven low, or when wdi is not serviced within the watchdog timeout period (t wd ). reset remains asserted for the duration of the reset active timeout period (t rp ) after v cc rises above the reset threshold, after mr transitions from low to high, or after the watchdog timer times out. figure 14 shows the reset outputs. v cc 1v v cc 0v v cc 0v v th v th 0v v cc reset reset t rd t rd 1v t rp t rp 04535-012 figure 14. reset timing diagram manual reset input the adm6821/adm6822/adm6823/adm6825 feature a manual reset input ( mr ), which, when driven low, asserts the reset output. when mr transitions from low to high, reset remains asserted for the duration of the reset active timeout period before deasserting. the mr input has a 50 k internal pull-up so that the input is always high when unconnected. an external push-button switch can be connected between mr and ground so that the user can generate a reset. debounce circuitry is integrated on-chip for this purpose. noise immunity is provided on the mr input, and fast, negative-going transients of up to 100 ns (typ) are ignored. a 0.1 f capacitor between mr and ground provides additional noise immunity. watchdog input the adm6821/adm6822/adm6823/adm6824 feature a watchdog timer, which monitors microprocessor activity. a timer circuit is cleared with every low-to-high or high-to-low logic transition on the watchdog input pin (wdi), which detects pulses as short as 50 ns. if the timer counts through the preset watchdog timeout period (t wd ), reset is asserted. the microprocessor is required to toggle the wdi pin to avoid being reset. failure of the microprocessor to toggle wdi within the timeout period therefore indicates a code execution error, and the reset pulse generated restarts the microprocessor in a known state. in addition to logic transitions on wdi, the watchdog timer is also cleared by a reset assertion due to an undervoltage condi- tion on v cc or mr being pulled low. when reset is asserted, the watchdog timer is cleared and does not begin counting again until reset deassserts. the watchdog timer can be disabled by leaving wdi floating or by three-stating the wdi driver. v cc 1v v cc 0v v cc 0v v th 0v v cc wdi reset t rp t rd t wd 04535-013 figure 15. watchdog timing diagram
adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 | page 10 of 12 application information watchdog input current to minimize watchdog input current (and minimize overall power consumption), leave wdi low for the majority of the watchdog timeout period. when driven high, wdi can draw as much as 160 a. pulsing wdi low-high-low at a low duty cycle reduces the effect of the large input current. when wdi is unconnected, a window comparator disconnects the watchdog timer from the reset output circuitry so that reset is not asserted when the watchdog timer times out. negative-going v cc transients to avoid unnecessary resets caused by fast power supply transients, the adm682x are equipped with glitch rejection circuitry. the typical performance characteristic in figure 11 plots v cc transient duration versus. the transient magnitude. the curves show combinations of transient magnitude and duration for which a reset is not generated for the 4.63 v and 2.93 v reset threshold parts. for example, with the 2.93 v threshold, a transient that goes 100 mv below the threshold and lasts 8 s typically does not cause a reset, but if the transient is any bigger in magnitude or duration, a reset is generated. an optional 0.1 f bypass capacitor mounted close to v cc provides additional glitch rejection. ensuring reset valid to v cc = 0 v both active-low and active-high reset outputs are guaranteed to be valid for v cc as low as 1 v. however, by using an external resistor with push-pull configured reset outputs, valid outputs for v cc as low as 0 v are possible. for an active-low reset output, a resistor connected between reset and ground pulls the output low when it is unable to sink current. for the active- high case, a resistor connected between reset and v cc pulls the output high when it is unable to source current. a large resistance such as 100 k should be used so that it does not overload the reset output when v cc is above 1 v. adm6822/ adm6823/ adm6824/ adm6825 v cc reset 100k adm6821/ adm6824/ adm6825 v cc reset 100k 04535-015 gnd gnd figure 16. ensuring reset valid to v cc = 0 v watchdog software considerations in implementing the microprocessors watchdog strobe code, quickly switching wdi low-high and then high-low (minimizing wdi high time) is desirable for current consumption reasons. however, a more effective way of using the watchdog function can be considered. a low-high-low wdi pulse within a given subroutine prevents the watchdog from timing out. however, if the subroutine becomes stuck in an infinite loop, the watchdog could not detect this because the subroutine continues to toggle wdi. a more effective coding scheme for detecting this error involves using a slightly longer watchdog timeout. in the program that calls the subroutine, wdi is set high. the subroutine sets wdi low when it is called. if the program executes without error, wdi is toggled high and low with every loop of the program. if the subroutine enters an infinite loop, wdi is kept low, the watchdog times out, and the microprocessor is reset. start set wdi high program code subroutine set wdi low return infinite loop: watchdog times out reset 04535-014 figure 17. watchdog flow diagram reset reset wdi i/o mr adm6823 v cc p 04535-016 figure 18. typical application circuit
adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 | page 11 of 12 outline dimensions pin 1 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 5 12 3 4 0.22 0.08 10 5 0 0.50 0.30 0.15 max seating plane 1.45 max 1.30 1.15 0.90 2.90 bsc 0.60 0.45 0.30 compliant to jedec standards mo-178-aa figure 19. 5-lead small outline transistor package [sot-23] (rj-5) dimensions shown in millimeters adm682 x x yrjz - rl7 ordering quantity rl7: 3,000 piece reel generic number (1 to 5) temperature range y: ?40c to +125c package code rj: 5-lead sot-23 z: lead-free reset t hreshold number l: 4.63v m: 4.38v t: 3.08v s: 2.93v r: 2.63v z: 2.32v y: 2.19v w: 1.67v v: 1.58v 04535-019 figure 20. ordering code structure ordering guide standard models 1 reset threshold (v) reset timeout (ms) temperatu re range quantity package option branding adm6821syrjz- rl7 2 2.93 140 ?40c to +125c 3k rj-5 n0a adm6822syrjz-rl7 2 2.93 140 ?40c to +125c 3k rj-5 n0b adm6822tyrjz-rl7 2 3.08 140 ?40c to +125c 3k rj-5 n0b adm6823syrj-r7 2.93 140 ?40c to +125c 3k rj-5 n0c adm6823syrjz-rl7 2 2.93 140 ?40c to +125c 3k rj-5 n0q adm6823tyrj-r7 3.08 140 ?40c to +125c 3k rj-5 n0c ADM6823TYRJZ-RL7 2 3.08 140 ?40c to +125c 3k rj-5 n0q adm6824tyrjz-r7 2 3.08 140 ?40c to +125c 3k rj-5 n0d adm6825tyrjz-r7 2 3.08 140 ?40c to +125c 3k rj-5 n0e 1 if ordering nonstandard models, complete the ordering code shown in figure 20 by inserting the part number and reset threshold suffixes. contact sales for availability of nonstandard models. 2 z = pb-free part.
adm6821/adm6822/adm6823/adm6824/adm6825 rev. 0 | page 12 of 12 notes ? 2005 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d04535C0C6/05(0)

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