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hanbit HMF51232J4 url: www.hbe.co.kr h anbit electronics co., ltd. rev.02(august,2002) 1 1 2 3 9 8 7 6 5 4 10 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 68 67 66 65 64 63 62 61 v c c d q 1 6 a 1 8 a 1 7 n c / c e 1 / c e 4 / c e 2 / c e 3 n c a 1 6 n c / w e / o e a 1 5 a 1 4 d q 1 5 vss dq9 dq8 dq7 dq6 dq5 dq4 dq3 dq2 dq1 dq10 dq11 dq14 dq13 dq12 vcc vss dq21 vss dq20 dq19 dq18 dq17 vss dq30 dq29 dq28 dq27 dq26 dq25 dq24 dq23 dq22 vcc d q 3 1 a 6 d q 0 a 5 a 4 a 3 a 2 a 1 a 0 a 7 a 8 a 9 v c c a 1 3 a 1 2 a 1 1 a 1 0 general description the HMF51232J4 is a high - speed flash read only memory (from) module containing 524,288 words organized in a x32bit configuration. the module consists of four 512kx 8 from mounted on a 68 - pin, jlcc fr4 - printed circuit board. co mmands are written to the command register using standard microprocessor write timings. register contents serve as input to an internal state - machine, which controls the erase and programming circuitry. write cycles also internally latch addresses and data needed for the programming and erase operations. reading data out of the device is similar to reading from 12.0v flash or eprom devices. four chip enable inputs, (/ce1, /ce2, /ce3, /ce4) are used to enable the module s 4 bytes independently. output enable (/oe) and write enable (/we) can set the memory input and output. when from module is disable condition, the module is becoming power standby mode, system designer can get low - power design. all module components may be powered from a single +5v dc power s upply and all inputs and outputs are ttl - compatible. features w access time : 55,70, 90 and 120ns w high - density 2mbyte design w high - reliability, low - power design w single + 5v 0.5v power supply w easy memory expansion w al l inputs and outputs are ttl - compatible w fr4 - pcb design w low profile 68 - pin jlcc w minimum 1 ,0 00,000 write/erase cycle w sector erases architecture w sector group protection w temporary sector group unprotection options marking w timing 55ns access - 55 70 n s access - 70 90 n s access - 90 120 n s access - 120 w packages 68 - pin jlcc j pin assignment 68 - pin jlcc top view flash - rom module 2mbyte (512k x 32 - bit) C 68 - pin jlcc part no. HMF51232J4
hanbit HMF51232J4 url: www.hbe.co.kr h anbit electronics co., ltd. rev.02(august,2002) 2 functional block diagram truth table mode /ce / o e /we dq addresses read l l h dout a in write l h l din a in cmos standby vcc 0.5v x x high - z x ttl standby h x x high - z x output disable l h h high - z x note : x means don't care a0 - 18 /we /oe dq 0 - 7 /ce u1 a0 - 18 /we /oe dq16 - 23 /ce u3 a0 - 18 /we /oe dq24 - 31 /ce u4 19 a0 - 18 /we /oe dq 8 - 15 /ce u 2 dq0 - dq31 a0 - a18 /ce1 /ce2 /ce3 /we /oe /ce4 32
hanbit HMF51232J4 url: www.hbe.co.kr h anbit electronics co., ltd. rev.02(august,2002) 3 absolute maximum ratings parameter symbol rating voltage with respec t to ground all other pins v in,out - 2.0v to + 7.0 v voltage with respect to ground vcc v cc - 2.0v to + 7 .0v storage temperature t stg - 65 o c to +12 5 o c operating temperature t a - 55 o c to +125 o c w stresses greater than those listed under " absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. exposure t o absolute maximum rating conditions for extended periods may affect reliability. recommended dc opera ting conditions parameter symbol min typ . max vcc for 5% device supply voltages v cc 4.75 v 5.25 v vcc for 10% device supply voltages vcc 4.5v 5.5v ground v ss 0 0 0 dc and operating cha racteristics (0 o c t a 70 o c ; vcc = 5v 0.5v ) parameter test conditions symbol min max units input leakage current vcc=vcc max, v in = gnd to vcc i l1 1.0 m a output leakage current vcc=vcc max, v out = gnd to vcc i l0 1.0 m a output high voltage i oh = - 2.5ma, vcc = vcc min v oh 2.4 v output low voltage i ol = 12ma, vcc =vcc min v ol 0.45 v vcc active current for read(1) /ce = v il , /oe=v ih , i cc1 12 ma vcc active current for program or erase(2) /ce = v il , /oe=v ih i cc2 40 ma vcc standby current /ce= v ih i cc3 1.0 ma low vcc lock - out voltage v lko 3.2 4.2 v notes : 1. the i cc current listed is typically less than 2ma/mhz, with /oe at v ih . 2. i cc active while embedded algorithm (program or erase) is i n progress 3. maximum icc current specifications are tested with vcc=vcc max erase and programmin g performance limits parameter min. typ. max. unit comments sector erase time - 1 8 sec excludes 00h programming prior to erasure
hanbit HMF51232J4 url: www.hbe.co.kr h anbit electronics co., ltd. rev.02(august,2002) 4 byte programming time - 7 3 00 us excludes system - level overhead chip programming time - 3.6 10.8 sec excludes system - level overhead capacitance parameter symbol parameter descrip tion test setup typ. max unit c in input c apacitance v in = 0 4 6 pf c out output capacitance v out = 0 8 12 pf c in2 control pin capacitance v in = 0 8 12 pf notes : test conditions t a = 25 o c, f=1.0 mhz. ac characteristics u read only operations characteristics parameter symbols jedec standard descrip tion test setup - 55 - 90 unit t avav t rc read cycle time min 55 90 ns t avqv t acc address to output delay /ce = v il /oe = v il max 55 90 ns t elqv t ce chip enable to output delay /oe = v il max 55 90 ns t glqv t oe chip enable to output delay max 30 35 ns t ehqz t df chip enable to output high - z max 18 2 0 ns t ghqz t df output enable to output high - z max 18 20 ns t axqx t qh output hold time from addresses, /ce or /oe, whichever occurs first min 0 0 ns notes : test conditions : output load : 1ttl gate and output load capacitance 100 pf , in case of 55ns - 30pf input rise and fall times : 5 ns , in case of 55ns - 5ns input pulse levels : 0 .45 v to 2 . 4 v , in case of 55ns - 0.0v - 3.0v timing measurement reference level input : 0.8 v , incase of 55ns - 1.5v output : 2.0 v , in case of 55ns - 1.5v
hanbit HMF51232J4 url: www.hbe.co.kr h anbit electronics co., ltd. rev.02(august,2002) 5 u erase/program operations parameter symbols jedec standard description - 55 - 90 unit t avav t wc write cycle time min 55 90 ns t avwl t as address setup time min 0 0 ns t wlax t ah address hold time min 40 45 ns t dvwh t ds data setup time min 25 45 ns t whdx t dh data hold time min 0 0 ns t oes output enable setup time min 0 0 ns t ghwl t ghwl read recover time before write min 0 0 ns t elwl t cs /ce setup time m in 0 0 ns t wheh t ch /ce hold time min 0 0 ns t wlwh t wp write pulse width min 30 4 5 ns t whwl t wph write pulse width high min 20 2 0 ns t whwh1 t whwh1 byte programming operation typ 7 7 m s t whwh2 t whwh2 sector erase operation (note1) typ 1 1 sec t v cs vcc set up time min 50 50 m s notes : 1. this does not include the preprogramming time 2. this timing is only for sector protect operations 5.0 v device under test 2.7k w diodes = in3064 or equivale nt 6.2k w in3064 or equivalent c l note : c l = 100pf including jig capacitance
hanbit HMF51232J4 url: www.hbe.co.kr h anbit electronics co., ltd. rev.02(august,2002) 6 u erase/program operations alternate /ce controlled writes paramete r symbols jedec standard description - 55 - 90 unit t avav t wc write cycle time min 55 90 ns t avel t as address setup time min 0 0 ns t elax t ah address hold time min 40 45 ns t dveh t ds data setup time min 25 45 ns t ehdx t dh data hold time m in 0 0 ns t oes output enable setup time min 0 0 ns t ghel t ghel read recover time before write min 0 0 ns t wlel t ws /we setup time min 0 0 ns t ehwh t wh /we hold time min 0 0 ns t eleh t cp /ce pulse width min 30 4 5 ns t ehel t cph /ce pulse wi dth high min 2 0 2 0 ns t whwh1 t whwh1 byte programming operation typ 7 7 m s t whwh2 t whwh2 sector erase operation (note) typ 1 1 sec notes : this does not include the preprogramming time.
hanbit HMF51232J4 url: www.hbe.co.kr h anbit electronics co., ltd. rev.02(august,2002) 7 u read operations timing u reset timing
hanbit HMF51232J4 url: www.hbe.co.kr h anbit electronics co., ltd. rev.02(august,2002) 8 u program operations timing u chip/sector erase operation timings
hanbit HMF51232J4 url: www.hbe.co.kr h anbit electronics co., ltd. rev.02(august,2002) 9 u data# polling times(during embedded algorithms) u toggle# bit timings (during embedded algorithms)
hanbit HMF51232J4 url: www.hbe.co.kr h anbit electronics co., ltd. rev.02(august,2002) 10 u sector protect unprotect timeing diagram u alternate ce# controlled write operating timings
hanbit HMF51232J4 url: www.hbe.co.kr h anbit electronics co., ltd. rev.02(august,2002) 11 package dimensions o r dering information part number density org. package component number vcc speed HMF51232J4 - 55 2mbyte 512k 32bit 68pin - jlcc 4ea 5.0v 55ns HMF51232J4 - 70 2mbyte 512k 32bit 68 pin - jlcc 4ea 5.0v 70ns HMF51232J4 - 90 2mbyte 512k 32bit 68 pin - jlcc 4ea 5.0v 90ns HMF51232J4 - 120 2mbyte 512k 32bit 68 pin - jlcc 4ea 5.0v 120ns 23.67 0 .20 mm 24.94 0 .20 mm 4.30 0 .20 mm 1.278 0 .20 mm 0.46 0 .20 mm

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