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  Datasheet File OCR Text:
  geometry process details principal device types cedm7004 gross die per 6 inch wafer 95,400 process CP394R small signal mosfet transistor n-channel enhancement-mode transistor chip die size 15.7 x 15.7 mils die thickness 3.9 mils gate bonding pad area 3.9 x 3.9 mils source bonding pad area 9.1 x 8.1 mils top side metalization al-si - 35,000? back side metalization au - 12,000? www.centralsemi.com r1 (22-march 2010)
process CP394R typical electrical characteristics www.centralsemi.com r1 (22-march 2010)


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