r em4100 copy right ? 2004, em microelectronic-marin sa 1 www. e m m i c r o e l e c t r o n i c . c o m em microelectronic - marin sa read only contactless identification device description t he em4100 (previously named h4100) is a cmos integrated circuit for use in electronic read only rf t r ansponders. t he circuit is pow ered by an external coil placed in an electromagnetic field, and gets its master clock from the same field via one of the coil terminals. by turning on and off the modulation current, the chip w ill send back the 64 bits of information contained in a factor y pre- programmed memory array . t he programming of the chip is performed by laser fusing of poly s ilicon links in order to store a unique code on each chip. t he em4100 has several metal options w h ich are used to define the code ty pe and data rate. data rates of 64, 32 and 16 periods of carrier frequency per data bit are available. data can be c oded as manchester, biphase or psk. due to low pow er consumption of the logic core, no supply buffer capacitor is required. only an external coil is needed to obtain the chip function. a parallel resonance capacitor of 74 pf is also integrated. features 64 bit memory array laser programmable several options of data rate and coding available on chip resonance capacitor on chip supply buffer capacitor on chip voltage limiter full w a ve rectifier on chip large modulation depth due to a low impedance modulation device operating frequency 100 - 150 khz very small chip size convenient for implantation very low pow er consumption applications logistics automation anticounterfeiting access control industrial transponder ty pical operating configuration c o il1 c o il2 em410 0 l: ty pical 21.9mh for fo = 125khz fig. 1 pin assignment em4100 coi l 1 coil2 vdd vss coil1 coil terminal / clock input coil2 coil terminal fi g. 2
r em4100 copy right ? 2004, em microelectronic-marin sa 2 www. e m m i c r o e l e c t r o n i c . c o m absolute maximum ratings pa ra me te r s y m b o l conditions max i mum dc current forced on coil1 & coil2 pow e r supply storage t e mp. die form storage t e mp. pcb form electrostatic discharge maximum to mil-st d-883c method 3015 i coil v dd t store t store v esd 30ma -0.3 to 7.5v -55 to + 200c -55 to + 125c 1000v stresses above these listed maximum ratings may cause permanent damage to the device. exposure bey ond specified operat ing conditions max affect device reliability or cause malfunction. operating conditions pa ra me te r s y m b o l m i n . ty p . ma x . units operating t e mp. max i mum coil current ac voltage on coil supply f r equency t op i coil v coil f coil -40 3 100 14* + 85 10 150 c ma vpp khz *) t he ac voltage on coil is limited by the on chip voltage limitation circuitry . t h is is according to the parameter i coil in the absolute maximum ratings. handling procedures t h is device has built-in pr otection against high static voltages or electric fiel ds; how ever due to the unique properties of this device, ant i-static precaut ions should be taken as for any other cmos component. sy stem principle antenna driv e r oscill a t or dem odulator filter and gain data de coder data receiv ed f r o m transponder trance iv er tr anspon der coil 1 coil 2 em4100 si gnal on coi l s t r ansponder coi l t r anse i v e r coil rf carri er data fig. 3
r em4100 copy right ? 2004, em microelectronic-marin sa 3 www. e m m i c r o e l e c t r o n i c . c o m electrical characteristics v dd = 1.5v, v ss = 0v, f c1 = 134khz square wave, t a = 25c v c1 = 1.0v with positive peak at v dd and negative peak at v dd -1v unless otherwise specified p a r a m e t e r s y m b o l t e s t c o n d i t i o n s m i n . ty p . m a x . u n i t s supply voltage rectified supply voltage coil1 - coil2 capacitance pow e r supply capacitor v dd v ddre c c re s c sup v coil1 - v coil2 = 2.8 vdc modulator sw itch = ?on? v coil = 100mvrms f= 10khz 1.5 1.5 74 2) 120 1) v v pf pf bip h ase & man c h ester ve rs ions supply current c2 pad modulator on voltage drop c1 pad modulator on voltage drop i dd v onc2 v onc1 v dd =1.5v i v ddc2 = 100a w i th ref. to v dd v dd =5.0v i v ddc2 =1ma w i th ref. to v dd v dd =5.0v i v ddc1 =1ma w i th ref. to v dd 0.9 2.1 2.1 0.63 1.1 2.3 2.3 1.5 1.3 2.8 2.8 a v v v psk version supply current psk c2 pad modulator on voltage drop i d d psk v onc2 p s k v dd =1.5v i v ddc2 = 100a w i th ref. to v dd 0.3 0.92 0.6 2 0.9 a v note 1) the maximum voltage is defined by forcing 10ma on coil1 - coil2 note 2) the tolerance of the resonant capac itor is 15% over the w hole production. optional reduced tolerance on request on a w a fer basis, the tolerance is 2% timing characteristics v dd = 1.5v, v ss = 0v, f coil = 134khz square w a ve, t a = 25c v c1 = 1.0v w i th positive peak at v dd and negative peak at v dd -1v unless otherw i se specified t i mings are derived from the field frequency and are specified as a number of rf periods. pa ra me te r s y m b o l te s t conditions va lue units read bit period t rd b depending on option 64, 32, 16 rf periods timing wav e forms bi t n bit n+ 1 b it n+ 2 6 4 , 32 or 1 6 t oc , dep end ing o n opt ion t oc co il1 serial d a ta o u t fi g. 4
r em4100 block diagram clo c k e x tr a c to r full w ave re ct ifi e r da t a mo du lat o r s e q uence r da t a e ncode r memo ry arra y lo gic cl oc k ser i al data o u t modul ati o n control cr es coi l 1 coil2 ac 1 ac 2 + - cs u p vd d vs s a a: open only f o r psk v e rsion fig. 5 functional description general t he em4100 is supplied by means of an elect r omagnet ic f i eld induced on t he at t a ched coil. t he ac volt age is rect if ied in order t o provide a dc int e rnal supply volt age. when the last bit is sent, the ch ip w ill continue w i th the first bit until the pow er goes off. full wav e rectifier t he ac input induced in t he ext e rnal coil by an incident magnet ic f i eld is rect if ied by a graet z bridge. t he bridge w ill limit the internal dc vo ltage to avoid malfunction in st rong f i elds. clo ck extracto r one of t he coil t e rminals (coi l1) is used t o generat e t he mast er clock f o r t he logic f unct i on. t he out put of t he clock ext r act o r drives a sequencer. se que nc e r t he sequencer provides all necessary signals t o address t he memory array and t o encode t he serial dat a out . t h ree mask programmed encoding versions of logic are available. t hese t h ree enc oding t y pes are manchest e r, biphase and psk. t he bit rate for the first and the second t y pe can be 64 or 32 periods of t he f i eld f r equency . f o r t he psk version, the bit rate is 16. t he sequencer receives it s clock f r om t he coi l1 clock extractor and generates every in ternal signal controlling the memory and t he dat a encoder logic. da ta modula t or t he dat a modulat or is cont rolled by t he signal modulat ion cont rol in order t o induce a high current in t he coil. i n t he psk version, only coil2 transistor drives this high current. i n t he ot her versions, bot h coil1 and coil2 t r ansist o rs drive it to vdd. t h is w ill affect the magnetic field according to the dat a st ored in t he memory array . reso n a n ce cap acito r t h is capacit or can be t r immed in f a ct ory by 0. 5pf st eps t o achieve t he absolut e value of 74pf t y pically . t h is opt ion, w h ich is on request , allow s a smaller capacit or t o lerance on t he w hole of t he product i on. copy right ? 2004, em microelectronic-marin sa 4 www. e m m i c r o e l e c t r o n i c . c o m
r em4100 memo ry a rray fo r man c h ester & bi-ph ase en co d i n g ics t he em4100 cont ains 64 bit s divided in f i ve groups of inf o rmat ion. 9 bit s are used f o r t he header, 10 row parit y bit s (p0-p9), 4 column parit y bit s (pc0-pc3), 40 dat a bit s (d00-d93), and 1 st op bit set t o logic 0. 1 1 1 1 1 1 1 1 1 9 h e a d e r bits 8 version bits or d00 d01 d02 d03 p0 customer i d d 1 0 d 1 1 d 1 2 d 1 3 p 1 d 2 0 d 2 1 d 2 2 d 2 3 p 2 32 data bits d30 d31 d32 d33 p3 d 4 0 d 4 1 d 4 2 d 4 3 p 4 d 5 0 d 5 1 d 5 2 d 5 3 p 5 d 6 0 d 6 1 d 6 2 d 6 3 p 6 d 7 0 d 7 1 d 7 2 d 7 3 p 7 d 8 0 d 8 1 d 8 2 d 8 3 p 8 d 9 0 d 9 1 d 9 2 d 9 3 p 9 10 line parity p c 0 p c 1 p c 2 p c 3 s 0 b i t s 4 column parity bits t he header is composed of t he 9 f i rst bit s w h ich are all mask programmed t o "1". due t o t he dat a and parit y organisat i on, t h is sequence cannot be reproduced in t he dat a st ring. t he header is f o llow ed by 10 groups of 4 dat a bits allow i ng 100 billion combi nations and 1 even row parity bit . t hen, t he last group consist s of 4 event column parit y bit s w i t hout row parit y bit . s0 is a st op bit w h ich is w r it t en t o "0" bit s d00 t o d03 and bit s d10 t o d13 are cust omer specif ic ident if icat ion. t hese 64 bit s are out put t ed serially in order t o cont rol t he modulat or. when t he 64 bit s dat a st ring is out put t ed, t he out put sequence is repeat ed c ont inuously unt il pow er goes o ff. memory a rray for psk encoding ics t he psk coded ic' s are programmed w i th odd parity for p0 and p1 and alw a y s w i t h a logic zero. t he parit y bit s f r om p2 t o p9 are even. t he column parit y pc0 t o pc3 are calculat ed including t he version bit s and are even parit y bit s . co d e descrip tio n man c h ester t here is alw a y s a t r ansit ion f r om on t o of f or f r om of f t o on in t he middle of bit period. at t he t r ansit ion f r om logic bit ?1? t o logic bit ?0? or logic bit ?0? t o logic bit ?1? t he phase change. value high of dat a st ream present ed below modulat or sw it ch of f , low represent s sw it ch on (see fig . 6). bip h ase co d e at the beginning of each bit, a tr ansition w ill occur. a logic bit ?1? w ill keep its state fo r the w hole bit duration and a logic bit ?0? w ill show a transit ion in the middle of the bit durat ion (see fig . 7). psk code modulat ion sw it ch goes on and of f alt e rnat ely every period of carrier f r equency . when a phase shif t occurs, a logical "0" is read f r om t he memory . i f no shif t phase occurs af t e r a dat a rat e cy cle, a logical "1" is read (see fig . 8). ma nc he s t e r code x 1 1 1 1 1 1 1 1 1 0 1 0 1 0 0 0 1 1 0 m odu lation c ontrol "low " m eans h igh current bin a ry da ta m e mory o u tput m o dulato r contro l fig. 6 copy right ? 2004, em microelectronic-marin sa 5 www. e m m i c r o e l e c t r o n i c . c o m bip h ase co d e 0 110 1 001 binary data m e mo ry ou tput m odul ator c ontro l m o d u latio n co ntrol "low " mea n s hi gh cu rrent fig. 7
r em4100 psk code "0" on s e r ia l o u t "1" on s e r ia l o u t m o dulato r contro l coil 1 se rial da ta o u t m odul ation co ntrol "l ow " me ans hig h curre nt fig. 8 ty pical performance characteristics ty pic a l ca pa c i tor va ria t ion v e rs us te mpe r a t ure 99. 6 99. 8 100 100 .2 100 .4 100 .6 100 .8 101 -5 0 - 25 0 2 5 5 0 7 5 1 00 te m p e r atu r e [c] resonnance capacitor [%] fi g. 9 l v e rs us re s ona nc e fre que nc y v e rs us for a ty pic a l co il cap acitan ce o f 74 p f 10 15 20 25 30 35 40 100 110 120 130 140 150 fr equ e ncy [kh z ] lcoi l [mh] copy right ? 2004, em microelectronic-marin sa 6 www. e m m i c r o e l e c t r o n i c . c o m fig. 11 dy na mic cons umption ve rs us te mpe r a t ure w i th vdd- vss= 1.5v 0 0. 2 0. 4 0. 6 0. 8 1 1. 2 1. 4 -50 - 25 0 2 5 5 0 7 5 100 temperatu r e [ c ] id yn [ a ] manc hes ter and b i phase psk fig. 10 rectified vo ltag e v e rsu s temp eratu r e fo r vcoil2-vcoil1=2.8v 1.65 1.7 1.75 1.8 1.85 1.9 1.95 2 -50 - 25 0 2 5 5 0 7 5 100 t e m p erat ure [c ] vddr ec [v] fig. 12
r em4100 chip dim e nsions em4100 all dim ens ions in m y x 1016 1 041 14 2 378 14 716 747 517 499 vs s , vdd pad s i z e : 76 x 76 c1 , c2 pad s i z e : 95 x 9 5 fig. 13 f f g c2 c1 ma rk i n g are a d a b e j k fro n t v i e w t o p vi ew r y x z sym b o l m i n t y p m ax x8 . 0 y4 . 0 z1 . 0 d i m e ns i o ns a r e i n m m d i m ens ions a r e i n m m cid pa ckage pcb pack age c2 c 1 sym bo l m i n t y p m ax a8 . 2 8 . 5 8 . 8 b3 . 8 4 . 0 4 . 2 d5 . 8 6 . 0 6 . 2 e 0 .3 8 0 .5 0 . 6 2 f 1 .2 5 1 .3 1 . 3 5 g0 . 3 0 . 4 0 . 5 j 0 .4 2 0 .4 4 0 .4 6 k 0 . 1 15 0. 1 2 7 0 . 1 3 9 r0 . 4 0 . 5 0 . 6 fig. 14 fig. 15 copy right ? 2004, em microelectronic-marin sa 7 www. e m m i c r o e l e c t r o n i c . c o m
r em4100 ordering information packaged dev i ces t h is chart show s general of f e ring; f o r det ailed part number t o order, please see t he t able ?st andard versions? below . - v ersi on: custom er v e rsi o n: a6 = m a n c h e s te r , 6 4 cl o cks p e r b i t %%% = o n l y fo r cu sto m s p e c ific v e r s io n a5 = m a n c h e s te r , 3 2 cl o cks p er bi t b6 = bi- p h a s e , 6 4 cl o cks p er bi t b5 = bi- p h a s e , 3 2 cl o cks p er bi t c 4 = psk, 1 6 clo cks p er bi t p acka g e/ card & del i v er y fo r m : ci 2lc = ci d p a c k , 2 p in s ( le n g t h 2. 5m m ) , in b u l k ci 2lb = ci d p a c k , 2 p in s ( le n g t h 2. 5m m ) , in ta p e & reel c b 2 r c = pc b pa cka g e, 2 p in s , in b u l k c i 2lc %%% em 4100 a6 die form t h is chart show s general of f e ring; f o r det ailed part number t o order, please see t he t able ?st andard versions? below . - v ersi on: custom er v e rsi on: a6 = m a n c h e s te r , 6 4 cl o cks p e r b i t %%% = o n l y fo r cu sto m s p e c ific v e r s io n a5 = m a n c h e s te r , 3 2 cl o cks p er bi t b6 = bi- p h a s e , 6 4 cl o cks p er bi t bu m p in g : b5 = bi- p h a s e , 3 2 cl o cks p er bi t " " ( bl ank ) = no bum p s c 4 = psk, 1 6 cl o cks p e r b i t e = w i th g o ld bu m p s ( not e 2 ) di e form : t hi ckness: ww = wa f e r 7 = 7 m i l s ( 178um ) w s = s a w n w a f e r/ fram e 11 = 11 m i l s ( 280um ) wt = s t i c k y ta p e 27 = 27 m i l s ( 686um ) wp = wa f f l e p a c k ( not e 1 ) e %%% em 4100 a6 w s 11 remarks: ? f o r ordering please use t able of ?st andard version? t able below . ? f o r specif icat ions of delivery f o rm, including gold bumps, t ape and bulk, as w e ll as possible ot her delivery f o rm or packages, please cont act em microelect r onic-marin s. a. ? note 1: t h is is a non-standard package. please contact em microelectronic- marin s.a for availability . ? note 2 : direct connect i on using t h is version is subject t o license. please cont act i nfo@emmicroelectronic.com copy right ? 2004, em microelectronic-marin sa 8 www. e m m i c r o e l e c t r o n i c . c o m
r em4100 standard versions: t he versions below are considered st andards and should be readily available. f o r ot her versions or ot her delivery f o rm, please cont act em microelect r onic-marin s. a. sales of f i ce. please make sure t o give complet e part number w hen ordering, w i t hout spaces . par t number bit coding cy cle/ bit package/card/die form deliv ery form / bum p ing em4100 a5cb2rc manchester 32 pcb package, 2 pi ns bul k em4100 a5ci2lc manchester 32 cid package, 2 pi ns (l ength 2.5mm) bul k em4100 a6cb2rc manchester 64 pcb package, 2 pi ns bul k em4100 a6ci2lb manchester 64 cid package, 2 pi ns (l ength 2.5mm) tape em4100 a6ci2lc manchester 64 cid package, 2 pi ns (l ength 2.5mm) bul k em4100 a6wp7 manchester 64 di e i n w a ffl e pack, 7 mi l s no bumps em4100 a6ws7 manchester 64 saw n w a fer, 7 mi l s no bumps em4100 a6wt7 manchester 64 di e on sti cky tape, 7 mi l s no bumps em4100 a6ww7 manchester 64 unsaw n w a fer, 7 mi l s no bumps em4100 b5cb2rc bi -phase 32 pcb package, 2 pi ns bul k em4100 b5ci2lc bi -phase 32 cid package, 2 pi ns (l ength 2.5mm) bul k em4100 b6cb2rc bi -phase 64 pcb package, 2 pi ns bul k em4100 b6ci2lc bi -phase 64 cid package, 2 pi ns (l ength 2.5mm) bul k em4100 c4ws11 psk 16 saw n w a fer, 11 mils thickness no bumps em4100 x x yyy- %%% c u s t o m c u s t o m c u s t o m product support check our web sit e under product s / r f i dent if icat ion sect ion. quest i ons can be sent t o inf o @emmicroelect r onic. com em microelectronic-marin sa cannot assume responsibility for use of any circ uitry described other than circuitry entirely embod i e d i n an em mi croel ectroni c-mari n sa product. em mi croel ectroni c-mari n sa reserv es the ri ght to change the ci rc ui try and speci f i c ati ons w i t hout noti c e at any ti me. y ou are strongl y urged to ensure that the i n formati on gi ven has not been superseded by a more up-to-date versi on. ? em mi croel ectroni c-mari n sa, 0804 rev. g copy ri ght ? 2004, em mi croel ectroni c-mari n sa 9 www. e m m i c r o e l e c t r o n i c . c o m
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