100 hz 1 khz 10 khz 100 khz 0 -40 -80 -120 -160 -200 psn1720a telecommunications satellite telemetry 5 33 1690 -70 -104 -15 6 4 -40 to 85 frequency range harmonic suppression (2nd, typ.) sideband spurs (typ.) switching speed (typ., adjacent channel) startup lock time (typ.) operating temperature range package style pll mhz dbc dbc msec msec c vdc ma supply voltage (vcc, nom.) supply current (icc, typ.) all specifications are typical unless other wise noted and subject to change without notice. phase noise (1 hz bw, typical) ? z-communications, inc. all rights reserved page 1 phase locked loop features applications performance specifications value units power supply requirements application notes 1690 mhz ? step size: 50 khz - style package pll ? ? ? ? a1 rev ? an-107 : how to solder z-comm vcos / plls ? an-200 : mounting and grounding of z-comm plls ? an-201 : pll fundamentals an-202 : pll functional description notes: reference oscillator signal: 5 mhz< <40 mhz frequency synthesizer: national semiconductor - lmx2326 9939 via pasar ? san diego, ca 92126 tel (858) 621-2700 fax (858) 621-2722 power output 3.52.5 dbm load impedance 50 step size 50 khz 1000 1760 - ? frequency range: - 1760 charge pump output current phase noise @ 10 khz offset (1 hz bw, typ.) dbc/hz
low cost - high performance phase locked loop ? z-communications, inc. page 2 printed in the u.s.a. psn1720a vco power curve, typ. page 2 physical dimensions bottom 0.841 0.816 0.668 0.495 0.321 0.148 -0.025 0.000 0.605 0.580 0.450 0.290 0.130 -0.025 0.000 see detail a see detail b 10 11 9 8 1 2 3 4 5 6 7 14 13 12 0.140 .032 notes: the inside radius of all 14 half holes at the perimeter of the board are plated to provide a surface for the attachment of the pll module to a pcb, in 11 locations, with 3 pads being used for electromechanical interface. 2. the surface of the shield is tin plated and may be soldered to. the shield's 3. the ground plane is ground and attaches to a ground track on the upper side of the board as well as the shield by pth. 1. 14 solder locations required. base metal is cold rolled steel. .xxx= .010 tolerances 4. unless otherwise noted all dimensions are in inches. 5. unless otherwise noted all tolerances are as follows: .015 .030 .070 detail b (typ) p1 rf output p2 ground p3 reference oscillator input p4 clock p5 data p6 load enable p7 lock detect p8 vcc p9 optional p10 no connection p11-14 ground tabs range: see note 5. (4 places) detail a pll 415-0078 rev. f (drawing not to scale) c 25 vco tuning curve, typ. frequency (mhz) tuning voltage (vdc) c 25 c 0 c 70 frequency (mhz) output power (dbm)
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