1/4 rev. d structure s ilicon monolithic integrated circuit product name multi-channel power ic type ? features ? built-in 5-channel outputs for tft-lcd display ? built-in vcom amp absolute maximum ratings (ta=25) parameter symbol limits unit supply voltage 1 vcc,pvcc2,3 15 v supply voltage 2 ldvcc1 7 v supply voltage 3 hvcc 20 v sw1 voltage vsw1 22 v junction temperature tjmax 150 power dissipation pd 4826*1 mw operating temperature range topr -40 105 storage temperature range ts t g - 5 5 150 *1 decreased in done 38.6mw/ for operating above taR25, mounted on 70701.6mm 4 layer glass-epoxy pcb.(back foil 70.0 mm70.0mm) operating conditions (ta=-40 +105 ) parameter symbol min max unit supply voltage 1 vcc,pvcc2,3 4.2 14 v supply voltage 2 ldvcc1 - 5.5 v supply voltage 3 hvcc 6 18 v sw1 voltage vsw1 - 18 v status of this document the japanese version of this do cument is the formal specificati on. a customer may use this translation version only for a referenc e to help reading the formal version. if there are any differences in translation version of this doc ument, formal version takes priority.
2/4 rev. d electrical characteristics unless otherwise specified , ta=25 ,vcc=12v,hvcc=15v parameter symbol limit unit condition min typ max dc/dc block feed back voltage 1 vfb1 1.230 1.250 1.270 v feed back voltage 2 vfb2 1.225 1.250 1.275 v feed back voltage 3 vfb3 0.882 0.900 0.918 v fb input bias current ifb -1.2 0.1 1.2 ua comp source current icso 15 40 65 ua comp sink current icsi -65 -40 -15 ua max duty mdt 80 90 - % ldo1,ldo3 block ldo feed back voltage ldfb 1.231 1.25 1.269 v drop voltage 1 dpld1 - 0.3 1.0 v ldfb1=1.0v, io=500ma drop voltage h dpldh - 0.4 0.9 v ldfb_h=1.0v, io=100ma charge pump block feed back voltage cpfb 1.225 1.25 1.275 v drop voltage 1 dpcpp 0.14 0.35 0.78 v io=100ma drop voltage 2 dpcpn 0.28 0.7 1.55 v io=100ma operational amplifier block input offset voltage voff -15 0 15 mv vcom output current icom 60 150 - ma load regulation S vo -15 1 15 mv io=+1ma -1ma maximum output voltage voh hvcc-1.0 hvcc-0.8 - v io=-1ma, in=hvcc-0.8v minimum output voltage vol - 0.1 0.16 v io=1ma, in=0v whole reference voltage vref 2.46 2.53 2.60 v oscillation frequency fsw 550 650 750 khz uvlo voltage uvlo 0.88 - 1.17 v average supply current ( vcc,pvcc2,3) icc - 5 11 ma no switching average supply current (hvcc) hicc - 1.0 4 ma no switching this product is not designed for protection against radioactive rays. physical dimension?marking (vqfn048v7070) bd8165 lot no markin g (unit:mm)
3/4 rev. d block diagram pin no. & function table pin no. pin name function pin no. pin name function 1 boot3 boot strap terminal 3 25 comp1 error amp output 1 2 pg3 power good output 3 26 fb1 feed back input 1 3 dtc3 duty control input 3 27 ctl1 control input 1 4 comp3 error amp output 3 28 scp short protection current output 5 fb3 feed back input 3 29 vcc power supply input 6 pvcc3 power supply input 30 uvlo uvlo input 7 ldfb_h ldo feed back input h 31 vref reference voltage output 8 ldo_h ldo output h 32 fb2 feed back input 2 9 in+ com input + 33 comp2 error amp output 2 10 in- com input - 34 dtc2 duty control input 2 11 vcom com output 35 pvcc2 power supply input 12 cpfb2 charge pump feed back input 2 36 boot2 boot strap terminal 2 13 c2 charge pump input2 37 pg2 power good output 2 14 vcp2 charge pump ldo output 2 38 sw2 power switch output 2 15 hvcc power supply input 39 ctl2 control input 2 16 vcp1 charge pump ldo output 1 40 reg boot strap regulator output 17 c1 charge pump output 1 41 ldfb1 ldo feed back input 1 18 cppg cp power good output 42 ldctl1 ldo1 control input 19 cpfb1 charge pump feed back input 1 43 ldpg1 ldo1 power good output 20 pgnd1 ground 44 ldo1 ldo output 1 21 pg1 power good output 1 45 ldvcc1 power supply input 22 sw1 power switch output 1 46 gnd ground 23 pgate pch gate drive output 47 ctl3 control input 3 24 dtc1 duty control input 1 48 sw3 power switch output 3 vref osc ldo 3 ` ? pgnd1 s w2 reg ldo1 sw3 gnd ldfb1 ldctl1 cpfb1 cppg c1 vcp1 hvcc cpfb2 vcp2 c2 sw1 pgate dtc1 comp1 fb1 scp uvlo vcc vref fb2 comp2 dtc2 boot2 pvcc2 in - in + fb3 comp3 dtc3 pg3 pvcc3 protect ?` ? reg ctl1 pg1 vcom ldpg1 ldo 1 R ` ctl2 hvcc ctl3 boot3 R` NR ` vref osc ldo 3 positive pgnd1 s w2 reg ldo1 sw3 gnd ldfb1 ldctl1 cpfb1 cppg c1 vcp1 hvcc cpfb2 vcp2 c2 sw1 pgate dtc1 comp1 fb1 scp uvlo vcc vref fb2 comp2 dtc2 boot2 pvcc2 in - in + fb3 comp3 dtc3 pg3 pvcc3 protect reg ctl1 pg1 vcom ldpg1 ldo 1 step down ctl2 hvcc ctl3 boot3 pg 2 ldfb_h ldd_h ldvcc1 converter step up converter charge pump charge pump negative step down converter
4/4 rev. d ? operation notes 1. absolute maximum range this product are produced with strict quality control, but might be destroyed in using beyond absolute maximum ratings. open ic destroyed a failure mode cannot be defined (like short mode, or open mode). therefore physical security countermeasure, like fuse, is to be given when a specified mode to be beyond absolute maximum ratings is considered. 2. ground potential gnd terminal should be a lowest voltage potential every state. please make sure all pins which is over ground even if include transient feature. 3. setting of heat use a setting of heat that allows for a sufficient margin in light of the power dissipation (pd) in actual operating conditions.. 4 . short circuit between terminal and soldering dont short-circuit between output pin and the power supply pin, output pin and gnd pin, or the power supply pin and gnd pin.when soldering the ic on circuit board, please be unusually cautious about the orientation and the position of the ic. when the orientation is mistaken the ic may be destroyed. 5 . electromagnetic field mal-function may happen when the device is used in the strong electromagnetic field. 6. ground wiring patterns when using both small signal and large current gnd patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. be careful not to change the gnd wiring patterns of any external components. 7. this ic is a monolithic ic which has p+ isolation in the p substrate and between the various pins. a p-n junction is formed from this p layer and the n layer of each pin. for example, when a resistor and a transistor is connected to a pin. parasitic diodes can occur inevitably in the structure of the ic. the operation of parasitic diodes can result in mutual interference among circuits as well as operation faults and physical damage. accordingly, you must not use methods by which parasitic diodes operate, such as applying a voltage that is lower than the gnd (p substrate) voltage to an input pin. 8. over current protection circuit the over-current protection circuits are built in at output, according to their respective current outputs and prevent the ic from being damaged when the load is short-circuited or over-current. but, these protection circuits are effective for preventing destruction by unexpected accident. when its in continuous protection circuit moving period dont use please. and for ability, because this chip has minus characteristic, be careful for heat plan. 9. built-in thermal circuit a temperature control circuit is built in the ic to prevent the damage due to overheat. therefore, all the outputs are turned off when the thermal circuit works and are turned on when the temperature goes down to the specified level. 10.testing on application boards when testing the ic on an application board, connecting a capacitor to a pin with low impedance subjects the ic to stress. always discharge capacitors after each process or step. ground the ic during assembly steps as an antistatic measure, and use similar caution when transporting or storing the ic. always turn the ic's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. 11.discontiguous mode the dc/dc converters of this ic are designed for being used in contiguous current mode, normally. the special consideration on adjusting the inductance or the resistive output load to avoid the discontiguous current mode should be properly done. parasitic diode resister pin? pin? parasitic diode or transistor substrate pin? parasitic diode pin? near-by other element parasitic diode or transistor simplified structure of bi-polar ic
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