lr12 lr12 high input voltage, adjustable 3-terminal linear regulator features 13.2 to 100v input voltage range stable with 100nf output capacitor adjustable 1.20 to 88v output regulation 5% reference voltage tolerance output current limiting, 50ma min. 10a typical adj current over temperature protection available in 3 different packages applications dc/dc smps startup circuits adjustable high voltage constant current sources industrial controls motor controls battery powered systems power supplies telecom applications led drivers automotive applications ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? general description the supertex lr12 is a high voltage, low output current, adjustable linear regulator. it has a wide operating input voltage range of 13.2 - 100v. the output voltage can be adjusted from 1.20 - 88v, provided that the input voltage is at least 12v greater than the output voltage. the output voltage can be adjusted by means of two external resistors r 1 and r 2 as shown in the typical application circuits. the lr12 regulates the voltage difference between vout and adj pins to a nominal value of 1.20v. the 1.20v is ampli?ed by the external resistor ratio r 1 and r 2 . an internal constant bias current of typically 10a is connected to the adj pin. this increases v out by a constant voltage of 10a times r 2 . the lr12 has current limiting and temperature limiting. the output current limit is 100ma maximum and the minimum temperature limit is 125c. an output short circuit current will therefore be limited to 100ma maximum. when the junction temperature reaches its temperature limit, the output current and/or output voltage will decrease to keep the junction temperature from exceeding its temperature limit. for smps start-up circuit applications, the lr12 turns off when an external voltage greater than the output voltage of the lr12 is applied to vout of the lr12. to maintain stability, a bypass capacitor of 100nf or larger and a minimum dc output current of 500a are required. lr12 typical application v in * *required for conditions where v in is less than v out . r1 r2 c2 c1 r load v out 1.2v to 88v 13.2v to 100v lr12 vout adj vin
2 lr12 ordering information pin con?gurations package options device 8-lead soic to-252 (d-pak) to-92 lr12 lr12lg-g lr12k4-g lr12n3-g -g indicates package is rohs compliant (green) absolute maximum ratings parameter value v in-adj -0.5v to +120v v out-adj -10v to +10v v in - v out -0.5v to +120v operating ambient temperature -40c to +85c operating junction temperature -40c to +125c storage temperature -65c to +150c absolute maximum ratings are those values beyond which damage to the device may oc - cur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. thermal characteristics package power dissipation @ t a = 25 o c jc ( o c/w) ja ( o c/w) to-252 2.0w 6.25 50 8-lead soic 1.8w - 55 * to-92 0.6w 125 170 notes: * mounted on fr4 board, 25mm x 25mm x 1.57mm sym parameter min typ max units conditions v in - v out input to output voltage difference 12 - 98.8 v --- v out overall output voltage regulation 1.14 1.20 1.26 v 13.2v < v in <100v, r 1 = 2.4k, r 2 = 0 v out line regulation - 0.003 0.03 %/v 15v < v in <100v, v out = 5.0v, i out = 0.5a load regulation - 1.4 3.0 % v in = 15v, v out = 5.0v, 0.5ma< i out <50ma temperature regulation -1.0 - +1.0 % v in = 15v, v out = 5.0v, i out = 10ma, -40 o c < t a < 85 o c electrical characteristics (test conditions unless otherwise speci?ed: -40 o c < t a < +85 o c) 8-lead soic (lg) vout vout vout vout nc adj vin nc to-252 (k4) vin adj vout adj vin vout product marking yy = year sealed ww = week sealed l = lot number = green packaging yyww lr12 l l l l yy = year sealed ww = week sealed l = lot number = green packagin g si yyww lr12k4 llllll l y = last digit of year sealed w = code for week sealed l = lot number = green packaging s i l r 1 2 y w l l to-92 (n3) to-252 (k4) 8-lead soic (lg) package may or may not include the following marks: si or package may or may not include the following marks: si or package may or may not include the following marks: si or to-92 (n3)
3 lr12 functional block diagram electrical characteristics (cont.) sym parameter min typ max units conditions i out output current limit 50 - 100 ma t j < 85 o c, v in - v out < 12v - - -0.5 t j < 125 o c, v in - v out < 100v minimum output current 0.5 - - ma includes r 1 and load current i adj adjust output current 5.0 10 15 a --- c2 minimum output load capacitance 100 - - nf --- dv out /d vin ripple rejection ratio 50 60 - db 120hz, v out = 5.0v t limit junction temperature limit 125 - - o c --- overtemp & overcurrent 10a 1.2v vin vout adj lr12 pass element 6.5v 1.0k current limit -40 -20 0 2 0 4 0 6 0 8 0 100 50 60 70 80 90 100 te mperature ( o c) i c (ma)
4 lr12 figure 3: high voltage adjustable constant current source figure 2: smps start-up circuit typical application circuits pwm ic v out 1 v out 2 + + - - v cc v aux fb lr12 v in =15v to 100v vout adj vin r i out = 1.20v r + - 100nf v in = 15v to 100v vout adj vin lr12 figure 1: high input voltage, 5.0v output linear regulator * required for conditions where v in is less than v out . lr12 v in =17v to 100v * r2 18.2k 1% c2 100nf c1 v out = 5.0v v out = 1.20v + i adj r2 1+ r2 r1 vout adj vin r load 16.5k r1 6.04k 1%
5 lr12 typical performance curves 13.2v 2.4k 100nf v out = 1.2v vout adj vin lr12 v out (v) t(junction) ( o c) t emperature v ariation -50 -25 0 2 5 5 0 7 5 100 125 1.00 1.05 1.10 1.15 1.20 1.25 1.30 6.04k 1% 18.2k 1% 100nf r load 25v i out v out = 5.0v lr12 vout adj vin v out (v) i out (ma) load regulation 0 5 10 15 20 25 30 35 40 45 50 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 5.25 5.30
6 lr12 typical performance curves (cont.) 6.04k 1% 18.2k 1% 100nf 1k 0v to 50v v out = 5.0v vout adj vin lr12 v out vs. v in v out (v) v in (v) 0 2 0 4 0 6 0 8 0 100 0 1 2 3 4 5 6 6.04k 1% 18.2k 1% 100nf r load 65v i out 20v p- p @ 120hz v out = 5.0v vout adj vin lr12 ripple rejection ripple rejection ratio (db) i out (ma) 0 1 0 2 0 3 0 4 0 5 0 -60 -61 -62 -63 -64 -65
7 lr12 typical performance curves (cont) line power up transient line power down transient 25v 18.2k 1% 100nf sw 100nf 10k 0v 100v v in lr12 vout adj vin v out = 5v 6.04k 1% 10k 509 lr12 vout adj vin 18.2k 1% 6.04k 1% load transient response line transient response load transient response, load = 509 line turn on/off response sw open closed v out 200mv/div v in 5v/div v in 50v/div v in 50v/div v in 5v/div v in 50v/div v in 5v/div
8 lr12 3-lead to-252 d-pak package outline (k4) note: although 4 terminal locations are shown, only 3 are functional. lead number 2 was removed. 1. 1 2 3 4 l4 l5 b b2 e d1 e1 l1 l seating plane a1 gauge plane d e vi ew b front v iew side v iew rear v iew vi ew b 1 h c2 a l3 l2 b3 note 1 symbol a a1 b b2 b3 c2 d d1 e e1 e h l l1 l2 l3 l4 l5 1 dimen - sion (inches) min .086 .000* .025 .030 .195 .018 .235 .205 .250 .170 .090 bsc .370 .055 .108 ref .020 bsc .035 .025* .045 0 o 0 o nom - - - - - - .240 - - - - .060 - - - - - max .094 .005 .035 .045 .215 .035 .245 .217* .265 .182* .410 .070 .050 .040 .060 10 o 15 o jedec registration to-252, variation aa, issue e, june 2004. * this dimension is not speci?ed in the original jedec drawing. the value listed is for reference only. drawings not to scale. supertex doc. #: dspd-3to252k4, version d081408.
9 lr12 8-lead soic (narrow body) package outline (lg) 4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch 1 8 seating plane gauge plane l l1 l2 e e1 d e b a a2 a1 seating plane a a to p v iew side v iew vi ew b vi ew b 1 note 1 (index area d/2 x e1/2) vi ew a-a h h note 1 symbol a a1 a2 b d e e1 e h l l1 l2 1 dimension (mm) min 1.35* 0.10 1.25 0.31 4.80* 5.80* 3.80* 1.27 bsc 0.25 0.40 1.04 ref 0.25 bsc 0 o 5 o nom - - - - 4.90 6.00 3.90 - - - - max 1.75 0.25 1.65* 0.51 5.00* 6.20* 4.00* 0.50 1.27 8 o 15 o jedec registration ms-012, variation aa, issue e, sept. 2005. * this dimension is not speci?ed in the original jedec drawing. the value listed is for reference only. drawings are not to scale. supertex doc. #: dspd-8solgtg, version h101708. note: this chamfer feature is optional. a pin 1 identi?er must be located in the index area indicated. the pin 1 identi?er can be: a molded mark/identi?er; an embedded metal marker; or a printed indicator. 1.
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate product liability indemnification insurance agreement. supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. website: http//www .supertex.com . ?2009 all rights reserved. unauthorized use or reproduction is prohibited . 1235 bordeaux drive, sunnyvale, ca 94089 te l: 408-222-8888 www .supertex.com lr12 (the package drawing(s) in this data sheet may not re?ect the most current speci?cations. for the latest package outline information go to http://www.supertex.com/packaging.htm l .) doc.# dsfp-lr12 b030509 3-lead to-92 package outline (n3) symbol a b c d e e1 e e1 l dimensions (inches) min .170 .014 ? .014 ? .175 .125 .080 .095 .045 .500 nom - - - - - - - - - max .210 .022 ? .022 ? .205 .165 .105 .105 .055 .610* jedec registration to-92. * this dimension is not speci?ed in the original jedec drawing. the value listed is for reference only. ? this dimension is a non-jedec dimension. drawings not to scale. supertex doc.#: dspd-3to92n3, version d080408. seating plane 1 2 3 front v iew side v iew bottom v iew e1 e d e1 l e c 1 2 3 b a
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