dc-dc converters non-isolated ddr/qdr memory bus termination module 1 new product file name: pthxx050y.pdf rev (02): 19 dec 2005 2 year warranty all specifications are typical at nominal input, v ref = 1.25 v, full load at 25 unless other wise stated. c in , c o1 and c o2 = typical value specifica tions the pthxx050y are a new series of non-isolated dc-dc converters designed specifically for bus termination in ddr and qdr memory applications. operating from either a 3.3 vdc, 5 vdc or 12 vdc input, the modules generate a v tt output that will source or sink up to 6 a of current to accurately track their v ref input. v tt is the r equir ed bus ter mination supply voltage, and v ref is the r efer ence voltage for the memory and chipset bus receiver comparators. v ref is usually set to half the v ddq power supply voltage. the pthxx050y series employs an actively switched synchronous rectifier output to provide state of the art stepdown switching conversion. the products are small in size and are an ideal choice where space, performance and high ef ficiency are desired. ? v tt bus termination output (output tracks the system v ref ) ? 6 a output current (8 a peak) ? 3.3 vdc, 5 vdc or 12 vdc input voltage ? ddr and qdr compatible ? on/off inhibit (for v tt standby) ? under-voltage lockout ? operating temperature range: -40 o to +85 ? ? efficiencies up to 88% ? output overcurrent protection (non-latching, auto-reset) ? point-of-load-alliance (pola) compatible ? available rohs compliant pthxx050y 3.3/5/12 vin single output output specifications output current all models (over ? ref range) continuous (see note 1) ? a repetitive pulse (see note 2) 8 a t racking range for v ref 0.55-1.8 v t racking tolerance to v ref (v tt - v ref ) -10 mv to +10mv (over line, load and temperature) ripple and noise 20 mhz bandwidth 20 mv pk-pk load transient response 80 ? settling time (see note 5) overshoot/undershoot 25 mv typ. output capacitance: non-ceramic values pth03050y 470 ? typ., 3,300 ? max. (see notes 5 and 6) PTH05050Y 470 ? typ., 3,300 ? max. pth12050y 940 ? typ., 3,300 ? max. ceramic values pth03050y 200 ? typ., 300 ? max. (see note 5) PTH05050Y 200 ? typ., 300 ? max. pth12050y 400 ? typ., 600 ? max. (see note 7) esr (non-ceramic) 4 m min input specifica tions input current no load 10 ma input voltage range pth03050y 2.95-3.65 vdc PTH05050Y 4.5-5.5 vdc pth12050y 10.8-13.2 vdc under voltage lockout: pth03050y vin increasing 2.45 v typ., 2.80 v max. vin decreasing 2.20 v min., 2.40 v typ. PTH05050Y vin increasing 4.30 v typ., 4.45 v max. vin decreasing 3.40 v min., 3.70 v typ. pth12050y vin increasing 9.5 v typ., 10.4 v max. vin decreasing 8.80 v min., 9.0 v typ. input specifications contd. input capacitance pth03050y and PTH05050Y 470 ? (see note 4) pth12050y 560 ? remote on/off active high general specifica tions efficiency pth03050y 88% typ. io = 4 a PTH05050Y 87% typ. pth12050y 84% typ. insulation voltage non-isolated switching frequency pth03050y 550- 650 khz PTH05050Y 550-650 khz pth12050y 200-300 khz appr ovals and en60950 standar ds ul/cul60950 material flammability ul94v-0 dimensions (l x w x h) 22.10 x 12.57 x 8.50 mm 0.870 x 0.495 x 0.335 in w eight 2.9 g (0.10 oz) mtbf telcordia sr-332 6,000,000 hours environmental specifications ther mal per for mance operating ambient, -40 o to +85 ? (see note 2) temperatur e non-operating -40 o to +125 ? msl (?uf fix only) jedec j-std-020c level 3 protection overcurrent threshold all models 12 a typ. (auto reset)
file name: pthxx050y.pdf rev (02): 19 dec 2005 for the most current data and application support visit www.artesyn.com/powergroup/products.htm dc-dc converters non-isolated ddr/qdr memory bus termination module 2 new product n n o o t t e e s s 1 rating is conditional on the module being directly soldered to a 4 layer pcb with 1 oz. copper. see the soa curves or contact the factory for appropriate derating. the pth03050y and PTH05050Y require no derating up to 85 operating temperature and natural convection air flow . 2 up to 10 ms pulse period at 10% maximum duty . 3 this contr ol pin has an inter nal pull-up to the input voltage v in. if it is left open-circuit the module will operate when input power is applied. a small low-leakage (<100 na) mosfet is recommended for control. for further information, consult application note 178. 4 an input capacitor is required for proper operation. the capacitor must be rated for a minimum of 300 ma rms (750 ma rms for 12 v input) of ripple current. 5 the typical value of exter nal output capacitance value ensur es that v tt meets the specified transient performance requirements for the memory bus ter minations. lower values of capacitance may be possible when the measur ed peak change in output cur r ent is consistently less than 3 a. test conditions were 15 a/ s load step, -1.5 a to +1.5 a. part number system with options pthxx050y 3.3/5/12 vin single output output input v tt output output efficiency model power voltage range current current (typ.) number (9,10) (max.) (min.) (max.) 10.8 w 2.95-3.65 vdc 0.55-1.8vdc 0 a 6 a 88% pth03050y 10.8 w 4.5-5.5 vdc 0.55-1.8vdc 0 a ? a 87% PTH05050Y 10.8 w 10.8-13.2 vdc 0.55-1.8vdc 0 a 6 a 84% pth12050y PTH05050Yast product family point of load alliance compatible output current 05 = 6 a packaging options no suffix = trays t = t ape and reel (8) input voltage 03 = 3.3 v , 05 = 5 v and 12 = 12 v mechanical package always 0 pin option a = through-hole std. pin length (0.140 a = sur face-mount t in/lead solder ball output voltage code y = ddr module mounting option (9) d = horizontal through-hole (matte sn) h = horizontal thr ough-hole (sn/pb) s = surface-mount (63/37 sn/pb pin solder material) z = surface-mount (96.5/3.0/0.5 sn/ag/cu pin solder material) 6 this is the calculated maximum. the minimum esr limitation will often r esult in a lower value. consult application note 178 for fur ther details. 7 this is the typical esr for all the electr olytic (non-ceramic) output capacitance. use 7 m as the minimum when using max esr values to calculate. 8 t ape and reel packaging only available on the surface-mount versions. 9 to order pb-free (rohs compatible) surface-mount parts replace the mounting option ?ith ??eg. pthxx050yaz. to order pb-free (rohs compatible) thr ough-hole par ts r eplace the mounting option ?ith ?? e.g. pthxx050yad. 10 notice: some models do not suppor t all options. please contact your local ar tesyn r epr esentative or use the on-line model number sear ch tool at http://www.artesyn.com/powergroup/products.htm to find a suitable alternative. international safety standard approvals ul/cul can/csa-c22.2 no. 60950 file no. e174104 tv product service (en60950) certificate no. b 04 06 38572 044 cb report and certificate to iec60950, certificate no. us/8292/ul
for the most current data and application support visit www.artesyn.com/powergroup/products.htm d c-dc converters non-isolated ddr/qdr memory bus termination module 3 new product file name: pthxx050y.pdf rev (02): 19 dec 2005 pthxx050y 3.3/5/12 vin single output figure 3 - efficiency vs load current v ref = 1.25 v (see note b) figur e 1 - safe operating ar ea v in = 3.3 v , v r ef = 1.25 v , iout = 6 a (see note a) n n o o t t e e s s a the soa curves represent the conditions at which internal components ar e within the ar tesyn derating guidelines. b characteristic data has been developed from actual products tested at 25 . this data is considered typical data for the converter. figur e 4 - standard application figur e 2 - safe operating ar ea v in = 12v , v r ef = 1.25 v , iout = 6 a (see note a) e f f i c i e n c y ( % ) output current (a) 50 60 70 80 90 100 012 3456 3.3v 5.0v 12.0v vin nat conv 20 3 0 40 50 60 70 80 90 0 123456 output current (c) a m b i e n t t e m p e r a t u r e ( o c ) nat conv 100 lfm 200 lfm 0 1 2 3 4 5 6 0 10 20 30 40 50 60 70 80 o u t p u t c u r r e n t ( a ) ambient temperature (o) 8 4 5 1 2 3 6 pthxx050y ( top view) gnd vin standby v d dq 1k 1k 1 % 1% c in ( requi red) bss138 (optional) + + co 1 low-esr (requi red) co 2 ceramic (optional) co n hf-ceramic sstl-2 data/ add ress/ bus v t t t e r m i n a t i o n i s l a n d v tt v ref q 1
file name: pthxx050y.pdf rev (02): 19 dec 2005 please consult our website for the following items: 4 application note www.artesyn.com datasheet ?artesyn technologies ? 2005 the infor mation and specifications contained in this datasheet ar e believed to be cor rect at time of publication. however, artesyn technologies accepts no responsibility for consequences arising from printing errors or inaccuracies. the information and specifications contained or described herein are subject to change in any manner at any time without notice. no rights under any patent accompany the sale of any such product(s) or information contained herein. for the most current data and application support visit www.artesyn.com/powergroup/products.htm d c-dc converters non-isolated ddr/qdr memory bus termination module 4 new product figure 5 - plated through-hole mechanical drawing figur e 6 - sur face-mount mechanical drawing pthxx050y 3.3/5/12 vin single output *denotes negative logic: open = normal operation ground = function active pin connections pin no. function 1 gr ound 2v ref 3v i n 4 inhibit* 5 n/c 6v tt dimensions in inches (mm) tolerances (unless otherwise specified) 2 places 0.030 ( 0.76) 3 places 0.010 ( 0.25) 0.870 (22.10) 0.495 top view side view 4 1 6 solder ball ? 0.040 (1.02) 6 places 0.750 (19.06) (1.52) 0.060 (1.52) 0.060 (12.57) 3 (3.18) 0.125 5 2 (3.18) 0.125 0.125 (3.18) 0.375 (9.52) *after solder reflow on customer board 0.335 (8.50) max.* host board lowest component 0.010 min. (0.25) bottom side clearance dimensions in inches (mm) tolerances (unless otherwise specified) 2 places 0.030 ( 0.76) 3 places 0.010 ( 0.25) t op view side view 0.870 (22.10) 6 3 5 4 1 2 max. 0.335 (8.50) h ost board 0.495 ( 12.57) ? 0.040 (1.02) 6 places 0.750 (19.06) 0 .125 (3.18) 0.125 (3.18) 0.125 (3.18) (1.52) 0.060 (9.52) 0.375 ( 1.52) 0.060 ( 3.55) 0 .140 lowest component 0.010 min. (0.25) bottom side clearance 0.070 (1.78) (standoff shoulder)
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