FDMC7692S n-channel power trench ? syncfet tm ?2009 fairchild semiconductor corporation FDMC7692S rev.c1 www.fairchildsemi.com 1 december 2009 FDMC7692S n-channel power trench ? syncfet tm 30 v, 12.5 a, 9.3 m features max r ds(on) = 9.3 m at v gs = 10 v, i d = 12.5 a max r ds(on) = 13.6 m at v gs = 4.5 v, i d = 10.4 a high performance technology for extremely low r ds(on) termination is lead-free and rohs compliant general description this FDMC7692S is produced using fairchild semiconductor?s advanced power trench ? process that has been especially tailored to minimize the on-state resistance. this device is well suited for power management and load switching applications common in notebook computers and portable battery packs. applications dc - dc buck converters notebook dc - dc application mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 30 v v gs gate to source voltage 20 v i d drain current -continuous (package limited) t c = 25 c 18 a -continuous t a = 25 c (note 1a) 12.5 -pulsed 45 e as sinlge pulse avalanche energy (note 3) 21 mj p d power dissipation t a = 25 c (note 1a) 2.3 w t j , t stg operating and storage junction temperature range -55 to +150 c r ja thermal resistance, junction to ambient (note 1a) 53 c/w device marking device package reel size tape width quantity FDMC7692S FDMC7692S mlp 3.3x3.3 13 ?? 12 mm 3000 units mlp 3.3x3.3 bottom d d d d s s s g top pin 1 g s s s d d d d 5 6 7 8 3 2 1 4
FDMC7692S n-channel power trench ? syncfet tm www.fairchildsemi.com 2 ?2009 fairchild semiconductor corporation FDMC7692S rev.c1 electrical characteristics t j = 25 c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain to source breakdown voltage i d = 1 ma, v gs = 0 v 30 v bv dss t j breakdown voltage temperature coefficient i d = 10 ma, referenced to 25 c 16 mv / c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 500 a i gss gate to source leakage current v gs = 20 v, v ds = 0 v 100 na on characteristics v gs(th) gate to source threshold voltage v gs = v ds , i d = 1 ma 1.2 2.0 3.0 v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 10 ma, referenced to 25 c -5 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 12.5 a 7.8 9.3 m v gs = 4.5 v, i d = 10.4 a 10.8 13.6 v gs = 10 v, i d = 12.5 a t j = 125 c 9.6 13.0 g fs forward transconductance v ds = 5 v, i d = 12.5 a 62 s (note 2) dynamic characteristics c iss input capacitance v ds = 15 v, v gs = 0 v, f = 1 mhz 1040 1385 pf c oss output capacitance 445 590 pf c rss reverse transfer capacitance 40 60 pf r g gate resistance 1.1 2.9 switching characteristics t d(on) turn-on delay time v dd = 15 v, i d = 12.5 a, v gs = 10 v, r gen = 6 917ns t r rise time 310ns t d(off) turn-off delay time 19 34 ns t f fall time 310ns q g total gate charge v gs = 0 v to 10 v v dd = 15 v i d = 12.5 a 16 23 nc q g total gate charge v gs = 0 v to 4.5 v 8 10 nc q gs gate to source gate charge 4 nc q gd gate to drain ?miller? charge 2 nc drain-source diode characteristics v sd source to drain diode forward voltage v gs = 0 v, i s = 12.5 a (note 2) 0.9 1.3 v v gs = 0 v, i s = 0.9 a (note 2) 0.5 0.7 t rr reverse recovery time i f = 12.5 a, di/dt = 300 a/ s 21 33 ns q rr reverse recovery charge 16 29 nc notes : 1. r ja is determined with the device mounted on a 1in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 30 0 s, duty cycle < 2.0%. 3. e as of 21 mj is based on starting t j = 25 c, l = 0.3 mh, i as = 12.0 a, v dd = 27 v, v gs = 10 v. 100% test at l = 3 mh, i as = 3.2 a . a. 53 c/w when mounted on a 1 in 2 pad of 2 oz copper. b. 125 c/w when mounted on a minimum pad of 2 oz copper.
FDMC7692S n-channel power trench ? syncfet tm www.fairchildsemi.com 3 ?2009 fairchild semiconductor corporation FDMC7692S rev.c1 typical characteristics t j = 25 c unless otherwise noted figure 1. 0 0.2 0.4 0.6 0.8 1.0 0 9 18 27 36 45 v gs = 6 v v gs = 4.5 v v gs = 10 v pulse duration = 80 s duty cycle = 0.5% max v gs = 3.5 v v gs = 4 v i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 0 9 18 27 36 45 0.5 1.0 1.5 2.0 2.5 3.0 3.5 v gs = 6 v v gs = 3.5 v pulse duration = 80 s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs =4 v v gs = 4.5 v v gs =10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 i d = 12.5 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 246810 0 10 20 30 40 t j = 125 o c i d = 12.5 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m ) pulse duration = 80 s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 12345 0 9 18 27 36 45 t j = 125 o c v ds = 5 v pulse duration = 80 s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 125 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDMC7692S n-channel power trench ? syncfet tm www.fairchildsemi.com 4 ?2009 fairchild semiconductor corporation FDMC7692S rev.c1 figure 7. 0369121518 0 2 4 6 8 10 i dss = 12.5 a v dd = 20 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 15 v gate charge characteristics figure 8. 0.1 1 10 10 100 1000 3000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss 30 c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.001 0.01 0.1 1 10 50 1 10 20 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 0.01 0.1 1 10 100 0.01 0.1 1 10 100 1ms 10 ms 100 ms dc 10 s 1 s 100 us i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r ja = 125 o c/w t a = 25 o c f o r w a r d b i a s s a f e operating area figure 11. single pulse maximum power dissipation 10 -4 10 -3 10 -2 10 -1 10 0 10 1 100 1000 1 10 100 1000 v gs = 10v p (pk) , peak transient power (w) single pulse r ja = 125 o c/w t a = 25 o c t, pulse width (sec) 0.5 typical characteristics t j = 25 c unless otherwise noted
FDMC7692S n-channel power trench ? syncfet tm www.fairchildsemi.com 5 ?2009 fairchild semiconductor corporation FDMC7692S rev.c1 figure 12. junction-to-ambient tr ansient thermal resp onse curve 10 -4 10 -3 10 -2 10 -1 10 0 10 1 100 1000 1e-4 1e-3 0.01 0.1 1 single pulse r ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z ja x r ja + t a typical characteristics t j = 25 c unless otherwise noted
FDMC7692S n-channel power trench ? syncfet tm www.fairchildsemi.com 6 ?2009 fairchild semiconductor corporation FDMC7692S rev.c1 syncfet schottky body diode characteristics fairchild?s syncfet process embeds a schottky diode in parallel with powertrench mosfet. this diode exhibits similar characteristics to a discrete external schottky diode in parallel with a mosfet. figure 13 shows the reverses recovery characteristic of the FDMC7692S. schottky barrier diodes exhibit significant leakage at high tem- perature and high reverse voltage. this will increase the power in the device. typical characteristics (continued) figure 13. syncfet body diode reverse recovery characteristic figure 14. syncfet body diode reverses leakage versus drain-source voltage 0 5 10 15 20 25 30 10 -1 10 0 10 1 10 2 10 3 10 4 t j = 125 o c t j = 100 o c t j = 25 o c i dss , reverse leakage current (ua) v ds , reverse voltage (v) 0 50 100 150 200 250 -5 0 5 10 15 didt = 300 a/ s current (a) time (ns)
FDMC7692S n-channel power trench ? syncfet tm www.fairchildsemi.com 7 ?2009 fairchild semiconductor corporation FDMC7692S rev.c1 b. dimensions are in millimeters. c. dimensions and tolerances per a. does not conform to jedec registration mo-229 asme y14.5m, 1994 0.10 cab 0.05 c top view bottom view recommended land pattern 0.10 c 0.08 c b a 3.30 3.30 0.05 0.00 0.10 c 2x 2x 0.8 max side view seating plane 0.10 c pin #1 ident (0.203) 8 5 1.95 0.65 d. drawing file name : mlp08xreva pin#1 quadrant 0.40 0.30 4 1 (8x) e. land pattern recommendation is based on fsc design only 2.32 2.22 0.55 0.45 (4x) 1.150 0.299 2.05 1.95 0.350 r0.150 0.785 dimensional outline and pad layout
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