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1/13 march 2005 this is preliminary information on a new product now in development. details are subject to change without notice. VNQ5050K-E quad channel high side driver for automotive applications rev. 2 table 1. general features (*) per channel output current: 12a 3.0 v cmos compatible input status disable on state open load detection off state open load detection output stuck to v cc detection open drain status output undervoltage shut-down overvoltage clamp thermal shut down current and power limitation very low stand-by current protection against loss of ground and loss of v cc very low electromagnetic susceptibility optimized electromagnetic emission reverse battery protection (**) in compliance with the 2002/95/ec european directive description the VNQ5050K-E is a monolithic device made using stmicroelectronics vipower technology. it is intended for driving resistive or inductive loads with one side connected to ground. active v cc pin voltage clamp protects the device against low energy spikes (see iso7637 transient compatibility table). figure 1. package the device detects open load condition both in on and off state, when stat_dis is left open or driven low. output shorted to v cc is detected in the off state. when stat_dis is driven high, the status pin is in a high impedance condition. output current limitation protects the device in overload condition. in case of long duration over- load, the device limits the dissipated power to safe level up to thermal shut-down intervention. . ther- mal shut-down with automatic restart allows the device to recover normal operation as soon as fault condition disappears. table 2. order codes note: (**) see application schematic at page 9. type v cc r ds(on) i out VNQ5050K-E 41v 50m ? (*) 12a powersso-24 package tube tape and reel powersso-24 VNQ5050K-E vnq5050ktr-e advance data
VNQ5050K-E 2/13 figure 2. block diagram table 3. pin function figure 3. current and voltage conventions name function v cc battery connection outputn power output gnd ground connection. must be reverse battery protected by an external diode/resistor network inputn voltage controlled input pin with hysteresis, cmos compatible. controls output switch state statusn open drain digital diagnostic pin stat_dis active high cmos compatible pin, to disable the status pin overtemp. 1 v cc gnd logic driver 1 v cc clamp undervoltage clamp 1 openload on 1 current limiter 1 openload off 1 control & protection equivalent to channel1 input2 status2 v cc input2 status2 input1 status1 input3 status3 input4 status4 output1 output2 output3 output4 control & protection equivalent to channel1 input3 status3 v cc control & protection equivalent to channel1 input4 status4 v cc stat_dis pwr lim 1 v fn (*) (*) v fn = v cc - v outn during reverse battery condition i gnd v cc gnd outputn stat_dis i sd inputn i inn v sd v inn i outn v outn statusn i statn v statn v cc i s
3/13 VNQ5050K-E figure 4. configuration diagram (top view) & suggested connections for unused and n.c. pins table 4. absolute maximum ratings table 5. thermal data note: 1. when mounted on a standard single-sided fr-4 board with 1 cm 2 of cu (at least 35 m thick) connected to tab. symbol parameter value unit v cc dc supply voltage 41 v - v cc reverse dc supply voltage - 0.3 v - i gnd dc reverse ground pin current - 200 ma i out dc output current internally limited a - i out reverse dc output current - 15 a i in dc input current +10/-1 ma i stat dc status current +10/-1 ma v esd electrostatic discharge (r=1.5k ? ; c=100pf) 2000 v t j junction operating temperature -40 to 150 c t stg storage temperature - 55 to 150 c symbol parameter value unit r thj-case thermal resistance junction-case 1.7 c/w r thj-amb thermal resistance junction-ambient 52 (1) c/w 1 2 3 4 5 6 7 8 9 10 input2 input3 status3 status2 gnd v cc 11 12 input1 status1 input4 status4 v cc 24 23 22 21 20 19 18 17 16 15 14 13 output2 output3 output3 output2 output1 output1 output2 output3 output4 output4 output4 output1 stat_dis connection / pin status n.c. output input floating x x x x to ground x through 10k ? resistor tab = v cc
VNQ5050K-E 4/13 electrical characteristics (8v 5/13 VNQ5050K-E electrical characteristics (continued) table 8. status pin (v sd =0) table 9. protections (see note 3) note: 3. to ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic sign als must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles table 10. openload detection symbol parameter test conditions min typ max unit v stat status low output voltage i stat = 1.6 ma, v sd =0v 0.5 v i lstat status leakage current normal operation or v sd =5v, v stat = 5v 10 a c stat status pin input capacitance normal operation or v sd =5v, v stat = 5v 100 pf v scl status clamp voltage i stat = 1ma i stat = - 1ma 5.5 -0.7 tbd v v symbol parameter test conditions min. typ. max. unit i limh dc short circuit current v cc =13v 5vt tsd 20 s v demag turn-off output voltage clamp i out =2a; v in =0; l=6mh v cc -41 v cc -46 v cc -52 v v on output voltage drop limitation i out =0.1a (see fig. 6) t j = -40c...+150c 25 mv symbol parameter test conditions min typ max unit i ol openload on state detection threshold v in = 5v , 8v VNQ5050K-E 6/13 figure 5. figure 6. v in v stat t pol open load status timing (without external pull-up) i out < i ol v out < v ol t dol(on) v in v stat open load status timing (with external pull-up) i out < i ol v out > v ol t dol(on) v in v stat over temp status timing t sdl t sdl t j > t tsd v in v stat t dstkon output stuck to vcc i out > i ol v out > v ol t dol(on) v on i out v cc -v out t j =150 o c t j =25 o c t j =-40 o c v on /r on(t)
7/13 VNQ5050K-E electrical characteristics (continued) table 11. logic input table 12. truth table note: 1. if the v sd is high, the status pin is in a high impedance. 2. the status pin is low with a delay equal to t dstkon after input falling edge. 3. the status pin becomes high with a delay equal to t pol after input falling edge. symbol parameter test conditions min. typ. max. unit v il input low level 0.9 v i il low level input current v in = 0.9v 1 a v ih input high level 2.1 v i ih high level input current v in = 2.1v 10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in = 1ma i in = -1ma 5.5 -0.7 tbd v v v sdl stat_dis low level voltage 0.9 v i sdl low level stat_dis current v sd =0.9v 1 a v sdh stat_dis high level volt- age 2.1 v i sdh high level stat_dis current v sd =2.1v 10 a v sd(hyst) stat_dis hysteresis volt- age 0.25 v v sdcl stat_dis clamp voltage i sd =1ma i sd =-1ma 5.5 -0.7 tbd v v conditions inputn outputn statusn (v sd =0v) (1) normal operation l h l h h h current limitation l h l x h h overtemperature l h l l h l undervoltage l h l l x x output voltage > v ol l h h h l (2 ) h output current < i ol l h l h h (3 ) l
VNQ5050K-E 8/13 figure 7. switching characteristics table 13. electrical transient requirements iso t/r 7637/1 test pulse test levels i ii iii iv delays and impedance 1 -25 v -50 v -75 v -100 v 2 ms 10 ? 2 +25 v +50 v +75 v +100 v 0.2 ms 10 ? 3a -25 v -50 v -100 v -150 v 0.1 s 50 ? 3b +25 v +50 v +75 v +100 v 0.1 s 50 ? 4 -4 v -5 v -6 v -7 v 100 ms, 0.01 ? 5 +26.5 v +46.5 v +66.5 v +86.5 v 400 ms, 2 ? iso t/r 7637/1 test pulse test levels results i ii iii iv 1c c c c 2c c c c 3acccc 3bcccc 4c c c c 5c e e e class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) t d(off) t d(on) input t t 90%
9/13 VNQ5050K-E figure 8. application schematic gnd protection network against reverse battery solution 1: resistor in the ground line (r gnd only). this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1) r gnd 600mv / (i s(on)max ). 2) r gnd (? v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc <0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how many devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st suggests to utilize solution 2 (see below). solution 2: a diode (d gnd ) in the ground line. a resistor (r gnd =1k ?) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the ground network will produce a shift ( j 600mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift will not vary if more than one hsd shares the same diode/resistor network. load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds to v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso t/r 7637/1 table. c i/os protection: if a ground protection network is used and negative transient are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the c i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of c and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of c i/os. -v ccpeak /i latchup r prot (v oh c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = - 100v and i latchup 20ma; v oh c 4.5v 5k ? r prot 65k ? . recommended r prot value is 10k ?. v cc gnd outputn d gnd r gnd d ld c +5v v gnd stat_dis inputn r prot r prot r prot +5v note: channels 2, 3 and 4 have the same internal circuit as channel 1. statusn
VNQ5050K-E 10/13 figure 9. waveforms status input normal operation undervoltage v cc v usd v usdhyst input status load current load current stat_dis stat_dis undefined open load without external pull-up status input status input open load with external pull-up load voltage load voltage v ol v out >v ol stat_dis stat_dis load current i out v ol stat_dis i out >i ol t dstkon t pol overload operation input status t tsd t r t j load current stat_dis t rs i limh i liml thermal cycling power limitation current limitation shorted load normal load
11/13 VNQ5050K-E package mechanical table 14. powersso-24? mechanical data figure 10. powersso-24? package dimensions symbol millimeters min typ max a 1.9 2.22 a2 1.9 2.15 a1 0 0.07 b 0.34 0.4 0.46 c 0.23 0.32 d 10.2 10.4 e7.4 7.6 e0.8 e3 8.8 g 0.1 g1 0.06 h 10.1 10.5 h 0.4 l 0.55 0.85 n 10o x3.9 4.3 y6.1 6.5
VNQ5050K-E 12/13 revision history table 1. revision history date revision description of changes oct. 2004 1 - first issue. mar. 2005 2 - minor changes
13/13 VNQ5050K-E information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this p ublication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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