1 1 1/12/01 supertex inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." supertex does not assume responsibility for use of devices described and limits its liabi lity to the replacement of devices determined to be defective due to workmanship. no responsibility is assumed for possible omissions or inaccuracies. circuitry and specifications are subject to c hange without notice. for the latest product specifications, refer to the supertex website: http://www.supertex.com. for complete liability information on all supertex products, refer to the most curre nt databook or to the legal/disclaimer page on the supertex website. vn0104 VN0106 advanced dmos technology these enhancement-mode (normally-off) transistors utilize a vertical dmos structure and supertex? well-proven silicon-gate manufacturing process. this combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inher- ent in mos devices. characteristic of all mos structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. supertex? vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. package option see package outline section for dimensions. n-channel enhancement-mode v ertical dmos fet applications ? motor controls ? converters ? amplifiers ? switches ? power supply circuits ? drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) features ? free from secondary breakdown ? low power drive requirement ? ease of paralleling ? low c iss and fast switching speeds ? excellent thermal stability ? integral source-drain diode ? high input impedance and high gain ? complementary n- and p-channel devices t o-92 s g d order number / package bv dss /r ds(on) i d(on) bv dgs (max) (min) to-92 40v 3.0 ? 2.0a vn0104n3 60v 3.0 ? 2.0a VN0106n3 ordering information absolute maximum ratings drain-to-source voltage bv dss drain-to-gate voltage bv dgs gate-to-source voltage 20v operating and storage temperature -55 c to +150 c soldering temperature* 300 c * distance of 1.6 mm from case for 10 seconds.
2 vn0104/VN0106 thermal characteristics package i d (continuous)* i d (pulsed) power dissipation jc ja i dr *i drm @ t c = 25 c c/w c/w to-92 350ma 2.0a 1.0w 125 170 350ma 2.0a *i d (continuous) is limited by max rated t j . 90% 10% 90% 90% 10% 10% pulse generator v dd r l output d.u.t. t (on) t d(on) t (off) t d(off) t f t r input input output 10v v dd r gen 0v 0v switching waveforms and test circuit symbol parameter min typ max unit conditions bv dss VN0106 60 vn0104 40 v gs(th) gate threshold voltage 0.8 2.4 v v gs = v ds , i d = 1ma ? v gs(th) change in v gs(th) with temperature -3.8 -5.5 mv/ cv gs = v ds , i d = 1ma i gss gate body leakage 100 na v gs = 20v, v ds = 0v i dss zero gate voltage drain current 1 v gs = 0v, v ds = max rating 100 av gs = 0v, v ds = 0.8 max rating t a = 125 c i d(on) on-state drain current 0.5 1.0 v gs = 5v, v ds = 25v 2.0 2.5 v gs = 10v, v ds = 25v r ds(on) 3.0 5.0 v gs = 5v, i d = 250ma 2.5 3.0 v gs = 10v, i d = 1a ? r ds(on) change in r ds(on) with temperature 0.70 1 %/ cv gs = 10v, i d = 1a g fs forward transconductance 300 450 m v ds = 25v, i d = 0.5a c iss input capacitance 55 65 c oss common source output capacitance 20 25 pf c rss reverse transfer capacitance 5 8 t d(on) turn-on delay time 3 5 t r rise time 5 8 t d(off) turn-off delay time 6 9 t f fall time 5 8 v sd diode forward voltage drop 1.2 1.8 v v gs = 0v, i sd =1.0a t rr reverse recovery time 400 ns v gs = 0v, i sd =1.0a notes: 1. all d.c. parameters 100% tested at 25 c unless otherwise stated. (pulse test: 300 s pulse, 2% duty cycle.) 2. all a.c. parameters sample tested. a static drain-to-source on-state resistance vv gs = 0v, i d = 1ma drain-to-source breakdown voltage electrical characteristics (@ 25 c unless otherwise specified) v dd = 25v i d = 1a r gen = 25 ? ns v gs = 0v, v ds = 25v f = 1 mhz ? ?
3 vn0104/VN0106 t ypical performance curves
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4 1235 bordeaux drive, sunnyvale, ca 94089 tel: (408) 744-0100 ?fax: (408) 222-4895 www.supertex.com 1 1/12/01 ?001 supertex inc. all rights reserved. unauthorized use or reproduction prohibited. vn0104/VN0106 t ypical performance curves c gate drive dynamic characteristics q g (nanocoulombs) v gs (volts) t j ( c) v gs(th) (normalized) ds(on) r (normalized) v (th) and r ds variation with temperature on-resistance vs. drain current r ds(on) (ohms) transfer characteristics v gs (volts) i d (amperes) capacitance vs. drain-to-source voltage 100 c (picofarads) v ds (volts) i d (amperes) 0102 03040 75 50 25 0246810 2.5 2.0 1.5 1.0 0.5 -50 0 50 100 150 1.1 1.0 0.9 0 0 2.5 1.0 1.6 1.4 1.2 1.0 0.8 0.6 10 8 6 4 2 0 0.2 0.4 0.6 0.8 1.0 -50 0 50 100 150 v ds = 10v v (th) @ 1ma r ds @ 10v, 1.0a 0.5 1.5 2.0 1.0 2.0 3.0 5.0 4.0 0 0 40 pf 40v 80 pf 0 1.9 1.6 1.3 1.0 0.7 0.4 f = 1mhz r ds @ 5v, 0.25a bv dss variation with temperature bv dss (normalized) t j ( c) v ds = 25v t a = -55 c 25 c 125 c c iss c oss c rss v gs = 5v v gs = 10v
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