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| 1. product pro?le 1.1 general description the ip4338cx24/lf is a 10-channel rc low-pass ?lter array which is designed to provide ?ltering of undesired rf signals in the 800 mhz to 3000 mhz frequency band. in addition, the ip4338cx24/lf incorporates diodes to provide protection to downstream components from electrostatic discharge (esd) voltages as high as 15 kv. the ip4338cx24/lf is fabricated using monolithic silicon technology and integrates 10 resistors and 20 diodes in a single wafer-level chip-scale package (wlcsp) measuring 1.96 mm by 2.01 mm (typical). these features make the ip4338cx24/lf ideal for use in applications requiring the utmost in miniaturization. 1.2 features n pb-free, rohs compliant and free of halogen and antimony (dark green compliant) n integrated 10-channel p -type rc ?lter network n 70 w series resistance; 25 pf (typical) capacitance per line n integrated esd protection withstanding 15 kv contact discharge, far exceeding iec 61000-4-2 level 4 n wlcsp with 0.4 mm pitch 1.3 applications n cellular and personal communication system (pcs) mobile handsets n cordless telephones n wireless data (wan/lan) systems ip4338cx24/lf 10-channel integrated ?lter network with esd input protection to iec 61000-4-2 level 4 rev. 02 20 august 2009 product data sheet
IP4338CX24LF_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 20 august 2009 2 of 12 nxp semiconductors ip4338cx24/lf 10-channel integrated ?lter network with esd input protection 2. pinning information 2.1 pinning 2.2 pin description 3. ordering information fig 1. pin con?guration ip4338cx24/lf 008aaa183 ip4338cx24/lf transparent top view d b e c a 24 135 bump a1 index area table 1. pinning pin description a2 and a5 ?lter channel 1 a1 and a4 ?lter channel 2 b2 and b5 ?lter channel 3 b1 and b4 ?lter channel 4 c2 and c5 ?lter channel 5 c1 and c4 ?lter channel 6 d2 and d5 ?lter channel 7 d1 and d4 ?lter channel 8 e2 and e5 ?lter channel 9 e1 and e4 ?lter channel 10 a3, c3, d3, e3 ground b3 no ball table 2. ordering information type number package name description version ip4338cx24/lf wlcsp24 wafer level chip-size package; 24 bumps; 1.96 2.01 0.61 mm ip4338cx24/lf IP4338CX24LF_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 20 august 2009 3 of 12 nxp semiconductors ip4338cx24/lf 10-channel integrated ?lter network with esd input protection 4. functional diagram 5. limiting values [1] device is quali?ed with 1000 pulses of 15 kv contact discharges each, according to the iec61000-4-2 model and far exceeds the speci?ed level 4 (8 kv contact discharge). fig 2. schematic diagram ip4338cx24/lf 008aaa182 a1, a2, b1, b2, c1, c2, d1, d2, e1, e2 a3, c3, d3, e3 a4, a5, b4, b5, c4, c5, d4, d5, e4, e5 r s(ch) table 3. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v i input voltage - 0.5 +5.5 v v esd electrostatic discharge voltage all pins to ground contact discharge [1] - 15 +15 kv air discharge [1] - 15 +15 kv iec 61000-4-2 level 4; all pins to ground contact discharge - 8+8kv air discharge - 15 +15 kv i ch channel current (dc) t amb =70 c - 33 ma p ch channel power dissipation continuous power; t amb =70 c -60mw p tot total power dissipation continuous power; t amb =70 c - 250 mw t stg storage temperature - 55 +150 c t re?ow(peak) peak re?ow temperature 10 s maximum - 260 c t amb ambient temperature - 30 +85 c IP4338CX24LF_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 20 august 2009 4 of 12 nxp semiconductors ip4338cx24/lf 10-channel integrated ?lter network with esd input protection 6. characteristics [1] guaranteed by design. table 4. channel characteristics t amb =25 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit r s(ch) channel series resistance f=0hz (dc) 52.5 70 87.5 w c ch channel capacitance v bias(dc) = 0 v; f = 1 mhz [1] - 2530pf v br breakdown voltage i test =1ma 6 - 20 v i lr reverse leakage current per channel; v i = 3.0 v - - 20 na table 5. frequency characteristics t amb =25 c; unless otherwise speci?ed. symbol parameter conditions min typ max unit a il insertion loss 800 mh z IP4338CX24LF_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 20 august 2009 6 of 12 nxp semiconductors ip4338cx24/lf 10-channel integrated ?lter network with esd input protection 7.2 crosstalk the crosstalk measurement con?guration of a typical 50 w nwa system for evaluation of the ip4338cx24/lf is shown in figure 5 . the measured crosstalk within the ip4338cx24/lf in a 50 w nwa system from one channel to another is shown in figure 6 for ?ve different pairs of channels. in all cases, unused connections are terminated with 50 w to ground. fig 5. crosstalk measurement con?guration (1) channels 2 and 6 (pins a1 and c4). (2) channels 2 and 10 (pins a1 and e4). (3) channels 3 and 7 (pins b2 and d5). (4) channels 5 and 3 (pins c2 and b5). (5) channels 5 and 7 (pins c2 and d5). fig 6. measured crosstalk between adjacent channels out_2 001aai756 50 w 50 w v gen dut in_1 out_1 in_2 test board 50 w 50 w 001aaj953 f (mhz) 10 - 1 10 3 10 4 10 2 110 - 20 - 30 - 40 - 50 - 60 - 10 0 a ct (db) - 70 (1) (2) (3) (4) (5) IP4338CX24LF_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 20 august 2009 7 of 12 nxp semiconductors ip4338cx24/lf 10-channel integrated ?lter network with esd input protection 8. package outline fig 7. package outline ip4338cx24/lf (wlcsp24) references outline version european projection issue date iec jedec jeita ip4338cx24/lf ip4338cx24_lf_po unit mm max nom min 0.66 0.61 0.56 0.22 0.20 0.18 0.31 0.26 0.21 2.01 1.96 1.91 2.06 2.01 1.96 0.4 1.6 a dimensions wlcsp24: wafer level chip-size package; 24 bumps; 1.96 x 2.01 x 0.61 mm ip4338cx24/lf a 1 a 2 0.41 bdeee 1 1.6 e 2 0 1 2 mm scale bump a1 index area b a d e x detail x a a 2 a 1 e 2 e 1 e e b e d c b a 12345 09-03-25 09-05-19 IP4338CX24LF_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 20 august 2009 8 of 12 nxp semiconductors ip4338cx24/lf 10-channel integrated ?lter network with esd input protection 9. soldering of wlcsp packages 9.1 introduction to soldering wlcsp packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering wlcsp (wafer level chip-size packages) can be found in application note an10439 wafer level chip scale package and in application note an10365 surface mount re?ow soldering description . wave soldering is not suitable for this package. all nxp wlcsp packages are lead-free. 9.2 board mounting board mounting of a wlcsp requires several steps: 1. solder paste printing on the pcb 2. component placement with a pick and place machine 3. the re?ow soldering itself 9.3 re?ow soldering key characteristics in re?ow soldering are: ? lead-free versus snpb soldering; note that a lead-free re?ow process usually leads to higher minimum peak temperatures (see figure 8 ) than a pbsn process, thus reducing the process window ? solder paste printing issues, such as smearing, release, and adjusting the process window for a mix of large and small components on one board ? re?ow temperature pro?le; this pro?le includes preheat, re?ow (in which the board is heated to the peak temperature), and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic) while being low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classi?ed in accordance with t ab le 6 . moisture sensitivity precautions, as indicated on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during re?ow soldering, see figure 8 . table 6. lead-free process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245 IP4338CX24LF_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 20 august 2009 9 of 12 nxp semiconductors ip4338cx24/lf 10-channel integrated ?lter network with esd input protection for further information on temperature pro?les, refer to application note an10365 surface mount re?ow soldering description . 9.3.1 stand off the stand off between the substrate and the chip is determined by: ? the amount of printed solder on the substrate ? the size of the solder land on the substrate ? the bump height on the chip the higher the stand off, the better the stresses are released due to tec (thermal expansion coef?cient) differences between substrate and chip. 9.3.2 quality of solder joint a ?ip-chip joint is considered to be a good joint when the entire solder land has been wetted by the solder from the bump. the surface of the joint should be smooth and the shape symmetrical. the soldered joints on a chip should be uniform. voids in the bumps after re?ow can occur during the re?ow process in bumps with high ratio of bump diameter to bump height, i.e. low bumps with large diameter. no failures have been found to be related to these voids. solder joint inspection after re?ow can be done with x-ray to monitor defects such as bridging, open circuits and voids. 9.3.3 rework in general, rework is not recommended. by rework we mean the process of removing the chip from the substrate and replacing it with a new chip. if a chip is removed from the substrate, most solder balls of the chip will be damaged. in that case it is recommended not to re-use the chip again. msl: moisture sensitivity level fig 8. temperature pro?les for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature IP4338CX24LF_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 20 august 2009 10 of 12 nxp semiconductors ip4338cx24/lf 10-channel integrated ?lter network with esd input protection device removal can be done when the substrate is heated until it is certain that all solder joints are molten. the chip can then be carefully removed from the substrate without damaging the tracks and solder lands on the substrate. removing the device must be done using plastic tweezers, because metal tweezers can damage the silicon. the surface of the substrate should be carefully cleaned and all solder and ?ux residues and/or under?ll removed. when a new chip is placed on the substrate, use the ?ux process instead of solder on the solder lands. apply ?ux on the bumps at the chip side as well as on the solder pads on the substrate. place and align the new chip while viewing with a microscope. to re?ow the solder, use the solder pro?le shown in application note an10365 surface mount re?ow soldering description . 9.3.4 cleaning cleaning can be done after re?ow soldering. 10. abbreviations 11. revision history table 7. abbreviations acronym description dut device under test esd electrostatic discharge lan local area network nwa network analyzer pcb printed-circuit board pcs personal communication system rohs restriction of hazardous substances wan wide area network wlcsp wafer-level chip-scale package table 8. revision history document id release date data sheet status change notice supersedes IP4338CX24LF_2 20090820 product data sheet - IP4338CX24LF_1 modi?cations: ? figure 4 : ?gure title and symbol changed IP4338CX24LF_1 20090618 product data sheet - - IP4338CX24LF_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 20 august 2009 11 of 12 nxp semiconductors ip4338cx24/lf 10-channel integrated ?lter network with esd input protection 12. legal information 12.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 12.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 12.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. export control this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. 12.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 13. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation. nxp semiconductors ip4338cx24/lf 10-channel integrated ?lter network with esd input protection ? nxp b.v. 2009. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 20 august 2009 document identifier: IP4338CX24LF_2 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 14. contents 1 product pro?le . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 general description. . . . . . . . . . . . . . . . . . . . . . 1 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 pinning information . . . . . . . . . . . . . . . . . . . . . . 2 2.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 5 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 application information. . . . . . . . . . . . . . . . . . . 5 7.1 insertion loss . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.2 crosstalk. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 9 soldering of wlcsp packages. . . . . . . . . . . . . 8 9.1 introduction to soldering wlcsp packages . . . 8 9.2 board mounting . . . . . . . . . . . . . . . . . . . . . . . . 8 9.3 re?ow soldering . . . . . . . . . . . . . . . . . . . . . . . . 8 9.3.1 stand off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 9.3.2 quality of solder joint . . . . . . . . . . . . . . . . . . . . 9 9.3.3 rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 9.3.4 cleaning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 10 11 revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 12 legal information. . . . . . . . . . . . . . . . . . . . . . . 11 12.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 12.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 13 contact information. . . . . . . . . . . . . . . . . . . . . 11 14 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 |
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