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| www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 FEATURES 16-bit RISC type MCU core 24-bit fixed point DSP core 72KB internal data memory 16KB internal program memory Icache : 4KB direct-mapped cache Dcache : 4KB 2-way set asso. Cache 4-Mbit NOR Flash (SST39VF400A-70) On-chip peripherals - Basic timer & watchdog timer - Three 16 bit timers - One I2C & two I2S I/F - Full-duplex UART controller - USB ver1.1 compliance - SSFDC(SMC) I/F - Intelligent interrupt controller - Six 10-bit resolution A/D channels - LCD controller for STN/TFT LCD - PLL based on 32.768KHz OSC 80MHz(max) operation frequency 3V operation voltage 208-pin CABGA package Low power consumption MP3 encoder/decoder WMATM decoder Flash file-system - SSFDC for SMC - FAT12/FAT16 for MMC and SD USB driver for WindowsTM 98/Me/2K/XP Mass Storage Class APPLICATIONS - Portable MP3/WMA recorder/player - MP3 juke box - Digital audio encoder/decoder - Digital internet radio server - Digital satellite radio server/receiver - CD type MP3/WMA player .com DataShee SST 39VF400A-70 TCC730 LCD Controller JTAG/TAP 4K Icache 4K Dcache Serial I/F P-MEM 16KB (I2S,I2C) data 16-bit RISC MCU SSFDC MMC I/F 4M-bit NOR Flash PLL 0 PLL 1 X-MEM 48KB Y-MEM 24KB USB DMA addr 24-bit DSP Timer EX-MEM I/F ADC GPIO TCC731 Functional Block Diagram .com www.telechips.com +822-3443-6792 1/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 1. PIN DESCRIPTIONS (208 CABGA) Specification V1.00 A1 BALL PAD INDICATOR TCC731Y t4U.com .com DataShee U T R P N M L K J H G F E D C B A A1 BALL PAD INDICATOR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 .com www.telechips.com +822-3443-6792 2/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 Number A1 C2 D4 B1 C1 D2 D3 E4 D1 E2 E3 F4 E1 F2 F3 G4 F1 G2 G3 H4 G1 H2 H3 J4 H1 J2 J3 K4 J1 K2 K3 L4 K1 L2 L3 M4 L1 M2 M3 N4 M1 N2 N3 Pin name PA.0 PA.1 PA.2 PA.3 PA.4 PA.5 VDD PA.6 PA.7 FCSN NC TEST1 TEST2 VSS XI XO TEST3 PJ.0 PJ.1 PJ.2 PJ.3 VDD PJ.4 PB.0 PB.1 PB.2 PB.3 VSS PB.4 PB.5 USB_DM USB_DP VDD_ADC VSS_ADC AD_VREF VDD_USB VSS_USB VDD_PLL0 CP0 CZ0 VSS_PLL0 VDD_PLL1 CP1 Type I/O I/O I/O I/O I/O I/O I/O I/O Pin description t4U.com GPIO PORT A GPIO PORT A GPIO PORT A GPIO PORT A GPIO PORT A GPIO PORT A Power supply GPIO PORT A GPIO PORT A Internal Flash Chip Select Low: The internal flash is enabled for read/write I access High: The internal flash is disabled. No connection I Pull-down required for normal operation I Pull-down required for normal operation Ground I Oscillator (32.768KHz) for PLL O Oscillator (32.768KHz) for PLL I Pull-down required for normal operation I/O GPIO PORT .com J I/O GPIO PORT J I/O GPIO PORT J I/O GPIO PORT J Power supply I/O GPIO PORT J I/O GPIO PORT B I/O GPIO PORT B I/O GPIO PORT B I/O GPIO PORT B Ground I/O GPIO PORT B I/O GPIO PORT B I/O USB minus port I/O USB plus port Power supply for ADC Ground for ADC I ADC reference voltage Power supply for USB Ground for USB Power supply for PLL0 Loop filter VCO input for PLL0 Loop filter pump output for PLL0 Ground for PLL0 Power supply for PLL1 Loop filter VCO input for PLL1 DataShee .com www.telechips.com +822-3443-6792 3/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 N1 P1 P2 P3 R1 T1 R2 R3 T2 U1 T3 P4 U2 U3 T4 R4 P5 U4 T5 R5 P6 U5 T6 R6 P7 U6 T7 R7 P8 U7 T8 R8 P9 U8 T9 R9 P10 U9 T10 R10 P11 U10 T11 R11 P12 U11 T12 CZ1 VSS_PLL1 MMC_DI/PC.0 MMC_DO/PC.1 MMC_SCLK/PC.2 IIC_SCL/PC.3 IIC_SDA/PC.4 PC.5 UART_RX/PC.6 VDD UART_TX/PC.7 INT8/PG.0 INT9/PG.1 SMC_CE2/PG.2 ADC0//INT0/PD.0 ADC1/INT1/PD.1 VSS ADC2//INT2/PD.2 ADC3//INT3/PD.3 ADC4//INT4/PD.4 ADC5//INT5/PD.5 ADC6//INT6/PD.6 ADC7//INT7/PD.7 SMC_CE0/PH.0 VDD SMC_CE1/PH.1 SMC_CLE/PH.2 SMC_ALE/PH.3 SMC_BUSY/PH.4 SMC_WP/PH.5 SMC_RE/PH.6 SMC_WE/PH.7 VSS SMC_IO0/PI.0 SMC_IO1/PI.1 SMC_IO2/PI.2 SMC_IO3/PI.3 SMC_IO4/PI.4 SMC_IO5/PI.5 VDD SMC_IO6/PI.6 SMC_IO7/PI.7 PE.0 PE.1 PE.2 PE.3 VSS I/O I/O I/O I/O I/O I/O I/O - Loop filter pump output for PLL1 Ground for PLL1 MMC serial data input / GPIO PORT C MMC serial data output / GPIO PORT C MMC serial clock / GPIO PORT C Serial clock for I2C / GPIO PORT C Serial data for I2C / GPIO PORT C GPIO PORT C UART Rx input / GPIO PORT C Power supply t4U.com I/O UART Tx output / GPIO PORT C I External interrupt 8 / GPIO PORT G I External interrupt 9 / GPIO PORT G O SmartMedia chip select 2 / GPIO PORT G I ADC 0 input / External interrupt 0 / GPIO PORT D I ADC 1 input / External interrupt 1 / GPIO PORT D Ground I ADC 2 input / External interrupt 2 / GPIO PORT D I ADC 3 input / External interrupt 3 / GPIO PORT D I ADC 4 input / External interrupt 4 / GPIO PORT D I ADC 5 input / External interrupt 5 / GPIO PORT D I ADC 6 input .com/ External interrupt 6 / GPIO PORT D I ADC 7 input / External interrupt 7 / GPIO PORT D O SmartMedia chip select 0 / GPIO PORT H Power supply O SmartMedia chip select 1 / GPIO PORT H O SmartMedia command latch enable / GPIO PORT H O SmartMedia Address latch enable / GPIO PORT H I SmartMedia busy status / GPIO PORT H I SmartMedia write protect / GPIO PORT H O SmartMedia read enable strobe signal/GPIO PORT H O SmartMedia write enable strobe signal/GPIO PORT H Ground I/O SmartMedia I/O port / GPIO PORT I I/O SmartMedia I/O port / GPIO PORT I I/O SmartMedia I/O port / GPIO PORT I I/O SmartMedia I/O port / GPIO PORT I I/O SmartMedia I/O port / GPIO PORT I I/O SmartMedia I/O port / GPIO PORT I Power supply I/O SmartMedia I/O port / GPIO PORT I I/O SmartMedia I/O port / GPIO PORT I I/O GPIO PORT E I/O GPIO PORT E I/O GPIO PORT E I/O GPIO PORT E Ground DataShee .com www.telechips.com +822-3443-6792 4/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 R12 P13 U12 T13 R13 U13 U14 T14 R14 U15 U16 T15 R15 T16 U17 R16 P14 T17 R17 P16 P15 N14 P17 N16 N15 M14 N17 M16 M15 L14 M17 L16 L15 K14 L17 K16 K15 J14 K17 J16 J15 H14 J17 H16 H15 G14 H17 IIS_WCK0/PK.0 IIS_BCK0/PK.1 IIS_DATA0/PK.2 IIS_WCK1/PK.3 IIS_BCK1/PK.4 IIS_DATA1/PK.5 IIS MCK/PK.6 VDD TEST4 TEST5 /TRST TCK TDI JTAG TMS UCLK TEST6 TEST7 TDO VSS TEST8 TEST9 TEST10 TEST11 TEST12 TEST13 TEST14 TEST15 PF.0/LCD_DATA.8 PF.1/LCD_DATA.9 VDD PF.2/LCD_DATA.10 PF.3/LCD_DATA.11 PF.4/LCD_DATA.12 PF.5/LCD_DATA.13 PF.6/LCD_DATA.14 VSS PF.7/LCD_DATA.15 LCD_DATA.0 LCD_DATA.1 LCD_DATA.2 LCD_DATA.3 LCD_DATA.4 LCD_DATA.5 VDD LCD_DATA.6 LCD_DATA.7 O O I/O O O I/O O I I I I I I I Word select clock for I2S0 / GPIO PORT K Bit serial clock for I2S0 / GPIO PORT K Serial data for I2S0 / GPIO PORT K Word select clock for I2S1 / GPIO PORT K Bit serial clock for I2S1 / GPIO PORT K Serial data for I2S1 / GPIO PORT K Master clock for I2S / GPIO PORT K Power supply Pull-down required Pull-up required Reset input for TAP controller TAP controller clock input TAP controller data input JTAG interface mode selection TAP controller test mode selection t4U.com I Serial clock input O No connection O No connection O TAP controller data output Ground I Pull-down required I Pull-down required .com I Pull-down required I Pull-down required O No connection O No connection O No connection O No connection I/O GPIO PORT F / LCD higher byte data output I/O GPIO PORT F / LCD higher byte data output Power supply I/O GPIO PORT F / LCD higher byte data output I/O GPIO PORT F / LCD higher byte data output I/O GPIO PORT F / LCD higher byte data output I/O GPIO PORT F / LCD higher byte data output I/O GPIO PORT F / LCD higher byte data output Ground I/O GPIO PORT F / LCD higher byte data output O LCD lower byte data output O LCD lower byte data output O LCD lower byte data output O LCD lower byte data output O LCD lower byte data output O LCD lower byte data output Power supply O LCD lower byte data output O LCD lower byte data output DataShee .com www.telechips.com +822-3443-6792 5/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 G16 G15 F14 G17 F16 F15 E14 F17 E16 E15 E17 D17 D16 D15 C17 B17 C16 C15 B16 A17 B15 D14 A16 A15 B14 C14 D13 A14 B13 C13 D12 A13 B12 C12 D11 A12 B11 C11 D10 A11 B10 C10 D9 A10 B9 C9 D8 LCD_BIAS LCD_FCLK LCD_LCLK VSS LCD_PCLK /RESET /RESETO TEST16 TEST17 BA0 BA1 /CAS VDD /DCS /DWE /RAS /SCS0 /SCS1 /SCS2 VSS /SCS3 /SOE /SWE CKE DQM VDD CLKOUT EA.0 EA.1 EA.2 EA.3 EA.4 VSS EA.5 EA.6 EA.7 EA.8 EA.9 VDD EA.10 EA.11 EA.12 EA.13 EA.14 VSS EA.15 EA.16 O O O O I O O I O O O O O O O O O - LCD AC bias LCD frame synchronization clock LCD line synchronization clock Ground LCD pixel synchronization clock Reset input Reset output No connection Pull-down required External SDRAM bank select 0 External SDRAM bank select 1 External SDRAM column address strobe Power supply External SDRAM chip select External SDRAM write enable External SDRAM row address strobe External SRAM chip select 0 External SRAM chip select 1 External SRAM chip select 2 Ground t4U.com O External SRAM chip select 3 O External SRAM .com output enable O External SRAM write enable O External SDRAM clock enable O External SDRAM data input/output mask Power supply O Internal system clock output O External address bus for off-chip memory O External address bus for off-chip memory O External address bus for off-chip memory O External address bus for off-chip memory O External address bus for off-chip memory Ground O External address bus for off-chip memory O External address bus for off-chip memory O External address bus for off-chip memory O External address bus for off-chip memory O External address bus for off-chip memory Power supply O External address bus for off-chip memory O External address bus for off-chip memory O External address bus for off-chip memory O External address bus for off-chip memory O External address bus for off-chip memory Ground O External address bus for off-chip memory O External address bus for off-chip memory DataShee .com www.telechips.com +822-3443-6792 6/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 t4U.com A9 B8 C8 D7 A8 B7 C7 D6 A7 B6 C6 D5 A6 B5 C5 A5 A4 B4 C4 A3 A2 B3 C3 B2 EA.17 EA.18 EA.19 VDD EA.20 ED.0 ED.1 ED.2 ED.3 ED.4 VSS ED.5 ED.6 ED.7 ED.8 ED.9 VDD ED.10 ED.11 ED.12 ED.13 ED.14 ED.15 VSS O External address bus for off-chip memory O External address bus for off-chip memory O External address bus for off-chip memory Power supply O External address bus for off-chip memory I/O External data bus for off-chip memory I/O External data bus for off-chip memory I/O External data bus for off-chip memory I/O External data bus for off-chip memory I/O External data bus for off-chip memory Ground I/O External data bus for off-chip memory I/O External data bus for off-chip memory I/O External data bus for off-chip memory I/O External data bus for off-chip memory I/O External data bus for off-chip memory Power supply I/O External data bus for off-chip memory I/O External data bus for off-chip memory I/O External data bus for off-chip memory I/O External data bus for off-chip memory I/O External data .com bus for off-chip memory I/O External data bus for off-chip memory Ground DataShee .com www.telechips.com +822-3443-6792 7/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 2. APPLICATION All pins in TCC731 are same as those in TCC730 except the followings. Please refer to TCC730 data sheet for more details. Specification V1.00 Number E2 FCSN Pin name Type I Pin description Internal Flash Chip Select Low: The internal flash is enabled for read/write access High: The internal flash is disabled. User must connect the FCSN with /SCS0 to use internal flash as program ROM. In case of development board, there must be switches or jumpers so that the /SCS0 can be connected with either external SRAM or internal flash exclusively. The configurations of these are illustrated in the following figures. t4U.com Internal Flash TCC731 FCSN . (E2) .com DataShee /SCS0 (C16) Figure 2.1 The configuration for application set board VDD Internal Flash TCC731 /SCS0 (C16) FCSN . (E2) VDD SRAM nCS Figure 2.2 The configuration for development board .com www.telechips.com +822-3443-6792 8/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 3. ELECTRICAL DATA Specification V1.00 Table 3.1 Absolute Maximum Ratings (TA = 25C) Parameter Supply voltage Input voltage Output voltage Output current hugh Symbol VDD VI VO IOH Conditions One I/O pin active All I/O pins active One I/O pin active Total pin current .com Rating -0.3 to +4.5 -0.3 to VDD + 0.3 -0.3 to VDD + 0.3 -15 -100 +20 +150 -40 to +85 -65 to +150 Unit V V V mA Output current low Operating temperature IOL TA TSTG mA C C t4U.com Storage temparature DataShee Table 3.2 DC Electrical Characteristics (TA = -40C to +85C, VDD = 2.7V to 3.6V) Parameter Supply voltage Symbol VDD VIH1 Input high voltage VIH2 VIH3 VIL1 Input low voltage VIL2 VIL3 Output high voltage VOH1 Conditions fOSC = 40MHz RESET All input pins except VIH0, VIH1, and VIH3. XI, TEST3 RESET All input pins except VIL1, VIL3. XI, TEST3 VDD = 2.7V to 3.6V IOH = -1mA VDD - 1.0 0 Min 2.7 0.85 VDD 0.8 VDD VDD - 0.5 0.2 VDD 0.3 VDD 0.4 V V V V VDD V Typ Max 3.6 Unit V .com www.telechips.com +822-3443-6792 9/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 VDD = 2.7V to 3.6V Output low voltage VOL1 IOH = 5mA All output pins ILIH1 VIN = VDD All input pins except ILIH2. VIN = VDD XI, TEST3 VIN = 0V All input pins except ILIL2. VIN = 0V XI, TEST3, RESET VOUT = VDD All I/O pins and output pins VOUT = 0V All I/O pins and output pins -20 20 3 1.0 V Input high leakage current ILIH2 Input low leakage current ILIL1 -3 uA ILIL2 Output high leakage current Output low leakage current ILOH 5 ILOL - - -5 t4U.com RL1 Pull-up resister RL2 .com VIN = 0V, VDD = 3V, TA = 25C All input pins except RL2. VIN = 0V, VDD = 3V, TA = 25C RESET only VDD = 3V 10% 50 100 200 K DataShee 100 250 400 IDD1 40MHz crystal oscillator VDD = 3V 10% 32.768KHz crystal oscillator 45 150 80 mA 300 uA Supply current IDD2 Idle mode: VDD = 3V 10% 40MHz crystal oscillator Idle mode: VDD = 3V 10% 32.768KHz crystal oscillator IDD3 Stop mode VDD = 3V 10% - 8 16 mA 15 30 uA 1 10 uA .com www.telechips.com +822-3443-6792 10/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 Table 3.3 AC Electrical Characteristics (TA = -40C to +85C, VDD = 2.7V to 3.6V) Parameter Interrupt input high, low width RESET input low width Symbol tINTH, tINTL tRSL Conditions PG.0-PG.1, PD.0-PD.7 at VDD = 3V VDD = 3V Min 200 Typ Max Unit ns 10 - - us tINTL tINTH 0.8 VDD 0.2 VDD t4U.com .com DataShee Fig 3.1 Input Timing for External Interrupts (PD, PG) tRSL RESET 0.2 VDD Fig 3.2 Input Timing for RESET .com www.telechips.com +822-3443-6792 11/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 Table 3.4 Input/Output Capacitance (TA = -40C to +85C, VDD = 0V) Parameter Input capacitance Output capacitance I/O capacitance Symbol CIN COUT CIO Conditions f = 1MHz, unmeasured pins are returned to VSS. Min Typ Max Unit - - 10 pF Table 3.5 AC Electrical Characteristics (TA = -40C to +85C, VDD = 2.7V to 3.6V, VSS = 0V) Parameter Resolution Integral Linearity Error ILE AVREF = 3.3V Symbol Conditions Min Typ 10 1 Max Unit t4U.com Differential Linearity Error Offset Error of Top Offset Error of Bottom Conversion Time Analog input voltage Analog input impedance Analog reference voltage Analog ground Analog input current Analog block current .com DLE EOT EOB tCON VIAN RAN AVSS = 0V 20 AVSS 2 1 0.5 1000 1 2 2 AVREF us V M LSB DataShee AVREF AVSS IADIN IADC AVREF = VDD = 3.3V AVREF = VDD = 3.3V AVREF = VDD = 3V VDD VSSv - VDD VSS 10 3 1.5 V V uA mA mA - 1 0.5 .com www.telechips.com +822-3443-6792 12/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 Table 3.6 Data Retention Supply Voltage in Stop Mode (TA = -40C to +85C, VDD = 2.7V to 3.6V) Parameter Data retention supply voltage Data retention supply current Symbol VDDDR Conditions Min 2 Typ Max 3.6 Unit V IDDDR VDDDR = 2V - - 1 uA RESET Occur Stop Mode Data Retention Mode VDD Execution of STOP Instruction Oscillation Stabilization Time Normal Operating Mode VDDDR t4U.com RESET .com 0.2 VDD NOTE : tWAIT is t2048 X 16 X 1/system_clk tWAIT DataShee Fig 3.3 Stop Mode Release Timing When Initiated by a RESET Oscillation Stabilization Time Osc Start up time Stop Mode Data Retention Mode VDD Execution of STOP Instruction Normal Operating Mode VDDDR INT 0.2 VDD tWAIT NOTE : tWAIT is 2048 X 16 X 1/system_clk. The value of 2048 which is selected for the clock source of the basic timer counter can be changed. then the value of tWAIT wil be changed. Fig 3.4 Stop Mode Release Timing When Initiated by Interrupts .com www.telechips.com +822-3443-6792 13/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 Table 3.7 Synchronous SIO Electrical Characteristics (TA = -40C to +85C, VDD = 2.7V to 3.6V, VSS = 0V, System Clock = 30MHz) Parameter MMC_SCLK cycle time Serial clock high width Serial clock low width Serial output data setup time Serial input data setup time serial input data hold time Symbol tCYC Conditions Min 200 Typ Max Unit tSCKH - 60 - - tSCKL - 60 - ns tOD - - - 50 tID - 40 - - tIH - 100 - - t4U.com .com DataShee tCYC tSCKL MMC_SCLK tSCKH 0.8 VDD 0.2 VDD tID MMC_DI tOD MMC_DO Output Data Input Data tIH 0.8 VDD 0.2 VDD Fig 3.5 Serial Data Transfer Timing .com www.telechips.com +822-3443-6792 14/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 Table 3.8 Oscillator Frequency (TA = -40C to +85C, VDD = 2.7V to 3.6V) Oscillator Clock Circuit Test Conditions Min Typ Max Unit XIN Crystal XOUT Oscillation frequency 32 32.768 35 KHz C1 C2 Stabilization time 1 3 s XIN External Clock XOUT XIN input frequency 32 35 KHz XIN input high and low t4U.com .com, tXL) level width(tXH 14 - 1 us DataShee NOTE : Oscillation stabilization time is the time that the amplitude of a oscillator input reaches to 0.8 VDD. 1/fosc1 tXL XIN tXH VDD-0.1V 0.1V Fig 3.6 Clock Timing Measurement at XIN .com www.telechips.com +822-3443-6792 15/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 Table 3.9 External SDRAM Access Electrical Characteristics (TA = -40C to +85C, VDD = 2.7V to 3.6V, VSS = 0V) Parameter ICLK cycle time NDCS ready time NRAS ready time NCAS ready time NDWE ready time BA ready time EXTDA ready time DATA ready time DATA setup time Symbol tCYC tDndcs tDnras tDncas tDndwe tDba tDextda tDdbo tDdbi Conditions Min 12.5 3 3 3.3 3 3 3.8 3.4 4.8 Typ Max ns Unit SDRAM Read Timing Diagram t4U.com tDnras ICLK NDCS NRAS NCAS NDWE BA[1:0] tDndcs (tRAS= 4cyc, tRP=2cyc, tRCD=2cyc : burst-4 access) .com (Output load = 30pF) tCYC DataShee tDncas tDndwe tDextda EXTDA DB tSdbi Fig 3.7 SDRAM Read Timing .com www.telechips.com +822-3443-6792 16/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 SDRAM Write Timing Diagram (tRAS= 4cyc, tRP=2cyc, tRCD=2cyc : burst-4 access) (Output load = 30pF) tCYC tDnras ICLK NDCS NRAS NCAS NDWE BA[1:0] tDextda EXTDA DB tDndcs tDncas tDndwe t4U.com .com tSdbo DataShee Fig 3.8 SDRAM Write Timing .com www.telechips.com +822-3443-6792 17/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 Table 3.10 External SRAM Access Electrical Characteristics (TA = -40C to +85C, VDD = 2.7V to 3.6V, VSS = 0V) Parameter CS ready time CS low duration Address ready time OE falling delay OE rising delay NDWE ready time DATA ready time DATA hold time Symbol TDCS tCSlow tADS tDOE1 tDOE2 tDndwe tDAS tDAH 0 wait, System Clock = 80MHz 0 wait, System Clock = 80MHz Conditions Min 3 50(+Tw) 0 0 -2 3 4 2 8(+Tw) ns Typ Max Unit SRAM/NOR FLASH Read Timing Diagram (Read Cache 1 Line : 4 word access) (Output load = 30pF) t4U.com tDCS .com tDCS DataShee CLKOUT tDOE1 NSOE tCSlow NSCS tADS EXTDA tDOE2 DB tDAS Fig 3.9 SRAM Read Timing .com www.telechips.com +822-3443-6792 18/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 SRAM/NOR FLASH Write Timing Diagram (Read Cache 1 Line : 4 word access) (Output load = 30pF) tDWE CLKOUT NSWE NSCS EXTDA DB tDAH t4U.com .com Fig 3.10 SRAM Write Timing DataShee SRAM/NOR FLASH Write Timing Diagram (Wait Cycle = 1, 2, 3) (Output load = 30pF) TW1 CLKOUT TW1 TW2 TW1 TW2 TW3 NSWE NSCS EXTDA DB Fig 3.11 SRAM Write Timing (Wait Cycle = 1, 2, 3) .com www.telechips.com +822-3443-6792 19/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 DMA Transfer from External SRAM to Internal SRAM Timing Diagram (Output load = 30pF) tDOE1 NSOE tDOE2 NSCS tADS EXTDA ADD 0 ADD 1 ADD n DB tDAS DATA 0 DATA 1 DATA n t4U.com Fig 3.12 DMA Transfer Timing .com DataShee .com www.telechips.com +822-3443-6792 20/22 DataSheet 4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 4. PACKAGE DIMENSION 4.1 208 Pin FBGA 15.00 Specification V1.00 0.5 3/4 0.05 15.00 TCC731Y WCODE t4U.com .com DataShee 0.30 3/4 0.05 1.10 TYP. 0.80 TYP. 0.70 3/4 0.05 1.30 3/4 0.10 U T R P N M L K J H G F E D C B A A1 BALL PAD INDICATOR (NO SOLDER BALL) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 0.80 TYP. 1.10 TYP. Dimension : mm .com www.telechips.com +822-3443-6792 21/22 DataSheet4 U .com www..com TCC731 Single Chip Digital Audio Encoder/Decoder with MCU Apr. 21 2003 Specification V1.00 Revision History V1.00 Apr, 21, 2003 First released. t4U.com .com .com www.telechips.com +822-3443-6792 22/22 DataSheet 4 U .com |
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