View AZP52SG_4712597.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ARIZONA MICROTEK, INC.
AZP51 AZP52 AZP53 AZP54
Low Phase Noise Sine Wave to LVPECL Buffer/Divider
PACKAGE AVAILABILITY
FEATURES
BASE PART * * * * * * 3.0 to 3.6 V operating supply range LVPECL Outputs Optimized for Low Phase Noise Frequency Input to >650 MHz QFN 8 (1.5x1.5 mm), SC-70 or SOT-23 packages All Packages
Green / RoHS Compliant / Lead (Pb) Free AZP51 (/1)
PACKAGE
SC-70 Green / RoHS Compliant / Lead (Pb) Free SC-70 Green / RoHS Compliant / Lead (Pb) Free QFN 8 (1.5x1.5 mm) Green / RoHS Compliant / Lead (Pb) Free SOT-23 Green / RoHS Compliant / Lead (Pb) Free
PART NO.
AZP51SG AZP52SG
MARKING
D1G D2G D3 D4G
NOTES
1,2 1,2
AZP52 (/2)
AZP53 (/1,2)
AZP53PG
1,3
AZP54 (/1)
1 2 3
AZP54VG
1,2
Add R1 at end of part number for 7 inch , R2 for 13 inch Tape & Reel. Date code format: "Y" for year followed by "WW" for week. See Arizona Microtek web site for date code format.
DESCRIPTION
The AZP51 series is a family of sine wave to LVPECL buffers optimized for low phase noise. It is particularly useful in converting sine wave crystal or SAW based oscillator outputs into LVPECL outputs. The IC also includes an optional /2 function to provide better frequency range coverage when using a SAW based oscillator. The D input is internally biased to VDD/2. A sine wave input of at least 750 mv p-p ensures the AZP51 series meets its AC specifications. This input (D) should be capacitively coupled from the oscillator stage to ensure best output duty cycle. AZP51S (/1), AZP52S (/2), SC-70 Package The Enable input (EN) is active high with an internal pullup. When EN is high or not connected, the outputs (Q,Q) are active. When EN is low, Q and Q are disabled in a high impedance (tri-state) condition. Refer to the Functional Operation table for more information. AZP53P (/1, /2), QFN 8 1.5x1.5mm Package The EN_SEL input selects the operational polarity for the EN input, so the EN input can be set to active high or active low operation. Refer to the Functional Operation table for more information.
1630 S. STAPLEY DR., SUITE 127 * MESA, ARIZONA 85204 * USA * (480) 962-5881 * FAX (623) 505-2414 www.azmicrotek.com
AZP51 AZP52 AZP53 AZP54
AZP54V (/1) SOT-23 Package The Enable input (EN) is active low with an internal pulldown. When EN is low or not connected, the outputs (Q,Q) are active. When EN is high, Q and Q are disabled in a high impedance (tri-state) condition. Refer to the Functional Operation table for more information.
BLOCK DIAGRAMS
AZP51
AZP52
AZP53
AZP54
December 2009 * REV - 2
www.azmicrotek.com 2
AZP51 AZP52 AZP53 AZP54
SIGNAL DESCRIPTION PIN/PAD D Q,Q EN DIV_SEL EN_SEL VDD GND FUNCTION Sine or LVCMOS Input LVPECL Outputs Output Enable Divide Select (AZP53 only) Enable Select (AZP53 only) Positive Supply Negative Supply (Ground)
DIV-SEL OPERATION PART NUMBER AZP51 AZP54 AZP52 DIV-SEL -2 DIVIDE RATIO /1 /2 /1 /2
-2 NC1,L AZP53 H 1. NC - no connection 2. Internally connected
FUNCTIONAL OPERATION PART NUMBER AZP51 AZP52 INPUTS EN_SEL 2 7
EN NC1, H L NC1, L H NC1, H L NC1, L
D L H X5 L H X5 L H X5 L H X5
EN LOGIC
4
EN PULLUP/ PULLDOWN Pullup
OUTPUTS Q L8 H8 Z6 L8 H8 Z6 L8 H8 Z6 L H Z6 Q H8 L8 Z6 H8 L8 Z6 H8 L8 Z6 H L Z6
Active High
NC1, H AZP53 L -2
Active Low3 Active High4 Active Low3
Pulldown
Pullup
AZP54 1. 2. 3. 4. 5. 6. 7. 8.
Pulldown
H NC - no connection Internally tied Active Low: Output enabled when EN low, Tri-state when EN high Active High: Output enabled when EN high, Tri-state when EN low X - Don't care Z - High impedance EN_SEL input has an internal pullup resistor /1 modes only www.azmicrotek.com 3
December 2009 * REV - 2
AZP51 AZP52 AZP53 AZP54
AZP53P QFN 8, 1.5x1.5 mm
TOP VIEW
AZP51S, 52S SC-70
TOP VIEW
AZP54V SOT-23
TOP VIEW
December 2009 * REV - 2
www.azmicrotek.com 4
AZP51 AZP52 AZP53 AZP54
Absolute Maximum Ratings are those values beyond which device life may be impaired.
Symbol VDD VI TA TSTG Characteristic Power Supply Input Voltage Operating Temperature Range Storage Temperature Range Rating 0 to +5.5 -0.5 to VDD+0.5 -40 to +85 -65 to +150 Unit Vdc Vdc C C
DC Characteristics (VDD = 3.0V to 3.6V unless otherwise specified, TA = -40 to 85 C)
Symbol VOH Characteristic Output HIGH Voltage1 -40 C 25 C 85 C -40 C 25 C 85 C Conditions VDD = 3.3V Min 2.05 2.05 2.05 1.365 1.430 1.490 -10 2.0 0.8 50k 50k 50k 10k Typ Max 2.415 2.480 2.540 1.615 1.680 1.740 10
Unit
V
VOL IZ VIH VIL RPU RPD RP RBIAS IDD
Output LOW Voltage1 Output Leakage Current, Tristate2 High Level Input Voltage Low Level Input Voltage Pullup Resistor4 Pulldown Resistor4 Pullup/Pulldown Resistor5 Bias Resistor
VDD = 3.3V
V A V V
EN=Disable3 EN_SEL DIV_SEL4 EN EN_SEL DIV_SEL EN D Input to Internal VDD/2 Reference
4
Power Supply Current 22 35 mA 1. Specified with outputs terminated through 50 resistors to VDD - 2V or Thevenin equivalent. 2. Measured at Q/Q pins. 3. See functional tables for Disable state definition. 4. AZP53 only. 5. See functional operation table for pullup/pulldown mode selection.
AC Characteristics (VDD = 3.0V to 3.6V, TA = -40 to 85 C)
Characteristic Unit Min Max Output Rise/Fall1 0.25 0.7 ns tr / t f (20% - 80%) Maximum Input 650 MHz fMAX Frequency - Sine wave2 1,3,6 Propagation Delay tpd 1.0 3.0 ns D to Q/Q 1,4 Enable 200 ns ten EN to Q/Q 1,5 Disable 80 ns tdis EN to Q/Q dBc/ Phase Noise1,3 -158 nP 10 MHz offset Hz 1. Specified with outputs terminated through 50 resistors to VCC - 2V or Thevenin equivalent. 2. 750 mv p-p sine wave, AC coupled to D input. 3. 155 MHz 750 mv p-p sine wave input. 4. EN asserted (enabled) to Q/Q outputs producing specified VOH & VOL levels. 5. EN deasserted (disabled) to Q/Q outputs VOL min. 6. Measured from 50% D to 50% Q/Q. Symbol
December 2009 * REV - 2
www.azmicrotek.com 5
AZP51 AZP52 AZP53 AZP54 PACKAGE DIAGRAM P - QFN 8 1.5x1.5mm
Note: All dimensions are in mm
December 2009 * REV - 2 www.azmicrotek.com 6
AZP51 AZP52 AZP53 AZP54 PACKAGE DIAGRAM S - SC-70 6L
D e e
Gauge Plane Seating Plane
2.467
L HE C L E
C L
b
C
SYMBOL E
MIN 1.15 1.85 2.00 0.80 0.80 0.00
MAX 1.35 2.25 2.30 1.00 0.91 0.09
A2
A1
A
D HE A A2 A1 e
0.65 BSC 0.15 0.08 0.21 0.30 0.25 0.41
NOTE: 1. ALL DIMENSIONS ARE IN MILLIMETERS. 2. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH & GATE BURR.
b c L
December 2009 * REV - 2
www.azmicrotek.com 7
AZP51 AZP52 AZP53 AZP54 PACKAGE DIAGRAM V - SOT-23 6L
2.900.100 0.950 TYP. C L
5
0.950 TYP.
NOTE: 1. Dimensions and tolerances are as per ANSI Y14.5M, 1982. 2. Package surface to be matte finish VDI 11~13. 3. Die is facing up for mold. Die is facing down for trim/form, ie. reverse trim/form. 4. The footlength measuring is based on the gauge plane method.
5. Dimension are exclusive of mold flash and gate burr. 6. Dimension are exclusive of solder plating.
5
C L
0.350(MIN) 0.500(MAX) (6 PLCS)
10 TYP. (2 plcs)
1.600.100
1.150.150
10 TYP. (2 plcs)
0.05(MIN) 0.15(MAX)
2.800.200
SEATING PLANE
10 TYP. (2 plcs)
0~3
0.20 BSC
Gauge Plane
0.45
0.10
0.127
10 TYP. (2 plcs)
5
December 2009 * REV - 2
www.azmicrotek.com 8
AZP51 AZP52 AZP53 AZP54
Arizona Microtek, Inc. reserves the right to change circuitry and specifications at any time without prior notice. Arizona Microtek, Inc. makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Arizona Microtek, Inc. assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Arizona Microtek, Inc. does not convey any license rights nor the rights of others. Arizona Microtek, Inc. products are not designed, intended or authorized for use as components in systems intended to support or sustain life, or for any other application in which the failure of the Arizona Microtek, Inc. product could create a situation where personal injury or death may occur. Should Buyer purchase or use Arizona Microtek, Inc. products for any such unintended or unauthorized application, Buyer shall indemnify and hold Arizona Microtek, Inc. and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Arizona Microtek, Inc. was negligent regarding the design or manufacture of the part.
December 2009 * REV - 2
www.azmicrotek.com 9

▲Up To Search▲

Price & Availability of AZP52SG

	To Download AZP52SG Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .