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SP8T Antenna Switch for GSM/UMTS Dual Mode Handsets
Preliminary
PreliminaryCXM3539XR
Description
The CXM3539XR is SP8T antenna switch for Triple bands GSM and Triple bands UMTS dual mode handsets. The CXM3539XR has a 1.8V CMOS compatible decoder. The Sony GaAs junction gate pHEMT (JPHEMT) MMIC process is used for low insertion loss and high linearity. (Applications: Triple bands GSM/Triple bands UMTS Dual Mode Handsets)
Features
Low Insertion Loss: 0.30dB (Typ.) Tx1 (GSM Low Band Tx) 0.45dB (Typ.) Tx2 (GSM High Band Tx) 0.60dB (Typ.) TRx1 (UMTS Band I)
Low Voltage Operation:VDD = 2.5V No DC Blocking Capacitors Small package size: XQFN-24P-02 (2.2mm x 2.9mm x 0.4mm Max.) Lead-Free and RoHS Compliant
Structure
GaAs Junction Gate pHEMT (JPHEMT) MMIC Switch, CMOS Decoder
Absolute Maximum Ratings
(Ta = 25C) Bias voltage (VDD) Control voltage (CTL-A/B/C/D) Input power max. (Tx1) Input power max. (Tx2) Input power max. (TRx1, 2, 3) Input power max. (Rx1, 2, 4) Operating temperature range Storage temperature range 4 4 36 34 32 13 -35 to +85 -65 to +150 V V dBm (Duty cycle = 12.5 to 50%) dBm (Duty cycle = 12.5 to 50%) dBm dBm
C C
Note on Handling
GaAs MMIC's are ESD sensitive devices. Special handling precautions are required.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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PE09702
CXM3539XR
Block Diagram
SP8T Antenna Switch
Ant
TRx1 TRx2 TRx3 Tx1 Decoder Logic Tx2 Rx1 Rx2 Rx4
Pin Configuration
GND
GND 9
Tx1
Tx2
12 GND GND Rx1 Rx2 GND Rx4 GND 13 14 15 16 17 18 19 20 VDD
11
10
Ant 8 7 6 GND TRx3 TRx2 GND GND TRx1 GND 5 4 3 2 1 24 CTLA
24-pin XQFN (2.2mm x 2.9mm x 0.4mm Max.) Top View
21 CTLD
22 CTLC
23 CTLB
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CXM3539XR
Pin Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 GND TRx1 GND GND TRx2 TRx3 GND Ant GND Tx2 (DCS/PCS) GND Tx1 (GSM850/900M) Name Pin No. 13 14 15 16 17 18 19 20 21 22 23 24 GND GND Rx1 Rx2 GND Rx4 GND VDD CTLD CTLC CTLB CTLA Name
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CXM3539XR
RF Switch
Ant Ant
F1 F1
F2 F2 F9 F9
F14 F14 F10 F10
F7 F7
F16 F16
F18 F18
F3 F3
F4 F4
F6 F6 F17 F17 F19 F19
Tx1 Tx1
Tx2 Tx2
Rx1 Rx2 Rx4 Rx1 Rx2 Rx4
TRx1 TRx1
TRx2 TRx2
TRx3 TRx3
Truth Table
Vctl State A B C D F1 F2 L F3 L L F4 L L L H L L L L -- F6 L L L L
State Active Path 1
2 Tx1 Tx2 Rx1 Rx2 Rx4 TRx1 TRx2 TRx3
Switch State
F7 L L L L L F9 F10 F14 F16 F17 F18 F19
H H L L L L H H L
H L L L H H L H L
L L L H H L H H L
H H H H H H H H L
H L
L L L L L L --
H L H H
H
H H
L L L
L L
L L L L L L
H H H H H H L H
--
L L L L L L L
H H H H H H H L
--
H
L L L L L L --
3 4 5 6
7
H
L L L L L --
H H H L
L L --
H L
L L --
H L
L --
H H
H --
H H H
--
H L
--
8 9
H
--
Sleep
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CXM3539XR
Electrical Characteristics
Supply Voltage Value
(Ta = 25C) Item Bias voltage (VDD) Min. +2.5 Typ. +2.65 Max. +3.3 Unit V
Logic Value
(Ta = 25C) Item Control voltage (CTL-A/B/C/D) State High Low Min. +1.5 0 Typ. +1.8 -- Max. +3.3 +0.3 Unit V
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CXM3539XR
Specification 1
(Ta = 25C, VDD = 2.5V, Vctl = 1.5V) Item Symbol Ant-Tx1 Ant-Tx2 Ant-Rx1 Port
*1 *2 *3 *4 *3 *4 *3 *4 *5 *6 *5 *6
Condition
Min. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
Typ. 0.30 0.45 0.75 1.00 0.75 1.00 0.75 1.00 0.55 0.60 0.58 0.63 0.45 0.45 0.57 0.60 0.60 0.63 0.45 0.45 0.60 0.62 1.20 -52 -40 -52 -38 -53 -54 -56 -55 -56 -53
Max. 0.45 0.60 0.90 1.15 0.90 1.15 0.90 1.15 0.70 0.75 0.73 0.78 0.60 0.60 0.72 0.75 0.75 0.78 0.60 0.60 0.75 0.77 1.50 -36 -35 -36 -33 -39 -39 -39 -39 -39 -39
Unit
Ant-Rx2
Ant-Rx4
Ant-TRx1
Insertion loss
IL
dB
Ant-TRx2
*7 *8 *9 *10 *5 *6
Ant-TRx3
*7 *8 *9 *10
VSWR
VSWR 2fo 3fo 2fo 3fo
All ports in Active Paths Tx1-Ant
824 to 2170MHz
*1
--
Tx2-Ant
*2
Harmonics
2fo 3fo 2fo 3fo 2fo 3fo
TRx1-Ant
*5
dBm
TRx2-Ant
*7,*9
TRx3-Ant
*7,*9
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CXM3539XR
Item
Symbol TRx1-Ant
Port
Condition
*11, *19 *12, *19
Min. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
Typ. -106 -108 -106 -117 -106 -105 -116 -105 -105 -108 -109 -104 -107 -108 3 1 0.18 1
Max. -97 -97 -97 -97 -97 -97 -97 -97 -97 -97 -97 -97 -97 -97 5 5 0.40 10
Unit
TRx2-Ant IMD2
*13, *19 *14, *19 *12, *19
TRx3-Ant Intermodulation distortion level in Rx band
*13, *19 *14, *19
TRx1-Ant
*15, *19 *16, *19
dBm
TRx2-Ant IMD3
*17, *19 *18, *19 *16, *19
TRx3-Ant
*17, *19 *18, *19
Switching time Control current Supply current Sleep current
Ts Ictl Idd Isleep
50%Ctl to 90%RF Vctl = 1.80V VDD = 2.65V Sleep Mode *State9 VDD = 2.65V
s A mA A
Electrical Characteristics are measured with all RF ports terminated in 50.
*1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 *14 *15 *16 *17 *18 *19
Pin on Tx1: 34dBm, 824 to 915MHz, Tx1 enabled Pin on Tx2: 32dBm, 1710 to 1910MHz, Tx2 enabled Pin on Ant: 10dBm, 869 to 960MHz, Rx1, Rx2 or Rx4 enabled Pin on Ant: 10dBm, 1805 to 1990MHz, Rx1, Rx2 or Rx4 enabled Pin on TRx1, TRx2 or TRx3: 26dBm, 1920 to 1980MHz, TRx1, TRx2 or TRx3 enabled Pin on Ant: 10dBm, 2110 to 2170MHz, TRx1, TRx2 or TRx3 enabled Pin on TRx2 or TRx3: 26dBm, 824 to 849MHz, TRx2 or TRx3 enabled Pin on Ant: 10dBm, 869 to 894MHz, TRx2 or TRx3 enabled Pin on TRx2 or TRx3: 26dBm, 1710 to 1910MHz, TRx2 or TRx3 enabled Pin on Ant: 10dBm, 1805 to 1990MHz, TRx2 or TRx3 enabled Pin on TRx1: 20dBm, 1950MHz, Pin on Ant: -15dBm, 190MHz, TRx1 enabled Pin on TRx2 or TRx3: 20dBm, 1745MHz, Pin on Ant: -15dBm, 95MHz, TRx2 or TRx3 enabled Pin on TRx2 or TRx3: 20dBm, 1880MHz, Pin on Ant: -15dBm, 80MHz, TRx2 or TRx3 enabled Pin on TRx2 or TRx3: 20dBm, 835MHz, Pin on Ant: -15dBm, 45MHz, TRx2 or TRx3 enabled Pin on TRx1: 20dBm, 1950MHz, Pin on Ant: -15dBm, 1760MHz, TRx1 enabled Pin on TRx2 or TRx3: 20dBm, 1745MHz, Pin on Ant: -15dBm, 1650MHz, TRx2 or TRx3 enabled Pin on TRx2 or TRx3: 20dBm, 1880MHz, Pin on Ant: -15dBm, 1800MHz, TRx2 or TRx3 enabled Pin on TRx2 or TRx3: 20dBm, 835MHz, Pin on Ant: -15dBm, 790MHz, TRx2 or TRx3 enabled Measured with the recommended circuit
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CXM3539XR
Specification 1-Isolation
(Ta = 25C, VDD = 2.5V, Vctl = 1.5V) Item Symbol Path Active Isolation Tx1-Rx1 Tx1-Rx2 Tx1-Rx4 Tx1 Tx1-TRx1 Tx1-TRx2 Tx1-TRx3 Tx1-Tx2 Tx1-Tx2 Tx2-Rx1 Tx2-Rx2 Tx2-Rx4 Tx2 Tx2-TRx1 Tx2-TRx2 Tx2-TRx3 Tx2-Tx1 TRx1-Rx1 TRx1-Rx2 Isolation ISO TRx1-Rx4 TRx1 TRx1-TRx2 TRx1-TRx3 TRx1-Tx1 TRx1-Tx2 TRx2-Rx1 TRx2-Rx2 TRx2-Rx4 TRx2-TRx1 TRx2-TRx3 TRx2-Tx1 TRx2 TRx2-Tx2 TRx2-Rx1 TRx2-Rx2 TRx2-Rx4 TRx2-TRx1 TRx2-TRx3 TRx2-Tx1 TRx2-Tx2 1710 to 1910MHz 824 to 849MHz 1920 to 1980MHz 1710 to 1910MHz 1648 to 1830MHz 824 to 915MHz Condition Min. 35 35 35 25 25 25 25 18 35 35 35 20 20 20 16 30 30 30 27 23 17 20 30 30 30 20 20 20 20 30 30 30 18 18 17 20 Typ. 46 55 57 29 48 38 28 22 51 55 55 23 38 31 19 52 57 54 34 26 19.5 28 59 60 60 28 28 26 43 52 57 56 21 20.5 19.5 33 Max. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- dB Unit
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CXM3539XR
Item
Symbol
Path Active Isolation TRx3-Rx1 TRx3-Rx2 TRx3-Rx4 TRx3-TRx1 TRx3-TRx2 TRx3-Tx1 TRx3-Tx2 TRx3-Rx1 TRx3-Rx2 TRx3-Rx4 TRx3-TRx1 TRx3-TRx2 TRx3-Tx1 TRx3-Tx2
Condition
Min. 30 30 30
Typ. 59 60 59 29 30 26 43 52 57 55 22 22 19.5 36
Max. -- -- -- -- -- -- -- -- -- -- -- -- -- --
Unit
824 to 849MHz
20 20 20 20 30 30 30
Isolation
ISO
TRx3
dB
1710 to 1910MHz
18 18 17 20
Electrical Characteristics are measured with all RF ports terminated in 50.
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CXM3539XR
Recommended Circuit
Tx1
Tx2
Ant C1 L1 9 8 7 6 TRx3 TRx2 5 4 3 2 1 TRx1 23
C2
12 13 14 Rx1 Rx2 15 16 17 Rx4 18 19 20
C2
11
10
24-pin XQFN (2.2mm x 2.9mm x 0.4mm Max.) Top View
21
C2
22
C2
24 C2 100pF
CTLD
CTLC
VDD
CTLB
Note) 1. No DC blocking Capacitors are required on all RF ports. 2. DC levels of all RF ports are GND. 3. L1 Inductor(22nH) and C1 Capacitor(22pF) are recommended on Ant port for ESD protection. 4. C2 Capacitor (100pF) is recommended.
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CTLA
CXM3539XR
PCB Layout Template
XQFN-24P-02 Macro for MMIC (Reference)
Specification * PKG size: * Terminal pitch: * Terminal length: * Mask thickness: 2.9mm x 2.2mm t0.35mm 0.35mm 0.25mm 0.11mm 3.3 2.9 (PKG size) 1.8
2.2 (PKG size)
2.6
1.1
0.35
4-
R0 .2
Detail A
0.28 R0.05 0.2
0.28 0.2
R0.05 C0.1 C0.05
0.5
0.25
PKG Outline 0.2
0.35
Detail A
: Land area : Board resist open area : PKG outline
: Mask open area (Solder printing area) : Metal area in board (GND plane is recommended.)
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CXM3539XR
Package Outline
(Unit: mm)
LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18m
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Sony Corporation

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