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APT48M80B2 APT48M80L
800V, 49A, 0.19 Max
N-Channel MOSFET
Power MOS 8TM is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar strip design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
T-Max(R)
TO-264
APT48M80B2
APT48M80L
D
Single die MOSFET
G S
FEATURES
* Fast switching with low EMI/RFI * Low RDS(on) * Ultra low Crss for improved noise immunity * Low gate charge * Avalanche energy rated * RoHS compliant
TYPICAL APPLICATIONS
* PFC and other boost converter * Buck converter * Two switch forward (asymmetrical bridge) * Single switch forward * Flyback * Inverters
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25C Continuous Drain Current @ TC = 100C Pulsed Drain Current
1
Ratings 49 30 173 30 1979 24
Unit
A
Gate - Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RJC RCS TJ, TSTG TL WT Characteristic Total Power Dissipation @ TC = 25C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight Min -55 Torque Mounting Torque (TO-264 Package), 4-40 or M3 screw Typ 0.11 0.22 6.2 Max 1135 0.11 150 300 10 1.1 C oz g in*lbf N*m
5-2009 050-8162 Rev B
Unit W C/W
Microsemi Website - http://www.microsemi.com
Static Characteristics
Symbol VBR(DSS) VBR(DSS)/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS Parameter Drain-Source Breakdown Voltage
TJ = 25C unless otherwise specified
Test Conditions VGS = 0V, ID = 250A
Reference to 25C, ID = 250A
APT48M80B2_L
Typ 0.87 0.17 3 4 -10 100 500 100 0.19 5 Max Unit V V/C V mV/C A nA
Min 800
Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
VGS = 10V, ID = 24A VGS = VDS, ID = 2.5mA VDS = 800V VGS = 0V TJ = 25C TJ = 125C
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
VGS = 30V
Dynamic Characteristics
Symbol Parameter Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance
4 5
TJ = 25C unless otherwise specified
Test Conditions VDS = 50V, ID = 24A VGS = 0V, VDS = 25V f = 1MHz Min Typ 43 9330 160 930
VGS = 0V, VDS = 0V to 533V
Max
Unit S
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
pF
Effective Output Capacitance, Charge Related Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
440 220 305 51 155 55
VGS = 0 to 10V, ID = 24A, VDS = 400V
nC
Resistive Switching VDD = 400V, ID = 24A RG = 2.2 , VGG = 15V
6
75 230 70
ns
Source-Drain Diode Characteristics
Symbol IS ISM VSD trr Qrr dv/dt
1 2 3 4 5
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
G S D
Min
Typ
Max 49 173
Unit A V nS C
ISD = 24A, TJ = 25C, VGS = 0V
ISD = 24A 3 diSD/dt = 100A/s, TJ = 25C ISD 24A, di/dt 1000A/s, VDD = 533V, TJ = 125C
0.8 970 22
1.0
10
V/ns
Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. Starting at TJ = 25C, L = 6.9mH, RG = 25, IAS = 24A. Pulse test: Pulse Width < 380s, duty cycle < 2%. Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -8.32E-8/VDS^2 + 3.49E-8/VDS + 1.30E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
050-8162 Rev B
5-2009
100
V
GS
50
= 10V T = 125C
APT48M80B2_L
J
V
TJ = -55C
GS
= 10&15V 6V 5.5V
80 ID, DRAIN CURRENT (A) ID, DRIAN CURRENT (A)
40
60
TJ = 25C
30
5V
40
TJ = 125C
20
20
TJ = 150C
10
4.5V 4V
0
0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
NORMALIZED TO VGS = 10V @ 24A
0
0
5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
VDS> ID(ON) x RDS(ON) MAX.
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
3.0 2.5 2.0 1.5 1.0 0.5
160 140 ID, DRAIN CURRENT (A) 120 100 80 60 40 20 0 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics Ciss
TJ = -55C TJ = 25C TJ = 125C
250SEC. PULSE TEST @ <0.5 % DUTY CYCLE
0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C) Figure 3, RDS(ON) vs Junction Temperature 80 70
20,000 10,000
gfs, TRANSCONDUCTANCE
TJ = -55C TJ = 25C TJ = 125C
C, CAPACITANCE (pF)
60 50 40 30 20 10 0 0
1000
Coss 100 Crss 10
10 20 30 40 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current
ID = 24A
50
16 VGS, GATE-TO-SOURCE VOLTAGE (V) ISD, REVERSE DRAIN CURRENT (A) 14 12 10 8 6 4 2 50 100 150 200 250 300 350 400 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 0 0
VDS = 400V
100 200 300 400 500 600 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 160 140 120 100 80 60 40 20 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage 0 0 5-2009 050-8162 Rev B
TJ = 150C TJ = 25C
0
VDS = 160V
VDS = 640V
APT48M80B2_L
200 100
IDM
200 100
IDM
ID, DRAIN CURRENT (A)
10
13s Rds(on) 100s 1ms 10ms TJ = 125C TC = 75C 100ms DC line
ID, DRAIN CURRENT (A)
10
13s Rds(on) TJ = 150C TC = 25C 100s 1ms 10ms
1
1
Scaling for Different Case & Junction 100ms Temperatures: ID = ID(T = 25C)*(TJ - TC)/125 DC line
0.1
1
10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area
0.1
C
10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area
1
0.12 ZJC, THERMAL IMPEDANCE (C/W) 0. 1 0.08 0.06 0.04 0.02 0 D = 0.9
0.7
0.5
Note:
PDM
t1 t2
0.3 0.1 0.05 10
-5
t1 = Pulse Duration
SINGLE PULSE 10
-4
Duty Factor D = 1/t2 Peak TJ = PDM x ZJC + TC
t
10-3 10-2 10 -1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
1.0
T-MAX(R) (B2) Package Outline
4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 15.49 (.610) 16.26 (.640) 5.38 (.212) 6.20 (.244)
TO-264 (L) Package Outline
e3 100% Sn Plated
4.60 (.181) 5.21 (.205) 1.80 (.071) 2.01 (.079) 19.51 (.768) 20.50 (.807) 3.10 (.122) 3.48 (.137) 5.79 (.228) 6.20 (.244)
Drain
20.80 (.819) 21.46 (.845)
Drain
25.48 (1.003) 26.49 (1.043)
4.50 (.177) Max. 0.40 (.016) 0.79 (.031)
2.87 (.113) 3.12 (.123) 1.65 (.065) 2.13 (.084) 2.29 (.090) 2.69 (.106) 19.81 (.780) 21.39 (.842)
2.29 (.090) 2.69 (.106)
5-2009
19.81 (.780) 20.32 (.800) 1.01 (.040) 1.40 (.055)
Gate Drain Source
0.48 (.019) 0.84 (.033) 2.59 (.102) 3.00 (.118)
Gate Drain Source
050-8162 Rev B
2.21 (.087) 2.59 (.102)
5.45 (.215) BSC 2-Plcs.
0.76 (.030) 1.30 (.051) 2.79 (.110) 3.18 (.125) 5.45 (.215) BSC 2-Plcs.
These dimensions are equal to the TO-247 without the mounting hole. Dimensions in Millimeters and (Inches)
Dimensions in Millimeters and (Inches)
Microsemi's products are covered by one or more of U.S. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743 and foreign patents. us and Foreign patents pending. All Rights Reserved.

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