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ML5805
5.8GHz Variable Data Rate FSK Transceiver with Integrated PA Preliminary Data Sheet
GENERAL DESCRIPTION
The ML5805 is a single chip fully integrated Frequency Shift Keyed (FSK) transceiver developed for a variety of applications operating in the 5.725GHz to 5.850GHz unlicensed ISM band. The ML5805 is mode selectable for operation with digital cordless phones (DSSS or DECT) and higher data rate streaming applications like wireless audio and video. The ML5805 contains a dual-conversion low-IF receiver with all channel selectivity on chip. IF filtering, IF gain, and demodulation are performed on-chip, eliminating the need for any external IF filters or production tuning. A post detection filter and a data slicer are integrated to complete the receiver. The ML5805 transmitter uses an adjustment-free closed loop modulator, which modulates the on-chip VCO with filtered data. The ML5805 includes an upconversion mixer, a buffer/predriver, and a power amplifier to produce a typical output power of +21dBm. A fully integrated fractional synthesizer is used in both receive and transmit modes. Power supply regulation is included in the ML5805, providing circuit isolation and consistent performance over supply voltages between 2.8V-3.6V.
FEATURES
Highly integrated 5.8GHz FSK Transceiver with selectable data rates; 576kbps, 1.152Mbps, 1.536Mbps, 1.755Mpbs, 2.048Mbps Fractional-N synthesizer with 30 Hz resolution Low-IF receiver eliminates external IF filters Fully integrated digital FIR Tx data filter, IF filters, FM discriminator, and Rx data filter. Self-calibrating VCO and filters eliminate tuning. Operating Modes include DSSS-DCT, DECT, and high rate (2.048Mbps) for wireless audio and video -97dBm sensitivity (0.1%BER) with Integrated LNA +21dBm typical output power from Integrated PA Includes FastWaveTM embedded wireless microcontroller technology Simple 3-wire control interface TR PIN diode or FET switch driver outputs Analog RSSI output: 35mV/dB Selectable Rx clock recovery output 40 QFN package (6mm x 6mm)
PIN CONFIGURATION (TOP VIEW)
APPLICATIONS
Digital Cordless Telephones DSSS & DECT Wireless Streaming Audio and Video Wireless Data Links
BLOCK DIAGRAM
ORDERING INFORMATION
PART NUMBER TEMP RANGE ML5805DM ML5805DM-T -10 C to +60 C -10 C to +60 C
o o o o
PACKAGE
PACK (QTY)
40 QFN 6x6 mm Antistatic Tray (490) 40 QFN 6x6 mm Tape & Reel (2500)
APRIL 2008
EDS-106041 REV P01
ML5805
TABLE OF CONTENTS
GENERAL DESCRIPTION ........................................................................................................................................... 1 PIN CONFIGURATION (TOP VIEW) ............................................................................................................................ 1 ORDERING INFORMATION ........................................................................................................................................ 1 FEATURES ................................................................................................................................................................... 1 APPLICATIONS ............................................................................................................................................................ 1 BLOCK DIAGRAM ........................................................................................................................................................ 1 TABLE OF CONTENTS ................................................................................................................................................ 2 ABSOLUTE MAXIMUM RATINGS ............................................................................................................................... 3 OPERATING CONDITIONS ......................................................................................................................................... 3 ELECTRICAL CHARACTERISTICS............................................................................................................................. 3 PIN DESCRIPTIONS.................................................................................................................................................... 6 FUNCTIONAL DESCRIPTION ................................................................................................................................... 12 MODES OF OPERATION........................................................................................................................................... 13 CONTROL INTERFACE ............................................................................................................................................. 14 TRANSMIT & RECEIVE DATA INTERFACES............................................................................................................ 17 SERIAL FREQUENCY WORD AND CONFIGURATION REGISTERS...................................................................... 20 RECOMMENDED CONFIGURATION REGISTER VALUES ..................................................................................... 26 TYPICAL PERFORMANCE DATA.............................................................................................................................. 27 PHYSICAL DIMENSIONS .......................................................................................................................................... 35 WARRANTY................................................................................................................................................................ 36
Caution! ESD sensitive device.
Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent damage to the device. Extended application of Absolute Maximum Rating conditions to the device may reduce device reliability. Specified typical performance or functional operation of the device under Absolute Maximum Rating conditions is not implied. RoHS status based on EUDirective2002/95/EC (at time of this document revision). The information in this publication is believed to be accurate and reliable. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents, or other rights of third parties, resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice.
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 2
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. Operating the device for any length of time beyond the operating conditions may degrade device performance and/or shorten operating lifetime. VCC ..........................................................................................................................................................VSS-0.3 to 3.6 V VCC_PA ...................................................................................................................................................VSS-0.3 to 4.5 V Junction Temperature............................................................................................................................................... 150C Storage Temperature Range ...................................................................................................................... -65C to 150C Lead Temperature (Soldering, 10s).......................................................................................................................... 260C
OPERATING CONDITIONS
Ambient Temperature Range (TA) ............................................................................................................... -10C to 60C VCC Range [VDD (pin 9), VCCSYN (pin 13), VCCPLL (pin 19), VCCA (pin27)]............................................2.8V to 3.6V VCC_PA Range [VCC_PA (pin31)]..................................................................................................................3.0V to 4.5V Thermal Resistance (JA)....................................................................................................................................... 36C/W
ELECTRICAL CHARACTERISTICS
Unless otherwise specified TA = 25C and the supply voltage is VCC=3.3V, VCC_PA=3.6V, RISET=381 Ohm, FREF=12.288MHz, DATA RATE=1.536Mbps, all measurements are normalized to the IC pins.
SYMBOL PARAMETER POWER SUPPLIES ISTBY IRX ITX ITXPA Supply current, STANDBY mode Supply current, RECEIVE mode Transmit supply current at VCC pins VCC_PA pin POUT=+21dBm POUT=+18dBm
1
CONDITIONS
MIN
TYP
MAX
UNITS
DC supply connected, XCEN low, RXON high RX chain active, data being received
2 69 77 100 78
A mA mA mA mA
SYNTHESIZER IP VTUNE tFH Charge Pump sink/source current VCO input voltage Lock time for any in band frequency change From EN asserted to RX valid data (RX) or PAON high (TX) NOIVCOC = 1 (no incremental VCO cal) @ 100 kHz PN Phase noise @ @ 1 MHz 2 MHz 0.3 110 0.2 2.5 mA V sec
55 -85 -116 -122 -134
sec
dBc/Hz
@ 10 MHz
1
Contact factory for configuration settings for this power setting.
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 3
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
SYMBOL PARAMETER CONDITIONS Data Rate=1.5360, 1.7554, and 2.0480Mbps Data Rate=576, 1,152Kbps Clipped sine, AC coupled 0.5 MIN TYP 12.288 13.824 MAX UNITS MHz MHz VP-P
fFREF
Reference signal frequency
VFREF
Reference signal input level
RECEIVER FRXI ZRX Receive input frequency range Input Impedance Data Rate=1.1520Mbps FSTEP Channel Spacing Data Rate=1.5360Mbps Data Rate=1.7554Mbps Data Rate=2.0480Mbps <0.1%BER@1.1520Mbps SRXI Input Sensitivity <0.1%BER@1.5360Mbps <0.1%BER@1.7554Mbps <0.1%BER@2.0480Mbps PIN TSLICE PRXI IRR ACR RF Input Power Data Slicer Time Constant RX conducted emissions at RXI RX Chain Image rejection ratio RX adjacent channel(s) rejection Wanted signal = -80dBm, PN20, CW Interfering signal, 0.1% BER 1 channel offset 2 channels offset 3 or more channels offset Wanted signal = -80dBm, Unwanted signal is GFSK modulated with 1.536Mbps PRBS data, BT=0.9 <0.1%BER@ 1.1520Mbps, 1.5360Mbps, 1.7554Mbps, and 2.0480Mbps DATASEL= VIH DATASEL= VIL RXI terminated in 50 ohms 28 15 40 45 -9 6 300 -50 5.725 100 Ohm Differential 1.728 2.048 4.096 4.096 -97 -97 -97 -96 +10 dBm uS uS dBm dB dB dB dB dB dBm MHz 5.850 GHz
CCR
Co-Channel rejection, 0.1% BER
RSSI tR_RSSI tF_RSSI VRSMX VRSMD VRSMN GRSSI RSSI rise time, 20% to 80% RSSI fall time, 80% to 20% RSSI maximum voltage RSSI midrange voltage RSSI minimum voltage RSSI sensitivity RSSI accuracy TRANSMITTER FTXO PTXO Transmit input frequency range TX output power at 5.8GHz Matched into 50 ohms 5.725 21 5.850 GHz dBm 20pF loading on RSSI pin RF off to -15dBm 20pF loading on RSSI pin -15dBm to RF off -10 dBm into RXI -40 dBm into RXI No signal applied (V-40dBm - V-50dBm)/10dB Deviation from best fit straight line 5 5 2.7 2.5 0.2 35 3 10 10 sec sec V V V mV/dB dB
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 4
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
SYMBOL PARAMETER CONDITIONS Data Rate=1.1520Mbps FDEV Transmit Modulation Deviation Data Rate=1.5360Mbps Data Rate=1.7554Mbps Data Rate=2.0480Mbps ZTXO BT Output Impedance Transmit Filter Bandwidth / Symbol Rate Ratio at TXO pin Data Rate=1.1520Mbps Data Rate=1.5360Mbps Data Rate=1.7554Mbps Data Rate=2.0480Mbps PSPUR PLO PHarm PLL reference spurious TX LO feed through, LO harmonics 2 and sub-harmonics TX Harmonics, PTXO =+21dBm VFREF < 2 Vp-p clip-sine PTXO =+21dBm, FSPUR =1/3, 2/3, 4/3, and 5/3 FTXO 2 Harmonic 3 Harmonic INTERFACE LOGIC LEVELS CMOS DIGITAL INPUT PINS (XCEN, RXON, DIN, DATASEL) VIH VIL IB CIN VOH VOL Io VOH VOL VOH VOL Input high voltage Input low voltage Input bias current Input capacitance All states 1MHz test frequency VDD*0.7 0 -5 4 VDD VDD*0.3 5 V V A pF
rd nd
MIN
TYP 400 512 596 680 TBD 0.5 0.9 0.8 0.7 -70 -40 -45 -25
MAX
UNITS
kHz
dBc dBc dBc dBc
CMOS DIGITAL OUTPUT PINS (SW_CTRL, RXCLK, DOUT) SW_CTRL output high voltage SW_CTRL output low voltage SW_CTRL source/sink current RXCLK (recovered clock) output high voltage RXCLK (recovered clock) output low voltage DOUT (data output) output high voltage DOUT (data output) output low voltage Sourcing 0.1mA Sinking 0.1mA Sourcing 0.1mA Sinking 0.1mA VDD-0.4 0.4 Sourcing 5.0mA Sinking 5.0mA 5.0 VDD-0.4 0.4 8.0 VDD-0.4 0.4 V V mA V V V V
ANALOG OUTPUT PINS (AOUT) VODC VOPK tr tf tck tew tl Quiescent output voltage @ AOUT Output voltage swing @ AOUT 1.15 0.8 V VP-P 15 15 50 200 15 ns ns ns ns ns
3 WIRE SERIAL BUS TIMING CLK input rise time (note 1) CLK input fall time (note 1) CLK period EN pulse width Delay from last clock rising edge to rise of EN
2
TX frequency = FTXO, TX power = PTXO
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 5
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
SYMBOL PARAMETER tse ts th EN setup time to ignore next rising CLK DATA-to-CLK setup time DATA-to-CLK hold time CONDITIONS MIN 15 15 15 TYP MAX UNITS ns ns ns
Note 1: Serial I/O clock maximum rise and fall times are based on the minimum clock period. Longer rise and fall times can be accommodated for slower clocks provided the rise and fall times remain less than 20% of the clock period and all set up and hold time minimums are met with respect to the CMOS switching points (VIL MAX and VIH MIN). The serial I/O clock rise and fall times are limited to an absolute maximum of 100ns.
PIN DESCRIPTIONS
PIN SIGNAL NAME I/O FUNCTION DIAGRAM
POWER & GROUND
5 9 10 VSSD VDD VREG_1P8 GND PWR/I PWR/O (Decouple) 11 VBG_1P8 PWR/O (Decouple) 13 17 VCCSYN VREGVCO PWR/I PWR/O (Decouple) 18 VREGPLL PWR/O (Decouple) 19 VCCPLL PWR/I (Decouple) 20 VBG_VCO PWR/O (Decouple) 21 VREGLNA PWR/O (Decouple) 24 VREGRX PWR/O (Decouple) 25 26 VBG_RF VREGTX PWR/O (Decouple) PWR/I (Decouple) Digital ground for all digital I/O circuits and control logic. 3.3VDC power supply input 1.8VDC regulator output. Place capacitor between this pin and ground to decouple (bypass) noise and to stabilize the regulator. 1.13VDC bandgap voltage output. Place capacitor between this pin and ground to decouple (bypass) noise. 2.7VDC power supply input. Must be connected to VREGPLL pin externally. 2.5VDC regulator output. Place capacitor between this pin and ground to decouple (bypass) noise and to stabilize the regulator. 2.7VDC power supply output. Place capacitor between this pin and ground to decouple (bypass) noise and to stabilize the regulator. 3.3VDC power supply input. Place capacitor between this pin and ground to decouple (bypass) noise. 1.13VDC bandgap voltage output. Place capacitor between this pin and ground to decouple (bypass) noise 2.7VDC regulator output. Place capacitor between this pin and ground to decouple (bypass) noise and to stabilize the regulator. 2.7VDC regulator output. Place capacitor between this pin and ground to decouple (bypass) noise and to stabilize the regulator. Bandgap 1.24V decouple voltage. Decoupled to ground with a capacitor. 2.7VDC power supply input. Must be connected to VREGRX pin externally. N/A N/A N/A
N/A
N/A N/A
N/A
N/A
N/A
N/A
N/A
N/A N/A
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 6
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
PIN
27 30
SIGNAL NAME
VCCA VBG_PA
I/O
PWR/I PWR/O (Decouple)
FUNCTION
3.3VDC power supply input 1.13VDC bandgap voltage output. Place capacitor between this pin and ground to decouple (bypass) noise Unregulated Battery DC Power Supply Input Programmable 3.6VDC/3.4VDC/3.3VDC regulator output. Place capacitor between this pin and ground to decouple (bypass) noise and to stabilize the regulator. 2.7VDC regulator output. Place capacitor between this pin and ground to decouple (bypass) noise and to stabilize the regulator. N/A N/A
DIAGRAM
31 32
VCC_PA VREGPA
PWR/I PWR/O (Decouple)
N/A N/A
33
VREGIF
PWR/O (Decouple)
N/A
TRANSMIT PINS
4 DIN I (CMOS) Transmit Data Input.
VDD
VDD VDD
DIN
VSSD
VSSD
VSSD
28 TXO O (analog) TX RF open-collector output. Connect this pin to VREGPA using an (RF blocking) inductor
29
ISET
I (analog)
TX ISET resistor.
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 7
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
RECEIVE PINS
22 RXIN I (analog) Differential receive RF Input.
23
RXIP
I (analog)
Differential receive RF Input.
34
TPI
I/O (analog)
RX/TX test port. Used to test or apply test signals to both RX and TX sections.
35
TPQ
I/O (analog)
RX/TX test port. Used to test or apply test signals to both RX and TX sections.
36
RSSI
I/O (analog)
Receive Signal Strength Indicator. Also used as RX/TX test port.
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 8
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
37 AOUT O (analog) Analog data output.
38
DOUT
O (CMOS)
Serial digital output after demodulation, bit rate filtering and center data slicing. CMOS levels with controlled slew rates.
OE (output enable)
VDD
VDD
VSSD
DOUT
VDD
VSSD
OEH VSSD (high drive output enable)
39
DATASEL
I/O (CMOS)
When TCMOD = 4 or 5, this pin becomes an input and it controls the time constant of the data slicer. When TCMOD = 4 or 5; DATASEL= VIH selects 6uS time constant DATASEL= VIL selects 300uS time constant -else-
VDD
OE (input enable)
VDD
-or-
VSSD
DATASEL
VDD
PLL_Lock
When TCMOD is not set to value 4 or 5, this pin becomes the PLL Lock/Unlock output PLL_Lock = VOH indicates PLL is locked PLL_Lock = VOL indicates PLL is not locked
VSSD
VSSD OE (output enable)
MODE CONTROL AND INTERFACE LINES
1 XCEN I (CMOS) Transceiver Enable input. Enables the bandgap reference and voltage regulators when high, enabling normal control functions. Consumes only leakage current in STANDBY mode when low. Operating mode = VIH Standby mode = VIL
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 9
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
2 RXON I (CMOS) TX/RX Control Input. Switches the transceiver between TRANSMIT and RECEIVE mode. Receive mode = VIH Transmit mode = VIL
VDD VDD
VDD
RXON
VSSD
VSSD
VSSD 3 SW_CTRL_P O (CMOS) TR switch control output, positive polarity. Logic high (VOH) while transmitting Logic low (VOL) while receiving
SW_CTRL_P
VDD VDD
VDD
VSSD
VSSD
VSSD
12
FREF
I (analog)
Input reference frequency.
14
PLL_SW
O (analog)
Loop filter control switch
15
QPO
O (analog)
Charge pump output of the phase detector. This is connected to the external PLL loop filter.
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 10
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
16 VTUNE I (analog) VCO Tuning Voltage input from the PLL loop filter. This pin is very sensitive to noise coupling and leakage currents.
40
SW_CTRL_N
O (CMOS)
TR switch control output, negative polarity. VOL while transmitting VOH while receiving
-orRXCLK
-orRecovered RXCLK clock output is multiplexed in this pin. When configured for RXCLK output, clock pulses may be observed for 6 to 8uS after the falling edge of RXON before settling to logic high (VIH).
SERIAL BUS SIGNALS
6 EN I (CMOS) Control Bus Enable. Enable pin for the threewire serial control bus. The control registers are loaded on the rising edge of this signal. Serial control bus data is ignored when this signal is high (VIH).
7
DATA
I (CMOS)
Serial Control Bus Data.
8
CLK
I (CMOS)
Serial control bus data is clocked in on the rising edge and only when EN is low.
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 11
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
FUNCTIONAL DESCRIPTION
Figure 1: ML5805 Block Diagram
The ML5805 is a single chip wireless digital transceiver. The ML5805 integrates all the frequency generation, receiver and transmit functions requiring only a TR switch to form a complete 5.725 - 5.850GHz ISM band radio. The ML5805 is designed to transmit and receive 576kbps to 2.048Mbps signals using channels spaced from 1.728MHz to 4.096MHz over the 5.725 - 5.850GHz ISM band.
RECEIVER
The ML5805 contains a dual conversion, low-IF receiver with all channel selectivity on-chip. The signal enters through a differential LNA to the 1st mixer which down-converts the 5.8GHz input to a high 1st IF of 1.9GHz, followed by an image reject 2nd mixer that brings this IF signal down to a low IF frequency. On chip IF filtering, gain and demodulation are performed at; a 864KHz IF frequency for the 576kbps and 1.152Mbps data rate, a 1.024MHz IF frequency for the 1.536Mbps data rate or a 2.048MHz IF frequency for the 1.755Mbps and 2.048Mbps data rates. No external filters or production tuning are required. A post detection filter and data slicer are also provided to complete the receiver. The DATASEL pin allows selection between two different time constants in the data slicer. Rx clock recovery is optionally performed for the 1.152Mbps, 1.536Mbps, 1.755Mpbs, 2.048Mbps data rate to aid those applications using a simple microcontroller based MODEM. A receive signal strength indication (RSSI) signal is also
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ML5805
provided. RSSI (an indication of field strength) can be used by the system to determine transmit power control (conserve battery life) and/or to determine if a given channel is occupied.
AUTOMATIC VCO AND FILTER ALIGNMENT
The VCO and IF filters are calibrated to remove process and temperature variation. IF filter and VCO calibration occurs when the chip is first powered on and at specified intervals during normal operation. This calibration is transparent to the normal operation of the ML5805 and is absorbed in the system timing shown in Figure 2 and Table 2. This selfcalibration adjusts: VCO center frequency Discriminator center frequency IF filter center frequency and bandwidth Receiver data low-pass filter bandwidth
TRANSMITTER AND PA
The ML5805 transmitter consists of an up-conversion mixer followed by a programmable gain amplifier to allow factory calibration of the output power, and finally a power amplifier (PA). The input data is filtered before being sent to an adjustment free VCO modulator. An FIR Gaussian pulse shaping filter is used followed by DAC and interpolation filter for clock rejection. The output of modulator is up-converted by a mixer and amplified with a PA to deliver 21dBm output power. A complementary T/R switch control output with adjustable timing is provided to control the external T/R switch.
PLL/SYNTHESIZER
A single, on-chip 3.9GHz fractional-N synthesizer is used to generate the receiver LO and transmit carrier. The VCO has an on chip resonator, active devices and tuning circuitry for a completely integrated VCO function. All required DC voltage regulation is within the IC. The PLL center frequency is programmed with a 23 bit word written via the SPI port during either standby or active operation. A lock detect circuit monitors the state of the PLL loop allowing the PA to be disabled prior to the PLL achieving lock in TRANSMIT mode. In RECEIVE mode, the synthesizer produces a low side LO frequency offset (compared to TX mode) to produce the required IF frequency.
MODES OF OPERATION
The ML5805 has three key modes of operation: STANDBY: RECEIVE: TRANSMIT: All circuits powered down, except the control interface (static CMOS) Receiver circuits active Transmitter circuits active
MODE CONTROL
The two operational modes controlled by RXON are RECEIVE and TRANSMIT. XCEN is the chip enable/disable control pin, which sets the device to either operational or STANDBY modes. The relationship between the parallel control lines and the mode of operation of the IC is summarized in Table 1.
XCEN
0 1 1
RXON
X 1 0
MODE NAME
STANDBY RECEIVE TRANSMIT Receiver time slot Transmit time slot
FUNCTION
Control interfaces active, all other circuits powered down
Table 1: Modes of Operation
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ML5805
STANDBY MODE
In STANDBY mode, the ML5805 transceiver is powered down. The only active circuits are the control interfaces, which are static CMOS to minimize power consumption. The serial control interface and control registers remain powered up and will accept and retain programming data as long as the VDD and VCCA are present.
RECEIVE MODE
In RECEIVE mode, the received signal at 5.8GHz is down converted, band pass filtered (IF filter), fed to the frequencyto-voltage converter, and then low-pass filtered. The output of the low-pass filter is available at both the AOUT pin and to the on-chip data slicer that produces NRZ digital data presented at the DOUT pin. An RSSI output voltage is also provided.
TRANSMIT MODE
In TRANSMIT mode, the PLL loop is closed to eliminate frequency drift. A closed loop FSK modulator modulates both the VCO and the fractional-N PLL. The VCO is directly modulated with filtered FSK transmit data. The PLL is driven by a sigma-delta modulator, which ensures that the PLL follows the mean frequency of the modulated VCO.
CONTROL INTERFACE
There are two types of Input/output (I/O) signals to control and monitor the ML5805; Discrete I/O and Serial input. Discrete I/O: XCEN, RXON, SW_CTRL_P, SW_CTRL _N, DATASEL Serial Control Bus: EN, DATA, CLK The ML5805 transceiver is used in time division duplex (TDD) mode, where the transceivers at each end of a radio link alternately transmit and receive. Prior to entering receive mode, the ML5805 goes through a `self-calibration' sequence, where the VCO, IF and data filters are frequency aligned. This occurs in the time period just before the PLL settles to the LO frequency. These calibration cycles are triggered by logic transitions on the control interface. Figure 2a and 2b show the normal operating cycle for the ML5805. Figure 2a shows the timing when register variable PAFIRST is set to 0, causing the switch control signals to change state before the PA is enabled. Figure 2b shows the timing when register variable PAFIRST is set to 1, causing the switch control signals to change state after the PA is enabled.
RF CONTROL: XCEN, RXON, SW_CTRL
The XCEN pin enables/disables the ML5805 and places the device in either STANDBY or ACTIVE modes. The RXON pin determines which active mode the ML5805 is in: RECEIVE or TRANSMIT. SW_CTRL_P and SW_CTRL_N are complimentary CMOS outputs with 5mA drive capability that control an off-chip T/R switch. They can directly drive PIN diodes. SW_CTRL_P outputs a logic high when RXON is asserted low and a logic low at all other times. The time delays between RXON and SW_CTRL_P are programmable are shown in Figure 2 and Table 3. These outputs are inhibited when the PLL is not locked.
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ML5805
XCEN tWAKE tMAX tRX2TX tTX2RX
RXON (Input)
SW_CTRL_N (Output)
SW_CTRL_P (Output) tTXONA DIN (Input) Valid TX Data tTXOFF
DOUT (Output)
Valid RX Data
Valid RX Data
PAON (Internal) tTXONB TXO Power
PAFIRST = 0 (The external switch controls SW_CTRL_P/N are switched before PA is turned on).
Figure 2a: Control Timing for TDD Operation, PAFIRST = 0
Figure 2b: Control Timing for TDD Operation, PAFIRST = 1
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ML5805
Table 2 shows the minimum time required between control interface transitions.
SYMBOL PARAMETER WORST CASE TIMING
325 NOIVCOC = 0 NOIVCOC = 1 NOIVCOC = 0 NOIVCOC = 1 tRX2TX tTXONA Time from falling edge on RXON to start of valid data on DIN pin. Some RF energy will be present on TXO during this period but PAON will be unasserted For the case where PAFIRST = 0: tTXONA defines the time between falling edge of RXON and rising edge of RF output power For the case where PAFIRST = 1: tTXONA defines the time between falling edge of RXON and rising edge of SW_CTRL_P tTXONA = 44S + TTXONA * 8 / f ref where TTXONA is an integer with range from 0 to 63 tTXONB For the case where PAFIRST = 0: tTXONB defines the time between rising edge of SW_CTRL_P and rising edge of RF output power For the case where PAFIRST = 1: tTXONB defines the time between rising edge of RF output power and rising edge of SW_CTRL_P tTXONB = 4.2S + TTXONB * 8 / f ref where TTXONB is an integer with range from 0 to 31 tTXOFF Time between falling edge of RF output power and falling edge of SW_CTRL_P signal tTXOFF = 3.5S + TTXOFF * 40 / f ref where TTXOFF is an integer with range from 0 to 3 3.5 to 13.5 sec 4.2 to 24.2 sec 44 to 85 sec 110 55 90 80 70 sec sec
UNITS
tWAKE tFH
Time from XCEN asserted to valid RECEIVE data out Time from rising edge of Serial Bus EN to valid RECEIVE data out (channel scan mode, one channel hop, PLL re-locking triggered by rising EN). Time from rising edge of RXON to valid RECEIVE data out
sec sec
tTX2RX
Table 2: Transceiver Control Interface Timing (using default register values)
Channel Scan Timing in Receive Mode
To implement channel scanning, the ML5805 is kept in RECEIVE mode (XCEN and RXON high) and the PLL is reprogrammed to select a different RF channel. A VCO and filter calibration cycle is initiated periodically after the serial bus writes to the register controlling the PLL. Any serial bus writes to the other registers (while XCEN = VIL (0)) will trigger a complete calibration cycle. Non-PLL register writes (R0 to R4) are only performed when XCEN = VIL (0). Otherwise, unstable operation will occur. Signal diagram for channel scanning is shown in Figure 3.
XCEN
tWAKE
tFH
EN (Write to PLL tuning register)
DOUT
Valid RX Data
Valid RX Data
Figure 3: Control Timing when Channel Scanning
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ML5805
TRANSMIT & RECEIVE DATA INTERFACES
There are two sets of transmit and receive data interfaces for the ML5805: Baseband Data: RF Data: DIN, DOUT, AOUT, RXCLK, FREF, RSSI RXIN, RXIP, TXO
Please refer to application schematic in Figure 4 for recommended component values.
BASEBAND DATA: DIN, DOUT, AOUT, RXCLK
The DIN pin is a CMOS logic level serial data input for 2-FSK modulation on the radio channel. This DIN pin drives data bits into the transmit modulator. There is no re-timing of the chips, so the transmitted 2-FSK chips take their timing from the DIN pin. The DOUT pin is a corresponding CMOS level digital data output. In DS-FSK mode the ML5805 is designed to operate as a Direct Sequence Spread Spectrum FSK transceiver in the 5.725 - 5.850GHz ISM band. The chip rate, bit rate and spreading code are determined in the baseband processor, and the FM deviation and transmit filtering are determined in the ML5805 transceiver. Setting the AOUT bit in the serial register turns the AOUT pin into a buffered, single ended output from the data filter. This can be used to drive an off chip data slicer, or an ADC input for a DSP data slicer. When using the digital output DOUT, FM demodulation, data filtering and center slicing take place in the ML5805 receiver. A clock recovery circuit at the data slicer output extracts the receiver clock RXCLK for those applications that do not have access to clock recovery circuitry. The FREF pin is the master reference frequency (fref ) input for the transceiver. It supplies the frequency reference for the RF channel frequency and the on-chip filter tuning. The FREF pin is a clipped sine input with on-chip biasing resistors. It can be driven by an AC coupled sine-wave or a CMOS 3 logic source. FREF is used as a calibration frequency and as a timing reference in the control circuits. The reference source must be accurate to 20 PPM. The RSSI (Received Signal Strength Indicator) pin supplies a voltage that indicates the amplitude of the received RF signal. The RSSI voltage is proportional to the logarithm of the received power level. It can be connected to the input of an ADC on the baseband IC, and is used during channel scanning to detect clear channels on which the radio can transmit.
RF DATA: RXIN, RXIP, TXO
The RXIN and RXIP receive input and the TXO transmit output are the only RF I/O pins. The RXIN and RXIP pins requires a single-ended to differential conversion from a 50 input impedance and a matching network for best input noise figure, and the TXO pin also requires a matching network for maximum power output into 50 (see Figure 4).
For V(fref ) > 1.5Vp-p, the level of the reference spurious response (fTX +/- fr ef ) to increases in proportion to V(fref ) . V(fref ) levels that exceed 2.0Vp-p will cause the typical reference spur to be greater than -70dBc.
3
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ML5805
Figure 4 ML5805 Application Schematic
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ML5805
SERIAL BUS CONTROL: EN, DATA, CLK
A 3-wire serial interface is used for programming the ML5805 configuration registers, which control device mode of operation, pin functions, PLL and reference dividers, internal test modes and filter alignment. Data words are entered beginning with the MSB. The 24 bit configuration register word consists of 5 bit address and 16 bit data fields.. When the address field has been decoded the destination register is loaded on the rising edge of EN. Note: Providing less than 24 bits of data will result in unpredictable behavior when EN goes high. Data and clock signals are ignored when EN is high. When EN is low, data on the DATA pin is clocked into a shift register by rising edges on the CLK pin. The information is loaded into the addressed latch when EN returns high. This serial interface bus is an industry standard bus commonly found on PLL devices. It can be efficiently programmed by either byte or 24-bit word oriented serial bus hardware. The data latches are implemented in CMOS and use minimal power when the bus is inactive (see Figure 5 and Table 3).
ts
tf th tr
tck tl
CLK Data
MSB
tse
tew EN
Figure 5: Serial Bus Timing Diagram
SYMBOL PARAMETER MIN MAX UNITS
BUS CLOCK (CLK) tr tf tck Clock input rise time (Note 1) Clock input fall time (Note 1) Clock period 50 15 15 ns ns ns
ENABLE (EN) tew tl tse Minimum pulse width Delay from last clock rising edge to rise of EN Enable set up time to ignore next rising clock 200 15 15 ns ns ns
BUS DATA (DATA) ts th Data to clock set up time Data to clock hold time 15 15 ns ns
Table 3: Serial Bus Timing Specifications
Note 1: Serial I/O clock maximum rise and fall times are based on the minimum clock period. Longer rise and fall times can be accommodated for slower clocks provided the rise and fall times remain less than 20% of the clock period and all set up and hold time minimums are met with respect to the CMOS switching points (VIL MAX and VIH MIN). The serial I/O clock rise and fall times are limited to an absolute maximum of 100ns.
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ML5805
SERIAL FREQUENCY WORD AND CONFIGURATION REGISTERS
Table 4: Serial Word Format (Frequency or Configuration)
Bit 23 0 PLL FREQUENCY WORD RESET WEN ADDRESS CDATA (see Table 5) 1 22 21 20:16 15:0
SERIAL WORD TRANSACTION TYPES AND CONFIGURATION REGISTER MAP
Table 5: Configuration Register Map showing ROM Default Values *
BIT 13 RATE 0 TXPADRV 0 TTXONB 0 0 0 0 0 1 0 0 0 0 0 0 0 RESERVED RESERVED 12 11 10 9 8 7 6 5 4 RESERVED 0 0 1 3 2 1 RESERVED 1 1 0 IFREGSEL 0 TTXONA 0 DIVBASEOFFS 0 MDCALV 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 RESERVED 0 0 0 0 0 0 0 0 0 RESERVED 0 1 0 0 RESERVED 1 0 0 0
Register (default)
15
14
R0
TCMOD
(0x010E)
0
0
UWD POL 0
PLLUL ACT 1
R1 0 0
CDRDLY
(0x8080)
1
0
CDR EN 0 TTXOFF
RSSI DLY 1
PA FIRST 0
TXFILT EDGE 0
TXFILT POL 0
NOI VCOC 0
UW1 ERR 0
R2
RESERVED
(0x4080)
0
1
AOUT EN 0
R3 0
RESERVED
(0x8886)
1
0
R4
(0XC008)
0
0
* Grey items are reserved.
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ML5805
SERIAL WORD DEFINITIONS
There are two types of serial words used, specified by the state of Bit 23. Bit 23=0 sets the serial word type to `frequency' and Bit 23=1 specifies the serial transaction type as a `configuration word'. Bit Definition Specifies whether this serial transaction is type PLL frequency or type configuration register. 23 Value 0 1 22:0 Data Definition PLL frequency specification word Configuration register specification word
PLL Frequency Word
The PLL Frequency Word may be sent during standby (XCEN=0) or operation (XCEN=1). Bit 23 22:20 19:0 Value 0 IPART FPART Definition Specifies PLL frequency word Integer part of the PLL programming variable Fractional part of the PLL programming variable
The frequency of the channel is controlled by the configuration PLL Frequency Word defined above and the input reference frequency. The expression for the channel frequency is
N f ch = 3 f ref H + I + 20 MHz, 2
where;
N = FPART (the fractional part of the DSM programming value), I = IPART (the integer part of the DSM programming value), H = DIVBASEOFFS + 147 for f ref = 12.288MHz (RATE = 2, 3, or 4),
DIVBASEOFFS + 130 for f ref = 13.824MHz (RATE = 0 or 1), DIVBASEOFFS = a variable defined in Register 3 (default = 8), RATE = a variable defined in Register 0 (default = 0),
f ref = 12.288MHz or 13.824MHz.
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ML5805
Configuration Register Serial Word
The configuration registers are written only during standby mode (XCEN=0). These data registers are volatile and will erase when VCC is removed. The format is shown below. Bit 23 Value 1 Definition This is a configuration register transaction.
Value 22 RESET 0 1
Definition Normal operation Perform reset operation. Must be asserted on first serial transfer.
21 20:16 15:0
1 ADDRESS CDATA
Must be set to write to register. Register address (value = 0, 1, 2, 3, or 4) Configuration Register data.
All registers (R0, R1, R2, R3, and R4) will be loaded with default values and need to be initialized by the system base band hardware for the data rate used. See Table 6 following this section.
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ML5805
REGISTER 0
Register 0 is a special register because some of the hardware is controlled directly from this register. Since those specific bits are connected physically to active hardware, they must always be written first after power on. If Register 0 is not initialized first by the base band hardware, the ML5805 will not operate correctly. Bit 15:13 Variable TCMOD Default 0 Definition Selects one of eight possible data slicer time constant combinations. Value Definition 0 Forces 300s 1 Forces 6s 2 Forces 3s 3 Forces 2s 4 External selection between 300s and 6s 5 External selection between 300s and 3s 6 Use Unique Word Detect mode and forces 6s 7 Use Unique Word Detect mode and forces 3s Selects one of eight possible bit rate combinations. Selected bit rates are dependent on external crystal frequency supplied Value Definition 0 576kbps (@13.824MHz) 1 1,152kbps (@13.824MHz) 2 1,536kbps (@12.288MHz) 3 1,755kbps (@12.288MHz) 4 2,048kbps (@12.288MHz) 5 Not defined. 6 Not defined. 7 Not defined. 1: invert the default DECT Unique Word (UWD) pattern 0: use the default DECT Unique Word (UWD) pattern Value Definition 0 PA will always turn on 1 If the PLL does not lock, the PA does not turn on Spare bit RESERVED RESERVED RESERVED
12:10
RATE
0
9 8
UWDPOL PLLULACT
0 1
7 6 5:4 3:0
(spare) RESERVED RESERVED RESERVED
0 0 0 0xE
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ML5805
REGISTER 1
Bit 15:12 Variable CDRDLY Default 8 Definition Recovered Data Clock Delay (RDCdelay) is the delay between the rising edge of RX data and the rising edge of the recovered RX data clock. The CDRDLY variable sets this delay as follows; RDCdelay = CDRDLY / ( 2 x f ref ) [default RDCdelay = 325 ns] 1: enable RDCdelay 0: RDCdelay is not used Current Setting for PA. Value Definition 0 Bias current setting = 63uA 1 Bias current setting = 280uA 2 Bias current setting = 368uA 3 Bias current setting = 605uA 4 Bias current setting = 605uA 5 Bias current setting = 822uA 6 Bias current setting = 930uA 7 Bias current setting = 1177uA 1: RSSI output is masked until the PLL finished tuning 0: RSSI will function during the PLL tuning change time 1: the PA turns on before the external switch controls change 0: the external switch controls change before the PA is turned on 1: clock TX data on the falling edge of the reference clock 0: clock TX data on the rising edge of the reference clock 1: invert the TX data before filtering 0: no data inversion applied 1: no incremental VCO calibration, only incremental IF calibration 0: perform both VCO and IF incremental calibrations 1: one error is allowed for the DECT unique word detection 0: zero errors are allowed for the DECT unique word detection IF and PA Circuit Regulator Voltages Value Definition 0 Regulator output = 3.3V 1 Not valid 2 Regulator output = 3.44V 3 Regulator output = 3.67V
11 10:8
CDREN TXPADRV
0 0
7 6 5 4 3 2 1:0
RSSIDLY PAFIRST TXFILTEDGE TXFILTPOL NOIVCOC UW1ERR IFREGSEL
1 0 0 0 0 0 0
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 24
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
REGISTER 2
Bit 15:14 13 12:8 7:6 5:0 Variable
RESERVED
Default 1 0 0 2 0
Definition
RESERVED
AOUTEN TTXONB TTXOFF TTXONA
1: use the analog output 0: use the digital output PA on to T/R switch delay (see Table 2) PA off to T/R switch delay (see Table 2) RX to TX delay time (see Table 2)
REGISTER 3
Bit 15:12 11:8 7:4 3:2 1:0 Bit Variable
RESERVED RESERVED
Default 0 0 8 1 2 Power-on Default 0x38 0x45 0x5D 0x60 0x50 0x00 0x00 0x00 0
Definition
RESERVED RESERVED
DIVBASEOFFS
RESERVED RESERVED
Offset to integer portion of PLL programming
RESERVED RESERVED
REGISTER 4
Variable Rate Variable 0 1 2 3 4 5 6 7 Definition Frequency Modulation Deviation value. Small adjustments to MDCALV will tune the modulation spectrum. Note: At power-on, the MDCALV default value corresponding to the RATE variable of Register0 is written to this register. Factory optimized values for MDCALV are shown in Table 6.
15:8
MDCALV
7:0
RESERVED
RESERVED
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 25
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
RECOMMENDED CONFIGURATION REGISTER VALUES
Data Rate (kbps) 1536 0x097A 0xC482 0xC000 0x0080 0x5D00
Register R0 R1 R2 R3 R4
576 0x017A 0xF482 0xC000 0x0080 0x3600
1152 0x057A 0xF482 0xC000 0x0080 0x4800
1755 0x0D7A 0x8482 0xC000 0x0080 0x6400
2048 0x117A 0x8482 0xC000 0x0080 0x5200
Table 6 Recommended register values for each data rate Please consult with RFMD application engineering for updates to these values or if you have special configuration requirements. The recommended register settings in Table 6 initialize the ML5805 as follows; DOUT enabled (AOUT disabled), force 300s data slicer time constant, CDR disabled, RSSI muting while PLL is not locked, 3.44V PA regulator, minimum RX to TX delay, minimum PA on to T/R switch delay and, minimum PA off to T/R switch delay.
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 26
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
TYPICAL PERFORMANCE DATA
Unless otherwise specified TA = 25C and the supply voltage is VCC=3.3V, VCC_PA=3.6V, RISET=381 Ohm, FREF=12.288MHz, DATA RATE=1.536Mbps, all measurements are normalized to the IC pins.
Figure 3 TX output spectrum and eye diagram for 2.048Mbps, PN20 digital mode.
Figure 4 Measured frequency deviation in the time domain for 2.048Mbps, PN20 digital mode.
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 27
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
Figure 5 TX output spectrum and eye diagram for 1.755Mbps, PN20 digital mode.
Figure 6 Measured frequency deviation in the time domain for 1.755Mbps, PN20 digital mode.
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 28
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
Figure 7 TX output spectrum and eye diagram for 1.536Mbps, PN20 digital mode.
Figure 8 Measured frequency deviation in the time domain for 1.536Mbps, PN20 digital mode.
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 29
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
Figure 9 TX output spectrum and eye diagram for 1.152Mbps, PN20 digital mode.
Figure 10 Measured frequency deviation in the time domain for 1.152Mbps, PN20 digital mod
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 30
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
22.0
21.5
Output Power (dBm)
21.0
20.5
20.0
19.5
19.0 5700
5750
5800
5850
TX Frequency (MHz)
Figure 11 Transmit Power .vs. Frequency
22.0
21.5
Output Power (dBm)
21.0
20.5
20.0
19.5
19.0 -20
0
20
40
60
80
Tem perature (degC)
Figure 12 Transmit Power .vs. Temperature
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 31
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
-30
-40
2/3 fc
Relative Level (dBc)
-50
1/3 fc
4/3 fc -60 5/3 fc -70 2 fc -80 PLL ref. 5750 5800 5850
-90 5700
TX Center Frequency, fc (MHz)
Figure 13 Tx Harmonics and Sub-Harmonics .vs. Frequency
1.E+00
1.E-01
1.E-02
1.536Mbps
1.E-03
1.755Mbps 2.048Mbps 1.152Mbps
BER
1.E-04
1.E-05
1.E-06
1.E-07
1.E-08 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10
Input power (dBm)
Figure 14 Bit Error Rate .vs. Data Rate
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 32
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
1.E+00
1.E-01
1.E-02
1.E-03
BER
1.E-04
1.536Mbps
1.E-05
1.755Mbps 2.048Mbps 1.152Mbps
1.E-06
1.E-07
1.E-08 -105 -103 -101 -99 -97 -95 -93 -91 -89
Input power (dBm)
Figure 15 Bit Error Rate .vs. Data Rate
1.E+00 1.E-01 1.E-02 BER 1.E-03 1.E-04 1.E-05 1.E-06 1.E-07 -98 -97 -96 -95 -94 Pin (dBm)
-10C
25C
60C
-93
-92
-91
-90
Figure 16 Bit Error Rate .vs. Temperature (2.048Mbps)
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 33
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
-95
-96
Pin (dBm)
-97
-98
-99 0 10 20 30 40 50 60 Channel Number (2.048 MHz channel spacing)
Figure 17 0.10% Bit Error Rate .vs. Channel (1.536Mbps)
3000.0
2500.0
2000.0
RSSI (mV)
1500.0
1000.0
500.0
0.0 -120
-100
-80
-60
-40
-20
0
20
Input power (dBm)
Figure 18 RSSI .vs. Input Power
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 34
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
PHYSICAL DIMENSIONS
Figure 19: 40 Pin QFN Package Dimensions
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 35
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM
ML5805
WARRANTY
RFMD makes no representations or warranties with respect to the accuracy, utility, or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, express or implied, by estoppel or otherwise, to any patents or other intellectual property rights is granted by this document. The circuits contained in this document are offered as possible applications only. Particular uses or applications may invalidate some of the specifications and/or product descriptions contained herein. The customer is urged to perform its own engineering review before deciding on a particular application. RFMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of RFMD products including liability or warranties relating to merchantability, fitness for a particular purpose, or infringement of any intellectual property right. RFMD products are not designed for use in medical, life saving, or life sustaining applications. If this document is "Advance", its contents describe a RFMD product that is currently under development. All detailed specifications including pinouts and electrical specifications may be changed without notice. If this document is "Preliminary", its contents are based on early silicon measurements. Typical data is representative of the product but is subject to change without notice. Pinout and mechanical dimensions are final. Preliminary documents supersede all Advance documents and all previous Preliminary versions. If this document is "Final", its contents are based on a characterized product, and it is believed to be accurate at the time of publication. Final Data Sheets supersede all previously published versions. This document is Preliminary. (c) 2008 RFMD Inc. All rights reserved. All other trademarks are the property of their respective owners. Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897; 5,717,798; 5,742,151; 5,747,977; 5,754,012; 5,757,174; 5,767,653; 5,777,514; 5,793,168; 5,798,635; 5,804,950; 5,808,455; 5,811,999; 5,818,207; 5,818,669; 5,825,165; 5,825,223; 5,838,723; 5.844,378; 5,844,941. Japan: 2,598,946; 2,619,299; 2,704,176; 2,821,714; 7,076,217. Other patents are pending.
RF MICRO DEVICES(R), RFMD(R), OPTIMUM TECHNOLOGY MATCHING(R), ENABLING WIRELESS CONNECTIVITYTM, POWERSTAR(R), POLARISTM TOTAL RADIOTM ULTIMATEBLUETM AND FASTWAVETM ARE TRADEMARKS OF RFMD, LLC. BLUETOOTH IS A TRADEMARK OWNED BY BLUETOOTH SIG, INC., U.S.A. AND LICENSED FOR USE BY RFMD. ALL OTHER TRADE NAMES, TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. (c)2006, RF MICRO DEVICES, INC.
PRELIMINARY DATA SHEET
APRIL 2008
EDS-106041 REV P01 36
7628 THORNDIKE ROAD, GREENSBORO, NC 27409-9421 * FOR SALES OR TECHNICAL REV A1 DS071026 SUPPORT, CONTACT RFMD AT (+1) 336-678-5570 OR SALES-SUPPORT@RFMD.COM

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