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| TDA7350A 22W BRIDGE-STEREO AMPLIFIER FOR CAR RADIO 1 General Features VERY FEW EXTERNAL COMPONENTS NO BOUCHEROT CELLS NO BOOSTRAP CAPACITORS HIGH OUTPUT POWER NO SWITCH ON/OFF NOISE VERY LOW STAND-BY CURRENT FIXED GAIN (30dB STEREO) PROGRAMMABLE TURN-ON DELAY Figure 1. Package Multiwatt11 Table 1. Order Codes Part Number TDA7350A Package Multiwatt11 1.1 PROTECTIONS OUTPUT AC-DC SHORT CIRCUIT TO GROUND AND TO SUPPLY VOLTAGE VERY INDUCTIVE LOADS LOUDSPEAKER PROTECTION OVERRATING CHIP TEMPERATURE LOAD DUMP VOLTAGE FORTUITOUS OPEN GROUND ESD dio Power Amplifier in the Multiwatt(R) package designed for car radio applications. Thanks to the fully complementary PNP/NPN output configuration the high power performance of the TDA7350A is obtained without bootstrap capacitors. A delayed turn-on mute circuit eliminates audible on/off noise, and a novel short circuit protection system prevents spurious intervention with highly inductive loads. 2 Description The TDA7350A is a new technology class AB AuFigure 2. Application Circuit (Bridge) February 2005 Rev. 1 1/23 TDA7350A Figure 3. Pin connection (Top view) Table 2. Absolute Maximum Ratings Symbol VS VS VS IO IO Ptot Tstg, Tj Operating Supply Voltage DC Supply Voltage Peak Supply Voltage (t = 50ms) Output Peak Current (non rep. t = 100s) Output Peak Current (rep. freq. > 10Hz) Power Dissipation at Tcase = 85C Storage and Junction Temperature Parameter Value 18 28 40 5 4 36 -40 to 150 Unit V V V A A W C Table 3. Thermal Data Symbol Rthj-case Parameter Thermal Resistance Junction-case Max. Value 1.8 Unit C/W Table 4. Electrical Characteristcs (Refer to the test circuits, Tamb = 25C, VS = 14.4V, f = 1KHz unless otherwise specified) Symbol VS Id ASB ISB Tsd Parameter Supply Voltage Range Total Quiescent Drain Current Stand-by attenuation Stand-by Current Thermal Shut-down Temperature Junction 150 stereo configuration 60 80 100 Test Condition Min. 8 Typ. Max. 18 120 Unit V mA dB A C 2/23 TDA7350A Table 4. Electrical Characteristcs (continued) (Refer to the test circuits, Tamb = 25C, VS = 14.4V, f = 1KHz unless otherwise specified) Symbol STEREO Po Output Power (each channel) d = 10% RL= 2 RL= 3.2 RL= 4 d = 10%; VS= 13.2V RL= 2 RL= 3.2 RL= 4 d SVR Distortion Supply Voltage Rejection Po = 0.1 to 4W; RL = 3.2 Rg = 10k f = 100Hz C3 = 22F C3 = 100F f = 1KHz f = 10KHz 45 45 30 27 Rg= 50(*) Rg= 10K(*) Rg = 50(**) Rg= 10K(**) d = 10%; RL= 4 d = 10%; RL= 3.2 d = 10%; VS = 13.2V RL= 4 RL= 3.2 d VOS SVR Distortion Output Offset Voltage Supply Voltage Rejection Rg = 10k f = 100Hz C3 = 22F C3 = 100F 45 50 57 50 33 Rg= 50(*) Rg= 10K(*) Rg = 50(**) Rg= 10K(**) 35 2 2.5 2.7 3.2 37 Po= 0.1 to 10W; RL = 4W 16 50 57 55 50 50 29 1.5 2 2 2.7 31 1 7 11 8 6.5 9 6.5 5.5 0.5 W W W W W W % dB dB dB dB K dB dB V V V V Parameter Test Condition Min. Typ. Max. Unit 7 CT RI GV GV EIN Crosstalk Input Resistance Voltage Gain Voltage Gain Match Input Noise Voltage BRIDGE Po Output Power 20 22 17.5 19 1 250 W W W W % mV dB dB K dB V V V V RI GV EIN Input Resistance Voltage Gain Input Noise Voltage (*) Curve A (**) 22Hz to 22KHz 3/23 TDA7350A Figure 4. STEREO Test and Appication Circuit Figure 5. P.C. Board and Layout (STEREO) of the circuit of fig. 4 4/23 TDA7350A Figure 6. BRIDGE Test and Appication Circuit Figure 7. P.C. Board and Layout (BRIDGE) of the circuit of fig. 6 5/23 TDA7350A Table 5. Recommended Values of the External Components (ref. to the Stereo Test and Application Circuit) Component C1 C2 C3 Recommended Value 0.22F 0.22F 100F Purpose Input Decoupling (CH1) Input Decoupling (CH2) Supply Voltage Rejection Filtering Capacitor Stand-By ON/OFF Delay Supply By-Pass Supply By-Pass Output Decoupling CH2 - Decrease of Low Frequency Cut Off - Longer Turn On Delay Larger than the Recomm. Value -- -- Longer Turn-On Delay Time Smaller than the Recomm. Value -- -- Worse Supply Voltage Rejection. Shorter Turn-On Delay Time Danger of Noise (POP) C4 C5 C6 C7 22F 220F (min) 100nF (min) 2200F Delayed Turn-Off by Stand- Danger of Noise (POP) By Switch Danger of Oscillations Danger of Oscillations - Increase of Low Frequency Cut Off - Shorter Turn On Delay Figure 8. Output Power vs. Supply Voltage (Stereo) Figure 10. Output Power vs. Supply Voltage (Stereo) Figure 9. Output Power vs. Supply Voltage (Stereo) Figure 11. Output Power vs. Supply Voltage (Bridge) 6/23 TDA7350A Figure 12. Output Power vs. Supply Voltage (Bridge) Figure 15. Distortion vs Output Power (Stereo) Figure 13. Drain Current vs Supply Voltage (Stereo) Figure 16. Distortion vs Output Power (Stereo) Figure 14. Distortion vs Output Power (Stereo) Figure 17. Distortion vs Output Power (Bridge) 7/23 TDA7350A Figure 18. SVR vs. Frequency & CSVR (Stereo) Figure 21. SVR vs. Frequency & CSVR; (Bridge) Figure 19. SVR vs. Frequency & CSVR; (Stereo) Figure 22. Crosstalk vs. Frequency (Stereo) Figure 20. SVR vs. Frequency & CSVR; (Bridge) Figure 23. Power Dissipation & Efficiency vs. Output Power (Stereo) 8/23 TDA7350A Figure 24. Power Dissipation & Efficiency vs. Output Power (Stereo) 3 Amplifier Organization The TDA7350A has been developed taking care of the key concepts of the modern power audio amplifier for car radio such as: space and costs saving due to the minimized external count, excellent electrical performances, flexibility in use, superior reliability thanks to a built-in array of protections. As a result the following performances has been achieved: Figure 25. Power Dissipation & Efficiency vs. Output Power (Bridge) NO NEED OF BOOTSTRAP CAPACITORS EVEN AT THE HIGHEST OUTPUT POWER LEVELS ABSOLUTE STABILITY WITHOUT EXTERNAL COMPENSATION THANKS TO THE NNOVATIVE OUT STAGE CONFIGURATION, ALSO ALLOWING INTERNALLY FIXED LOSED LOOP LOWER THAN COMPETITORS LOW GAIN (30dB STEREO FIXED WITHOUT ANY EXTERNAL COMPONENTS) IN ORDER TO MINIMIZE THE OUTPUT NOISE AND OPTIMIZE SVR SILENT MUTE/ST-BY FUNCTION FEATURING ABSENCE OF POP ON/OFF NOISE HIGH SVR STEREO/BRIDGE OPERATION WITHOUT ADDITION OF EXTERNAL COMPONENT AC/DC SHORT CIRCUIT PROTECTION (TO GND, TO VS, ACROSS THE LOAD) LOUDSPEAKER PROTECTION DUMP PROTECTION ESD PROTECTION 4 Block Description Figure 26. Power Dissipation & Efficiency vs. Output Power (Bridge)) 4.1 Polarization The device is organized with the gain resistors directly connected to the signal ground pin i.e. without gain capacitors (fig. 27). The non inverting inputs of the amplifiers are connected to the SVR pin by means of resistor dividers, equal to the feedback networks. This allows the outputs to track the SVR pin which is sufficiently slow to avoid audible turn-on and turn-off transients. 4.2 SVR The voltage ripple on the outputs is equal to the one on SVR pin: with appropriate selection of CSVR, more than 55dB of ripple rejection can be obtained. 9/23 TDA7350A 4.3 Delayed Turn-on (muting) The CSVR sets a signal turn-on delay too. A circuit is included which mutes the device until the voltage on SVR pin reaches ~2.5V typ (fig. 28). The mute function is obtained by duplicating the input differential pair (fig. 29): it can be switched to the signal source or to an internal mute input. This feature is necessary to prevent transients at the inputs reaching the loudspeaker(s) immediately after power-on). Fig. 28 represents the detailed turn-on transient with reference to the stereo configuration. At the poweron the output decoupling capacitors are charged through an internal path but the device itself remains switched off (Phase 1 of the represented diagram). When the outputs reach the voltage level of about 1V (this means that there is no presence of short circuits) the device switches on, the SVR capacitor starts charging itself and the output tracks exactly the SVR pin. During this phase the device is muted until the SVR reaches the "Play" threshold (~2.5V typ.), after that the music signal starts being played. 4.4 Stereo/Bridge Switching There is also no need for external components for changing from stereo to bridge configuration (figg. 2730). A simple short circuit between two pins allows phase reversal at one output, yet maintaining the quiescent output voltage. 4.5 Stand-by The device is also equipped with a stand-by function, so that a low current, and hence low cost switch, can be used for turn on/off. 4.6 Stability The device is provided with an internal compensation wich allows to reach low values of closed loop gain. In this way better performances on S/N ratio and SVR can be obtained. Figure 27. Block Diagram; Stereo Configuration 10/23 TDA7350A Figure 28. Turn-on Delay Circuit Figure 29. Mute Function Diagram 11/23 TDA7350A Figure 30. Block Diagram; Bridge Configuration Figure 31. ICV - PNP Gain vs. IC Figure 33. ICV - PNP cut-off frequency vs. IC Figure 32. ICV - PNP VCE(sat) vs. IC 4.7 OUTPUT STAGE Poor current capability and low cutoff frequency are well known limits of the standard lateral PNP. Composite PNP-NPN power output stages have been widely used, regardless their high saturation drop. This drop can be overcome only at the expense of external components, namely, the bootstrap capacitors. The availability of 4A isolated collector PNP (ICV PNP) adds versatility to the design. The performance of this component, in terms of gain, VCEsat and cut-off frequency, is shown in fig. 31, 32, 33 respectively. It is realized in a new bipolar technology, characterized by topbottom isolation techniques, allowing the implementation 12/23 TDA7350A of low leakage diodes, too. It guarantees BVCEO > 20V and BVCBO > 50V both for NPN and PNP transistors. Basically, the connection shown in fig. 34 has been chosen. First of all because its voltage swing is rail-to-rail, limited only by the VCEsat of the output transistors, which are in the range of 0.3 each. Then, the gain VOUT/VIN is greater than unity, approximately 1+R2/R1. (VCC/2 is fixed by an auxiliary amplifier common to both channel). It is possible, controlling the amount of this local feedback, to force the loop gain (A . ) to less than unity at frequencies for which the phase shift is 180. This means that the output buffer is intrinsically stable and not prone to oscillation. Figure 34. The New Output Stage In contrast, with the circuit of fig. 35, the solution adopted to reduce the gain at high frequencies is the use of an external RC network. 4.8 AMPLIFIER BLOCK DIAGRAM The block diagram of each voltage amplifier is shown in fig. 36. Regardless of production spread, the current in each final stage is kept low, with enough margin on the minimum, below which cross-over distortion would appear. Figure 35. A Classical Output Stage Figure 36. Amplifier Block Diagram 13/23 TDA7350A 4.9 BUILT-IN PROTECTION SYSTEMS 4.9.1 Short Circuit Protection The maximum current the device can deliver can be calculated by considering the voltage that may be present at the terminals of a car radio amplifier and the minimum load impedance. Apart from consideration concerning the area of the power transistors it is not difficult to achieve peak currents of this magnitude (5A peak). However, it becomes more complicated if AC and DC short circuit protection is also required.In particular, with a protection circuit which limits the output current following the SOA curve of the output transistors it is possible that in some conditions (highly reactive loads, for example) the protection circuit may intervene during normal operation. For this reason each amplifier has been equipped with a protection circuit that intervenes when the output current exceeds 4A. Fig 37 shows the protection circuit for an NPN power transistor (a symmetrical circuit applies to PNP).The VBE of the power is monitored and gives out a signal,available through a cascode. This cascode is used to avoid the intervention of the short circuit protection when the saturation is below a given limit. The signal sets a flip-flop which forces the amplifier outputs into a high impedance state. In case of DC short circuit when the short circuit is removed the flip-flop is reset and restarts the circuit (fig. 41). In case of AC short circuit or load shorted in Bridge configuration, the device is continuously switched in ON/OFF conditions and the current is limited. Figure 37. Circuitry for Short Circuit Detection 4.9.2 Load Dump Voltage Surge The TDA7350A has a circuit which enables it to withstand a voltage pulse train on pin 9, of the type shown in fig. 39. If the supply voltage peaks to more than 40V, then an LC filter must be inserted between the supply and pin 9, in order to assure that the pulses at pin 9 will be held within the limits shown. A suggested LC network is shown in fig. 38. With this network, a train of pulses with amplitude up to 120V and width of 2ms can be applied at point A. This type of protection is ON when the supply voltage (pulse or DC) exceeds 18V. For this reason the maximum operating supply voltage is 18V. Figure 38. 14/23 TDA7350A Figure 39. 4.9.3 Polarity Inversion High current (up to 10A) can be handled by the device with no damage for a longer period than the blow-out time of a quick 2A fuse (normally connected in series with the supply). This features is added to avoid destruction, if during fitting to the car, a mistake on the connection of the supply is made. 4.10 Open Ground When the radio is in the ON condition and the ground is accidentally opened, a standard audio amplifier will be damaged. On the TDA7350A protection diodes are included to avoid any damage. 4.10.1DC Voltage The maximum operating DC voltage for the TDA7350A is 18V. However the device can withstand a DC voltage up to 28V with no damage. This could occur during winter if two batteries are series connected to crank the engine. 4.10.2Thermal Shut-down The presence of a thermal limiting circuit offers the following advantages: 1) an overload on the output (even if it is permanent), or an excessive ambient temperature can be easily withstood. 2) the heatsink can have a smaller factor of safety compared with that of a conventional circuit. There is no device damage in the case of excessive junction temperature: all happens is that Po (and therefore Ptot) and Id are reduced. The maximum allowable power dissipation depends upon the size of the external heatsink (i.e. its thermal resistance); Fig. 40 shows the dissi- pable power as a function of ambient temperature for different thermal resistance. Figure 40. Maximum Allowable Power Dissipation vs. Ambient Temperature The TDA7350A guarantees safe operations even for the loudspeaker in case of accidental shortcircuit. Whenever a single OUT to GND, OUT to VS short circuit occurs both the outputs are switched OFF so limiting dangerous DC current flowing through the loudspeaker. Figure 41. Restart Circuit 15/23 TDA7350A 5 Application Hints Figure 42. a) Csvr = 22 F This section explains briefly how to get the best from the TDA7350A and presents some application circuits with suggestions for the value of the components.These values can change depending on the characteristics that the designer of the car radio wants to obtain,or other parts of the car radio that are connected to the audio block. To optimize the performance of the audio part it is useful (or indispensable) to analyze also the parts outside this block that can have an interconnection with the amplifier. This method can provide components and system cost saving. 5.1 Reducing Turn On-Off Pop The TDA7350A has been designed in a way that the turn on(off) transients are controlled through the charge(discharge) of the Csvr capacitor. As a result of it, the turn on(off) transient spectrum contents is limited only to the subsonic range.The following section gives some brief notes to get the best from this design feature(it will refer mainly to the stereo application which appears to be in most cases the more critical from the pop viewpoint.The bridge connection in fact,due to the common mode waveform at the outputs,does not give pop effect). 5.2 TURN-ON Fig. 42 shows the output waveform (before and after the "A" weighting filter) compared to the value of Csvr. Better pop-on performance is obtained with higher Csvr values (the recommended range is from 22F to 220F). The turn-on delay (during which the amplifier is in mute condition) is a function essentially of : Cout, Csvr. Being: T1 120 * Cout T2 1200 * Csvr The turn-on delay is given by: T1+T2 STEREO T2 BRIDGE The best performance is obtained by driving the stby pin with a ramp having a slope slower than 2V/ ms. b) Csvr = 47 F c) Csvr = 100 F 5.3 TURN-OFF A turn-off pop can occur if the st-by pin goes low with a short time constant (this can occur if other car radio sections, preamplifiers,radio.. are supplied through the same st-by switch). This pop is due to the fast switch-off of the internal current generator of the amplifier. 16/23 TDA7350A If the voltage present across the load becomes rapidly zero (due to the fast switch off) a small pop occurs, depending also on Cout,Rload. The parameters that set the switch off time constant of the st-by pin are: the st-by capacitor (Cst-by) the SVR capacitor (Csvr) resistors connected from st-by pin to ground (Rext) The time constant is given by : T Csvr * 2000 // Rext + Cst-by * 2500 // Rext The suggested time constants are : T > 120ms with Cout =1000F, RL = 4ohm,stereo T > 170ms with Cout = 2200F, RL = 4ohm,stereo If Rext is too low the Csvr can become too high and a different approach may be useful (see next section). Figg 43, 44 show some types of electronic switches (P compatible) suitable for supplying the st-by pin (it is important that Qsw is able to saturate with VCE 150mV). Also for turn off pop the bridge configuration is superior, in particular the st-by pin can go low faster. 5.4 Global Approach to Solving Pop Problem by Using the Muting/Turn On Delay Function In the real case turn-on and turn-off pop problems are generated not only by the power amplifier, but also (very often) by preamplifiers,tone controls, radios etc. and transmitted by the power amplifier to the loudspeaker. A simple approach to solving these problems is to use the mute characteristics of the TDA7350A. If the SVR pin is at a voltage below 1.5 V, the mute attenuation (typ)is 30dB .The amplifier is in play mode when Vsvr overcomes 3.5 V. With the circuit of fig 45 we can mute the amplifier for a time Ton after switch-on and for a time Toff after switch-off. During this period the circuitry that precedes the power amplifier can produce spurious spikes that are not transmitted to the loudspeaker. This can give back a very simple design of this circuitry from the pop point of view. A timing diagram of this circuit is illustrated in fig 46. Other advantages of this circuit are: - A reduced time constant allowance of stand-by pin turn off. Consequently it is possible to drive all the car-radio with the signal that drives this pin. - A better turn-off noise with signal on the output. To drive two stereo amplifiers with this circuit it is possible to use the circuit of fig 47. Figure 43. 17/23 TDA7350A Figure 44. Figure 45. Figure 46. 18/23 TDA7350A Figure 47. 5.5 Balance Input In Bridge Configuration A helpful characteristic of the TDA7350A is that, in bridge configuration, a signal present on both the input capacitors is amplified by the same amount and it is present in phase at the outputs, so this signal does not produce effects on the load.The typical value of CMRR is 46 dB. Looking at fig 48, we can see that a noise signal from the ground of the power amplifier to the ground of the hypothetical preamplifier is amplified of a factor equal to the gain of the amplifier (2 * Gv). Using a configuration of fig. 49 the same ground noise is present at the output multiplied by the factor 2 * Gv/200. This means less distortion,less noise (e.g. motor cassette noise ) and/or a simplification of the layout of PC board. The only limitation of this balanced input is the maximum amplitude of common mode signals (few tens of millivolt) to avoid a loss of output power due to the common mode signal on the output, but in a large number of cases this signal is within this range. 5.6 High Gain, Low Noise Application The following section describes a flexible preamplifier having the purpose to increase the gain of the TDA7350A. Figure 48. Figure 49. 19/23 TDA7350A A two transistor network (fig. 50) has been adopted whose components can be changed in order to achieve the desired gain without affecting the good performances of the audio amplifier itself. The recommended values for 40 dB overall gain are : Table 6. Resistance Stereo 10K 4.3K 10K 50K Stereo 10K 16K 24K 50K R1 R2 R3 R4 Figure 50. 20/23 TDA7350A 6 Package Information Figure 51. Multiwatt11 (Vertical) Mechanical Data & Package Dimensions DIM. A B C D E F G G1 H1 H2 L L1 L2 L3 L4 L7 M M1 S S1 Dia1 21.9 21.7 17.4 17.25 10.3 2.65 4.25 4.73 1.9 1.9 3.65 4.55 5.08 17.5 10.7 22.2 22.1 0.49 0.88 1.45 16.75 19.6 20.2 22.5 22.5 18.1 17.75 10.9 2.9 4.85 5.43 2.6 2.6 3.85 0.862 0.854 0.685 0.679 0.406 0.104 0.167 0.186 0.075 0.075 0.144 0.179 0.200 0.689 0.421 0.874 0.87 1.7 17 1 0.55 0.95 1.95 17.25 0.019 0.035 0.057 0.659 0.772 0.795 0.886 0.886 0.713 0.699 0.429 0.114 0.191 0.214 0.102 0.102 0.152 0.067 0.669 mm MIN. TYP. MAX. 5 2.65 1.6 0.039 0.022 0.037 0.077 0.679 MIN. inch TYP. MAX. 0.197 0.104 0.063 OUTLINE AND MECHANICAL DATA Multiwatt11 (Vertical) 0016035 H 21/23 TDA7350A Table 7. Revision History Date February 2005 Revision 1 First Issue Description of Changes 22/23 TDA7350A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 23/23 |
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