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JBT6L77-AS
TOSHIBA CMOS Digital Integrated Circuits Silicon Monolithic
JBT6L77-AS
Source Driver for TFT LCD Panels
The JBT6L77-AS is a 64 gray-level and 240-channel-output source driver for TFT LCD panels. Grayscale data accepts 6-bit digital data inputs, which combined with the internal DA converter and 11 external power supplies, allows display of up to 260,000 colors. Based on high-speed CMOS, the JBT6L77-AS offers both low power consumption and high-speed operation.
Features
* * * * * * * Grayscale data Panel drive outputs High-speed operation Power supply voltage Operating temperature Cascading multiple devices : 18-bit digital (3 outputs x 6 bits) parallel transfer method, selectable write direction : 240 outputs, 64 gray levels, DAC system, reference analog voltage inputs : 30 MHz (max) : Digital power supply voltage 1/4 2.5 to 3.6 V Analog power supply voltage 1/4 5.0 0.5 V : -20 to 75C Gate driver for TFT LCD panel : JBT6L78-AS
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JBT6L77-AS
Block Diagram
U/D DI/O CPH Shift register DO/I
DA0 to DA5 DB0 to DB5 DC0 to DC5 Sampling register
LOAD
Load register
Control circuit block
V0 to V10
DA converter
Output circuit
AVDD DVDD VSS TESTB
SA1
SB1
SC1
SA80 SB80 SC80
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PAD Layout
Chip size: 1.56 13.28 (mm)
X (+) DUMMY SB80 SC80 SA80 Output pad 240, 50 mm pitch, two-step zigzag allocation SC1 SB1 SA1 DUMMY Y (+)
DUMMY DUMMY DUMMY Chip center (0,0) 11 DUMMY DUMMY DUMMY VSS AVDD Alignment mark 6 6 DC5 DC3 DC1 CPH DO/I TESTB V10 V8 V6 V4 V2 V0 DB4 DB2 DB0 DA4 DA2 DA0 TEG VSS TEG DC4 DC2 DC0 U/D LOAD DVDD V9 V7 V5 V3 V1 DB5 DB3 DB1 DA5 DA3 DA1 DI/O TEG 3 3 3 3 3 3 3 3 3 3 22 3 22222222222 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 6 11
DUMMY DUMMY DUMMY
DUMMY DUMMY DUMMY
AVDD 6 Alignment mark
: Cross point Output side dummy Output pins (SA1 to SC80) 40 60 40 60 40 60 45 90 45 50 20 90 20 90 90 40 Alignment mark 30 30 30 30 30 30 Pattern prohibited 50 Short-side dummy pins 50 50 50 50 100 50
50
40 Input pins (AVDD, VSS) 75 45 90 45 20 37.5 37.5 20 45 20 20 20 20 75 75 45 Input pins (V0 to V10, LOAD, TESTB) 40 40 50 40 40 45 90 45 35 35 20 20 90 45 25 25 20 20 Unit: mm Input pins (DVDD) 70 70 70 45 90 Input pins (others) 50 50 50
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PAD Coordinates
Chip size: 13.28 1.56 (mm) Number of PAD: 396 [Unit: mm]
No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 Name AVDD AVDD AVDD AVDD AVDD AVDD VSS VSS VSS VSS VSS VSS TEG1 TEG2 TEG3 DC5 DC5 DC5 DC4 DC4 DC4 DC3 DC3 DC3 DC2 DC2 DC2 DC1 DC1 DC1 DC0 DC0 DC0 CPH CPH CPH U/D U/D X Point -6307.5 -6212.5 -6117.5 -6022.5 -5927.5 -5832.5 -5657.5 -5562.5 -5467.5 -5372.5 -5277.5 -5182.5 -5035.0 -4965.0 -4895.0 -4735.0 -4665.0 -4595.0 -4435.0 -4365.0 -4295.0 -4135.0 -4065.0 -3995.0 -3835.0 -3765.0 -3695.0 -3535.0 -3465.0 -3395.0 -3235.0 -3165.0 -3095.0 -2935.0 -2865.0 -2795.0 -2635.0 -2565.0 Y Point -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 No. 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 Name U/D DO/I DO/I DO/I LOAD LOAD TESTB TESTB DVDD DVDD DVDD V10 V10 V9 V9 V8 V8 V7 V7 V6 V6 V5 V5 V4 V4 V3 V3 V2 V2 V1 V1 V0 V0 DB5 DB5 DB5 DB4 DB4 X Point -2495.0 -2335.0 -2265.0 -2195.0 -2050.0 -1990.0 -1900.0 -1840.0 -1715.0 -1625.0 -1535.0 -1260.0 -1200.0 -1060.0 -1000.0 -910.0 -850.0 -710.0 -650.0 -560.0 -500.0 -360.0 -300.0 -210.0 -150.0 -10.0 50.0 140.0 200.0 340.0 400.0 490.0 550.0 695.0 765.0 835.0 995.0 1065.0 Y Point -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 No. 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 Name DB4 DB3 DB3 DB3 DB2 DB2 DB2 DB1 DB1 DB1 DB0 DB0 DB0 DA5 DA5 DA5 DA4 DA4 DA4 DA3 DA3 DA3 DA2 DA2 DA2 DA1 DA1 DA1 DA0 DA0 DA0 DI/O DI/O DI/O TEG4 TEG5 TEG6 TEG7 X Point 1135.0 1295.0 1365.0 1435.0 1595.0 1665.0 1735.0 1895.0 1965.0 2035.0 2195.0 2265.0 2335.0 2495.0 2565.0 2635.0 2795.0 2865.0 2935.0 3095.0 3165.0 3235.0 3395.0 3465.0 3535.0 3695.0 3765.0 3835.0 3995.0 4065.0 4135.0 4295.0 4365.0 4435.0 4595.0 4665.0 4735.0 4895.0 Y Point -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606
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[Unit: mm]
No. 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 Name TEG8 TEG9 VSS VSS VSS VSS VSS VSS AVDD AVDD AVDD AVDD AVDD AVDD DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY SA1 SB1 SC1 SA2 SB2 SC2 SA3 SB3 SC3 SA4 SB4 SC4 SA5 X Point 4965.0 5035.0 5182.5 5277.5 5372.5 5467.5 5562.5 5657.5 5832.5 5927.5 6022.5 6117.5 6212.5 6307.5 6488.5 6488.5 6488.5 6488.5 6488.5 6488.5 6488.5 6488.5 6488.5 6488.5 6488.5 6276.0 6176.0 6076.0 5976.0 5926.0 5876.0 5826.0 5776.0 5726.0 5676.0 5626.0 5576.0 5526.0 5476.0 5426.0 5376.0 Y Point -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -606 -439 -339 -239 -139 -39 61 161 261 361 461 561 621 621 621 621 481 621 481 621 481 621 481 621 481 621 481 621 No. 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 Name SB5 SC5 SA6 SB6 SC6 SA7 SB7 SC7 SA8 SB8 SC8 SA9 SB9 SC9 SA10 SB10 SC10 SA11 SB11 SC11 SA12 SB12 SC12 SA13 SB13 SC13 SA14 SB14 SC14 SA15 SB15 SC15 SA16 SB16 SC16 SA17 SB17 SC17 SA18 SB18 SC18 X Point 5326.0 5276.0 5226.0 5176.0 5126.0 5076.0 5026.0 4976.0 4926.0 4876.0 4826.0 4776.0 4726.0 4676.0 4626.0 4576.0 4526.0 4476.0 4426.0 4376.0 4326.0 4276.0 4226.0 4176.0 4126.0 4076.0 4026.0 3976.0 3926.0 3876.0 3826.0 3776.0 3726.0 3676.0 3626.0 3576.0 3526.0 3476.0 3426.0 3376.0 3326.0 Y Point 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 No. 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 Name SA19 SB19 SC19 SA20 SB20 SC20 SA21 SB21 SC21 SA22 SB22 SC22 SA23 SB23 SC23 SA24 SB24 SC24 SA25 SB25 SC25 SA26 SB26 SC26 SA27 SB27 SC27 SA28 SB28 SC28 SA29 SB29 SC29 SA30 SB30 SC30 SA31 SB31 SC31 SA32 SB32 X Point 3276.0 3226.0 3176.0 3126.0 3076.0 3026.0 2976.0 2926.0 2876.0 2826.0 2776.0 2726.0 2676.0 2626.0 2576.0 2526.0 2476.0 2426.0 2376.0 2326.0 2276.0 2226.0 2176.0 2126.0 2076.0 2026.0 1976.0 1926.0 1876.0 1826.0 1776.0 1726.0 1676.0 1626.0 1576.0 1526.0 1476.0 1426.0 1376.0 1326.0 1276.0 Y Point 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621
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[Unit: mm]
No. 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 Name SC32 SA33 SB33 SC33 SA34 SB34 SC34 SA35 SB35 SC35 SA36 SB36 SC36 SA37 SB37 SC37 SA38 SB38 SC38 SA39 SB39 SC39 SA40 SB40 SC40 SA41 SB41 SC41 SA42 SB42 SC42 SA43 SB43 SC43 SA44 SB44 SC44 SA45 SB45 SC45 SA46 X Point 1226.0 1176.0 1126.0 1076.0 1026.0 976.0 926.0 876.0 826.0 776.0 726.0 676.0 626.0 576.0 526.0 476.0 426.0 376.0 326.0 276.0 226.0 176.0 126.0 76.0 26.0 -24.0 -74.0 -124.0 -174.0 -224.0 -274.0 -324.0 -374.0 -424.0 -474.0 -524.0 -574.0 -624.0 -674.0 -724.0 -774.0 Y Point 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 No. 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 Name SB46 SC46 SA47 SB47 SC47 SA48 SB48 SC48 SA49 SB49 SC49 SA50 SB50 SC50 SA51 SB51 SC51 SA52 SB52 SC52 SA53 SB53 SC53 SA54 SB54 SC54 SA55 SB55 SC55 SA56 SB56 SC56 SA57 SB57 SC57 SA58 SB58 SC58 SA59 SB59 SC59 X Point -824.0 -874.0 -924.0 -974.0 -1024.0 -1074.0 -1124.0 -1174.0 -1224.0 -1274.0 -1324.0 -1374.0 -1424.0 -1474.0 -1524.0 -1574.0 -1624.0 -1674.0 -1724.0 -1774.0 -1824.0 -1874.0 -1924.0 -1974.0 -2024.0 -2074.0 -2124.0 -2174.0 -2224.0 -2274.0 -2324.0 -2374.0 -2424.0 -2474.0 -2524.0 -2574.0 -2624.0 -2674.0 -2724.0 -2774.0 -2824.0 Y Point 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 No. 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 Name SA60 SB60 SC60 SA61 SB61 SC61 SA62 SB62 SC62 SA63 SB63 SC63 SA64 SB64 SC64 SA65 SB65 SC65 SA66 SB66 SC66 SA67 SB67 SC67 SA68 SB68 SC68 SA69 SB69 SC69 SA70 SB70 SC70 SA71 SB71 SC71 SA72 SB72 SC72 SA73 SB73 X Point -2874.0 -2924.0 -2974.0 -3024.0 -3074.0 -3124.0 -3174.0 -3224.0 -3274.0 -3324.0 -3374.0 -3424.0 -3474.0 -3524.0 -3574.0 -3624.0 -3674.0 -3724.0 -3774.0 -3824.0 -3874.0 -3924.0 -3974.0 -4024.0 -4074.0 -4124.0 -4174.0 -4224.0 -4274.0 -4324.0 -4374.0 -4424.0 -4474.0 -4524.0 -4574.0 -4624.0 -4674.0 -4724.0 -4774.0 -4824.0 -4874.0 Y Point 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481
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[Unit: mm]
No. 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 3/4 3/4 Name SC73 SA74 SB74 SC74 SA75 SB75 SC75 SA76 SB76 SC76 SA77 SB77 SC77 SA78 SB78 SC78 SA79 SB79 SC79 SA80 SB80 SC80 DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY Aligment mark Aligment mark X Point -4924.0 -4974.0 -5024.0 -5074.0 -5124.0 -5174.0 -5224.0 -5274.0 -5324.0 -5374.0 -5424.0 -5474.0 -5524.0 -5574.0 -5624.0 -5674.0 -5724.0 -5774.0 -5824.0 -5874.0 -5924.0 -5974.0 -6024.0 -6124.0 -6224.0 -6488.5 -6488.5 -6488.5 -6488.5 -6488.5 -6488.5 -6488.5 -6488.5 -6488.5 -6488.5 -6488.5 6464.0 -6464.0 Y Point 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 481 621 561 461 361 261 161 61 -39 -139 -239 -339 -439 -605 -605
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Pin Function
Pin Name I/O Function Data transfer enable pin These pins are used to input/output grayscale data. Input and output are switched as shown below according to the setting of the U/D pin. U/D H DI/O DO/I I/O L DI/O Input Output DO/I Output Input
When set for input A high on DI/O or DO/I is latched into the internal logic synchronously with the rising edge of CPH. When the internal circuit is in standby state, the device is ready to transfer data. The grayscale data is latched in sequentially, starting at the next rise of CPH. When set for output The pin is used to transfer the enable signal to the JBT6L77-AS at the next stage of the LCD driver. The pin enters standby state after outputting a high. Transfer direction select pin This pin controls the direction in which the data is transferred into the sampling register. Data is transferred synchronously with each rising edge of CPH in one of the following sequences: When U/D is high, data is transferred in the order SA1 to SC1, SA2 to SC2, SA3 to SC3, ... When U/D is low, the direction is reversed to give SA80 to SC80, SA79 to SC79, SA78 to SC78, ... The voltage applied to this pin must be a DC-level voltage that is either high or low. Sampling clock input This clock input is used to transfer grayscale data. In sync with the rising edge of CPH, writes grayscale data bus data to the sampling register. Grayscale data bus The data inputs consist of 6-bit word for each three channel that are transferred in parallel at the rising edge of CPH. The relationship between the grayscale data and the weight of each bit is as follows: Grayscale data = 32 Dw5 + 16 Dw4 + 8 Dw3 + 4 Dw2 + 2 Dw1 + Dw0 (*) w = A, B, C Data load input pin When a high voltage supplys to the load input, the data is transferred from the Sampling register to the Load register synchronously at the rising edge of CPH. (Note) After High level is input to this pin (LOAD), input CPH for at least three cycles in the same cycle as that for sampling. * When LOAD = Low level, output is at high impedance. * When LOAD = High level, output corresponds to grayscale data. Reference analog input pins These pins are used to input the voltage used for the DAC. VSS < V0 < V1 < ... < V9 < V10 < AVDD or AVDD > V0 > V1 > ... > V9 > V10 > VSS = = = = = = = = Test pin Leave this pin open or VDD level. LCD panel drive pins Analog power supply pin Digital power supply pin. GND pin
U/D
I
CPH
I
DA0 to DA5 DB0 to DB5 DC0 to DC5
I
LOAD
I
V0 to V10
I
TESTB SA1 to SA80 SB1 to SB80 SC1 to SC80 AVDD DVDD VSS
I
O
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Device Operation
(1) Starting data transfer
A high input to the data transfer enable pin (DI/O or DO/I) is latched into the internal logic synchronously with the rising edge of CPH, setting the device ready to transfer data. Data transfer starts at the next rise of CPH (see Timing diagram 1 and 2).
(2) Data transfer method
The data is latched in from the grayscale bus to the sampling register synchronously with each rising edge of CPH. Grayscale data for three outputs are latched into the device simultaneously in one transfer. Grayscale data are written as three outputs in parallel during one transfer. Data transfer completes after 80 transfers. Then the device enters Standby mode. Data written to the sampling register are the operation result of the grayscale data bus.
(3) Terminating data transfer
The data transfer enable pin (DO/I or DI/O) output goes high synchronously with the rising edge of CPH one clock period before the last data is latched in. It is held high until the next rise of CPH (see Timing diagram 1 and 2). The output from this pin can be connected directly as input to the data transfer enable pin (DI/O or DO/I) of the next stage LCD driver. In this way, multiple devices can be easily cascaded to drive a large screen.
(4) Panel drive output
When a high voltage supplies to the load input, the data in the sampling register is transferred to the load register and the device starts updating output to the LCD panel drive pins.
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(5) Reference power supply circuit
The connection between the device and the external reference power supply for Reference analog supply is configured with 1, 7 or 8 resistors in series (total of 63 resistor ladders).
JBT6L77-AS
V0 R0 V1 R1 to R6 R62 R55 to R61 R47 to R54 R39 to R46 R31 to R38 R23 to R30 R15 to R22 R7 to R14 V2 V3 V4 External power supply for reference voltage V5 V6 V7 V8 V9 V10
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Resistor Name R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R30 R31
Resistance Value (W) 6247 2186 1312 875 687 625 500 375 375 312 250 312 312 187 187 250 187 187 187 187 187 125 187 125 125 125 187 125 125 125 125 187
Resistor Name R32 R33 R34 R35 R36 R37 R38 R39 R40 R41 R42 R43 R44 R45 R46 R47 R48 R49 R50 R51 R52 R53 R54 R55 R56 R57 R58 R59 R60 R61 R62
Resistance Value (W) 62 125 125 125 187 62 125 125 125 125 125 125 187 125 125 125 187 125 187 125 187 187 187 250 187 312 312 375 437 687 6746
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(6) Grayscale data and output voltages
The LCD drive output voltages are determined by the grayscale values and the 11 reverence analog inputs line voltages (V0 to V11).
* Schematic representation of reference analog voltage inputs
AVDD V0
V2
V3 V4 V5 V6 V7 V8
V9
V10 AVSS 00H
07H
0FH
17H
1FH
27H
2FH
37H
3EH 3FH
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* Grayscale data and output voltages
(Input voltage: V0 = 4.90 V, V10 = 0.10 V) (*) w = A, B, C
Dw2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dw1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dw0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 V00H V01H V02H V03H V04H V05H V06H V07H V08H V09H V0AH V0BH V0CH V0DH V0EH V0FH V10H V11H V12H V13H V14H V15H V16H V17H V18H V19H V1AH V1BH V1CH V1DH V1EH V1FH V5 V4 V3 V2
Grayscale Data 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH
Dw5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Dw4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Dw3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Output Voltage
V0 4.90 3.90 3.55 3.34 3.20 3.09 2.99 2.91 2.85 2.79 2.74 2.70 2.65 2.60 2.57 2.54 2.50 2.47 2.44 2.41 2.38 2.35 2.33 2.30 2.28 2.26 2.24 2.21 2.19 2.17 2.15 2.13
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(*) w = A, B, C
Grayscale Data 20H 21H 22H 23H 24H 25H 26H 27H 28H 29H 2AH 2BH 2CH 2DH 2EH 2FH 30H 31H 32H 33H 34H 35H 36H 37H 38H 39H 3AH 3BH 3CH 3DH 3EH 3FH Dw5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dw4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dw3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dw2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dw1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dw0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 V20H V21H V22H V23H V24H V25H V26H V27H V28H V29H V2AH V2BH V2CH V2DH V2EH V2FH V30H V31H V32H V33H V34H V35H V36H V37H V38H V39H V3AH V3BH V3CH V3DH V3EH V3FH V9 V10 V8 V7 V6 Output Voltage 2.10 2.09 2.07 2.05 2.03 2.00 1.99 1.97 1.95 1.93 1.91 1.89 1.87 1.84 1.82 1.80 1.78 1.75 1.73 1.70 1.68 1.65 1.62 1.59 1.55 1.52 1.47 1.42 1.36 1.29 1.18 0.10
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Timing Diagrams 1
DI/O, DO/I (Input) 0 CPH (*) DA0 to DA5 SA1/ SA80 SA2/ SA79 SA3/ SA78 SA79/ SA2 SA80/ SA1 1 2 3 78 79 80
DB0 to DB5
SB1/ SB80
SB2/ SB79
SB3/ SB78
SB79/ SB2
SB80/ SB1
DC0 to DC5
SC1/ SC80
SC2/ SC79
SC3/ SC78
SC79/ SC2
SC80/ SC1
DO/I, DI/O (Output) (*) Upper stage: SA1 (R) U/D = High Lower stage: SA80 (R) U/D = Low
Timing Diagrams 2
0 CPH
1
2
3
4
79
80
81
0
1
2
3
4
DI/O, DO/I (Input)
DI/O, DO/I (Output) DA0 to DA5 DB0 to DB5 DC0 to DC5 First data LOAD Last data First data at next stage
SA1 to SA80 SB1 to SB80 SC1 to SC80
Hi-z
Hi-z
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Absolute Maximum Ratings (VSS = 0 V)
Characteristics Analog supply voltage Digital supply voltage Input voltage Reference analog voltage Storage temperature Symbol DVDD AVDD VIN V (0:10) Tstg Rating -0.3 to 6.5 -0.3 to 6.5 -0.3 to DVDD + 0.3 -0.3 to AVDD + 0.3 -55 to 125 Unit V V V V C V0 to V10 Relevant Pin
Recommended Operating Conditions (VSS = 0 V)
Characteristics Digital supply voltage Analog supply voltage Reference analog voltage-1 Operating temperature Operating frequency Output load capacitance (Note 1) Symbol DVDD AVDD V0 to V10 Topr fCPH CL Test Condition 3/4 3/4 3/4 3/4 3/4 3/4 Rating 2.5 to 3.6 4.5 to 5.5 0.1 to AVDD - 0.1 -20 to 75 DC to 30 100 (max) PIN Unit V V V C MHz pF/ CPH SA1 to SA80 SB1 to SB80 SC1 to SC80 Relevant Pin
Note 1: The following shows the relative magnitude of each reference analog voltage: < < < < < VSS = V0 < V1 < V2 = V3 = V4 < V5 = V6 = V7 = V8 < V9 < V10 < AVDD = = = or < < < < < VSS = V10 < V9 < V8 = V7 < V6 = V5 = V4 = V3 = V2 < V1 < V0 < AVDD = = =
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JBT6L77-AS
Electrical Characteristics DC Characteristics (VSS = 0 V, DVDD = 2.5 to 3.6 V, AVDD = 4.5 V to 5.5 V, Ta = -20 to 75C)
Characteristics Low level Input current High level Low level Input voltage High level Low level Output voltage High level Output off current Output voltage range VOH IOFF VOUT VDO1 Output voltage deviation VDO2 3/4 3/4 3/4 0.1 < Reference analog = voltage < 1.2 = 1.2 < Reference analog voltage < 4.9 = During operations (Note 5) When no, operations (Note 6) During operations (Note 5) Current consumption (2) AIDD 3/4 When no, operations (Note 6) LOAD = Low (Note 7) VIH VOL 3/4 Symbol IILL1 IILL2 IIH VIL 3/4 3/4 IOL = 0.1 mA IOH = -0.1 mA (Note 7) 3/4 Test Circuit Test Condition 3/4 3/4 3/4 3/4 Min 3/4 3/4 3/4 0 0.8 DVDD 0 DVDD - 0.5 3/4 0.1 -40 -30 3/4 3/4 3/4 3/4 3/4 Typ. 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 Max 10 400 10 0.2 DVDD DVDD 0.5 DVDD 10 AVDD - 0.1 40 mV 30 4 mA 3 8 mA 8 100 mA AVDD DVDD mA SA1 to SA80 SB1 to SB80 SC1 to SC80 V DI/O, DO/I mA Unit Relevant Pin (Note 2) TESTB (Note 3)
V
(Note 4)
Current consumption (1)
DIDD
3/4
Note 2: DA0 to DA5, DB0 to DB5, DC0 to DC5, DI/O, DO/I, CPH, LOAD, U/D Note 3: DA0 to DA5, DB0 to DB5, DC0 to DC5, DI/O, DO/I, CPH, LOAD, U/D, TESTB Note 4: DA0 to DA5, DB0 to DB5, DC0 to DC5, DI/O, DO/I, CPH, LOAD Note 5: DVDD = 3.6 V, AVDD = 5.5 V, fCPH = 30 MHz, 1H = 100 ms, no load, checkerboard pattern, LOAD = 1 ms at low level, typical value Note 6: AVDD = 5.5 V, fCPH = 30 MHz, 1H = 100 ms, DI/O: Fixed low Note 7: AVDD = 5.5 V, Standby at LOAD = Low, fCPH = 30 MHz, DI/O: Fixed low
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JBT6L77-AS
AC Characteristics (VSS = 0 V, DVDD = 2.5 to 3.6 V, AVDD = 4.5 V to 5.5 V, Ta = -20 to 75C)
Characteristics CPH pulse width H CPH pulse width L Enable setup time Enable hold time Data setup time Data hold time LOAD setup time LOAD hold time LOAD pulse width H LOAD pulse width L Output delay time 1 Output delay time 2 Symbol tCWH tCWL tsDI thDI tsDD thDD tsLD thLD tLWH tLWL tpdDO tpdDX Test Circuit 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 CL = 15 pF CL = 100 pF Test Condition 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 Min 4 4 4 0 4 0 1 2 10 1 3/4 3/4 Typ. 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 Max 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 15 10 Unit ns ns ns ns ns ns CPH CPH ms ms ns ms
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JBT6L77-AS
DVDD 0.8 CPH Last-1 tpdDO DO/I, DI/O (Output) DVDD 0.8 DVDD 0.8 Last tpdDO DVDD 0.8
tsLD LOAD
tLWH DVDD 0.8
tCWH CPH Last-1 DVDD 0.8 Last DVDD 0.2 thDD
tCWL DVDD 0.8 DVDD 0.2
tsDD DW0 to DW5 W = A, B, C Valid
DVDD 0.2/ DVDD 0.2 Last valid
Valid
DVDD 0.8 CPH
DVDD 0.8
thLD LOAD tsDI DI/O, DO/I (Input) tpdDX SA1 to SA80 SB1 to SB80 SC1 to SC80 thDI
tLWL DVDD 0.2
DVDD 0.8 tpdDX
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JBT6L77-AS
RESTRICTIONS ON PRODUCT USE
000707EBM
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * Light striking a semiconductor device generates electromotive force due to photoelectric effects. In some cases this can cause the device to malfunction. This is especially true for devices in which the surface (back), or side of the chip is exposed. When designing circuits, make sure that devices are protected against incident light from external sources. Exposure to light both during regular operation and during inspection must be taken into account. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
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2001-12-18

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